Index: llvm/lib/Target/AArch64/AArch64InstrInfo.cpp =================================================================== --- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp +++ llvm/lib/Target/AArch64/AArch64InstrInfo.cpp @@ -6599,7 +6599,8 @@ // TODO: Handle cases where Reg is a super- or sub-register of the // destination register. - if (Reg != MI.getOperand(0).getReg()) + const MachineOperand &Op0 = MI.getOperand(0); + if (!Op0.isReg() || Reg != Op0.getReg()) return None; switch (MI.getOpcode()) { Index: llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp =================================================================== --- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -5371,7 +5371,8 @@ // TODO: Handle cases where Reg is a super- or sub-register of the // destination register. - if (Reg != MI.getOperand(0).getReg()) + const MachineOperand &Op0 = MI.getOperand(0); + if (!Op0.isReg() || Reg != Op0.getReg()) return None; // We describe SUBri or ADDri instructions. @@ -5383,8 +5384,7 @@ // TODO: Third operand can be global address (usually some string). Since // strings can be relocated we cannot calculate their offsets for // now. - if (!MI.getOperand(0).isReg() || !MI.getOperand(1).isReg() || - !MI.getOperand(2).isImm()) + if (!MI.getOperand(1).isReg() || !MI.getOperand(2).isImm()) return None; Offset = MI.getOperand(2).getImm() * Sign; Index: llvm/test/DebugInfo/MIR/ARM/dbgcallsite-noreg-is-imm-check.mir =================================================================== --- /dev/null +++ llvm/test/DebugInfo/MIR/ARM/dbgcallsite-noreg-is-imm-check.mir @@ -0,0 +1,75 @@ +# RUN: llc -debug-entry-values -mtriple=armebv6k-unknown-linux-gnueabihf -filetype=obj -start-after=machineverifier %s -o -| llvm-dwarfdump - | FileCheck %s --implicit-check-not=DW_TAG_GNU_call_site_parameter + +## The test was handmade. + +--- | + ; ModuleID = 'test.c' + source_filename = "test.c" + target datalayout = "E-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" + target triple = "armebv6k-unknown-linux-gnueabihf" + + ; Function Attrs: nounwind + define dso_local arm_aapcscc i32 @func1(i32 %arg1) local_unnamed_addr !dbg !14 { + entry: + %add = add nsw i32 %arg1, 2, !dbg !19 + %a = alloca i32, align 4 + call void @llvm.dbg.value(metadata i32 %arg1, metadata !18, metadata !DIExpression()), !dbg !19 + %call = call arm_aapcscc i32 @func2(i32 %add), !dbg !19 + ret i32 0, !dbg !19 + } + + declare !dbg !4 dso_local arm_aapcscc i32 @func2(i32) local_unnamed_addr + + ; Function Attrs: nounwind readnone speculatable willreturn + declare void @llvm.dbg.value(metadata, metadata, metadata) + + !llvm.dbg.cu = !{!0} + !llvm.module.flags = !{!9, !10, !11, !12} + !llvm.ident = !{!13} + + !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 10.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !3, nameTableKind: None) + !1 = !DIFile(filename: "test.c", directory: "/") + !2 = !{} + !3 = !{!4} + !4 = !DISubprogram(name: "func2", scope: !1, file: !1, line: 8, type: !5, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized, retainedNodes: !2) + !5 = !DISubroutineType(types: !6) + !6 = !{!7, !7, !7, !8} + !7 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed) + !8 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !7, size: 32) + !9 = !{i32 2, !"Dwarf Version", i32 4} + !10 = !{i32 2, !"Debug Info Version", i32 3} + !11 = !{i32 1, !"wchar_size", i32 4} + !12 = !{i32 1, !"min_enum_size", i32 4} + !13 = !{!"clang version 10.0.0"} + !14 = distinct !DISubprogram(name: "func1", scope: !1, file: !1, line: 9, type: !15, scopeLine: 9, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !17) + !15 = !DISubroutineType(types: !16) + !16 = !{!7, !7, !7, !7} + !17 = !{!18} + !18 = !DILocalVariable(name: "arg1", arg: 1, scope: !14, file: !1, line: 9, type: !7) + !19 = !DILocation(line: 0, scope: !14) +... +--- +name: func1 +alignment: 4 +callSites: + - { bb: 0, offset: 11, fwdArgRegs: + - { arg: 0, reg: '$r0' } } +body: | + bb.0.entry: + liveins: $r0, $r1, $r2, $r4, $r10, $lr + + DBG_VALUE $r0, $noreg, !18, !DIExpression(), debug-location !19 + $sp = frame-setup STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r10, $r11, killed $lr + frame-setup CFI_INSTRUCTION def_cfa_offset 16 + frame-setup CFI_INSTRUCTION offset $lr, -4 + frame-setup CFI_INSTRUCTION offset $r11, -8 + frame-setup CFI_INSTRUCTION offset $r10, -12 + frame-setup CFI_INSTRUCTION offset $r4, -16 + $r11 = frame-setup ADDri $sp, 8, 14, $noreg, $noreg + frame-setup CFI_INSTRUCTION def_cfa $r11, 8 + $sp = frame-setup SUBri $sp, 8, 14, $noreg, $noreg + INLINEASM &"rev $0, $1", 0, 327690, def renamable $r0, 327689, killed renamable $r4, 0, debug-location !19 + BL @func2, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit killed $r2, implicit-def $sp, implicit-def $r0, debug-location !19 + BX_RET 14, $noreg, implicit killed $r0, debug-location !19 + +...