Index: llvm/lib/Target/ARM/ARMInstrThumb2.td =================================================================== --- llvm/lib/Target/ARM/ARMInstrThumb2.td +++ llvm/lib/Target/ARM/ARMInstrThumb2.td @@ -1871,6 +1871,34 @@ defm t2PLDW : T2Ipl<1, 0, "pldw">, Requires<[IsThumb2,HasV7,HasMP]>; defm t2PLI : T2Ipl<0, 1, "pli">, Requires<[IsThumb2,HasV7]>; +// PLD/PLDW/PLI aliases w/ the optional .w suffix +def : t2InstAlias<"pld${p}.w\t$addr", + (t2PLDi12 t2addrmode_imm12:$addr, pred:$p)>; +def : t2InstAlias<"pld${p}.w\t$addr", + (t2PLDi8 t2addrmode_negimm8:$addr, pred:$p)>; +def : t2InstAlias<"pld${p}.w\t$addr", + (t2PLDs t2addrmode_so_reg:$addr, pred:$p)>; + +def : InstAlias<"pldw${p}.w\t$addr", + (t2PLDWi12 t2addrmode_imm12:$addr, pred:$p), 0>, + Requires<[IsThumb2,HasV7,HasMP]>; +def : InstAlias<"pldw${p}.w\t$addr", + (t2PLDWi8 t2addrmode_negimm8:$addr, pred:$p), 0>, + Requires<[IsThumb2,HasV7,HasMP]>; +def : InstAlias<"pldw${p}.w\t$addr", + (t2PLDWs t2addrmode_so_reg:$addr, pred:$p), 0>, + Requires<[IsThumb2,HasV7,HasMP]>; + +def : InstAlias<"pli${p}.w\t$addr", + (t2PLIi12 t2addrmode_imm12:$addr, pred:$p), 0>, + Requires<[IsThumb2,HasV7]>; +def : InstAlias<"pli${p}.w\t$addr", + (t2PLIi8 t2addrmode_negimm8:$addr, pred:$p), 0>, + Requires<[IsThumb2,HasV7]>; +def : InstAlias<"pli${p}.w\t$addr", + (t2PLIs t2addrmode_so_reg:$addr, pred:$p), 0>, + Requires<[IsThumb2,HasV7]>; + // pci variant is very similar to i12, but supports negative offsets // from the PC. Only PLD and PLI have pci variants (not PLDW) class T2Iplpci inst, string opc> : T2Iso<(outs), (ins t2ldrlabel:$addr), @@ -1893,6 +1921,24 @@ def t2PLDpci : T2Iplpci<0, "pld">, Requires<[IsThumb2]>; def t2PLIpci : T2Iplpci<1, "pli">, Requires<[IsThumb2,HasV7]>; +def : t2InstAlias<"pld${p}.w $addr", + (t2PLDpci t2ldrlabel:$addr, pred:$p)>; +def : InstAlias<"pli${p}.w $addr", + (t2PLIpci t2ldrlabel:$addr, pred:$p), 0>, + Requires<[IsThumb2,HasV7]>; + +// PLD/PLI with alternate literal form. +def : t2InstAlias<"pld${p} $addr", + (t2PLDpci t2ldr_pcrel_imm12:$addr, pred:$p)>; +def : InstAlias<"pli${p} $addr", + (t2PLIpci t2ldr_pcrel_imm12:$addr, pred:$p), 0>, + Requires<[IsThumb2,HasV7]>; +def : t2InstAlias<"pld${p}.w $addr", + (t2PLDpci t2ldr_pcrel_imm12:$addr, pred:$p)>; +def : InstAlias<"pli${p}.w $addr", + (t2PLIpci t2ldr_pcrel_imm12:$addr, pred:$p), 0>, + Requires<[IsThumb2,HasV7]>; + //===----------------------------------------------------------------------===// // Load / store multiple Instructions. // @@ -5187,14 +5233,6 @@ (t2LDRConstPool GPRnopc:$Rt, const_pool_asm_imm:$immediate, pred:$p)>; -// PLD/PLDW/PLI with alternate literal form. -def : t2InstAlias<"pld${p} $addr", - (t2PLDpci t2ldr_pcrel_imm12:$addr, pred:$p)>; -def : InstAlias<"pli${p} $addr", - (t2PLIpci t2ldr_pcrel_imm12:$addr, pred:$p), 0>, - Requires<[IsThumb2,HasV7]>; - - //===----------------------------------------------------------------------===// // ARMv8.1m instructions // Index: llvm/test/MC/ARM/basic-thumb2-instructions.s =================================================================== --- llvm/test/MC/ARM/basic-thumb2-instructions.s +++ llvm/test/MC/ARM/basic-thumb2-instructions.s @@ -1935,6 +1935,7 @@ pld [r7, #257] pld [r1, #0] pld [r1, #-0] + pld.w [r1, #-0] @ CHECK: pld [r5, #-4] @ encoding: [0x15,0xf8,0x04,0xfc] @ CHECK: pld [r6, #32] @ encoding: [0x96,0xf8,0x20,0xf0] @@ -1943,6 +1944,7 @@ @ CHECK: pld [r7, #257] @ encoding: [0x97,0xf8,0x01,0xf1] @ CHECK: pld [r1] @ encoding: [0x91,0xf8,0x00,0xf0] @ CHECK: pld [r1, #-0] @ encoding: [0x11,0xf8,0x00,0xfc] +@ CHECK: pld [r1, #-0] @ encoding: [0x11,0xf8,0x00,0xfc] @------------------------------------------------------------------------------ @@ -1954,6 +1956,8 @@ @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12 pld [pc,#-4095] + pld.w [pc,#-4095] +@ CHECK: pld [pc, #-4095] @ encoding: [0x1f,0xf8,0xff,0xff] @ CHECK: pld [pc, #-4095] @ encoding: [0x1f,0xf8,0xff,0xff] @@ -1962,17 +1966,21 @@ @------------------------------------------------------------------------------ pld [r8, r1] pld [r5, r2] + pld.w [r5, r2] pld [r0, r2, lsl #3] pld [r8, r2, lsl #2] pld [sp, r2, lsl #1] pld [sp, r2, lsl #0] + pld.w [sp, r2, lsl #1] @ CHECK: pld [r8, r1] @ encoding: [0x18,0xf8,0x01,0xf0] @ CHECK: pld [r5, r2] @ encoding: [0x15,0xf8,0x02,0xf0] +@ CHECK: pld [r5, r2] @ encoding: [0x15,0xf8,0x02,0xf0] @ CHECK: pld [r0, r2, lsl #3] @ encoding: [0x10,0xf8,0x32,0xf0] @ CHECK: pld [r8, r2, lsl #2] @ encoding: [0x18,0xf8,0x22,0xf0] @ CHECK: pld [sp, r2, lsl #1] @ encoding: [0x1d,0xf8,0x12,0xf0] @ CHECK: pld [sp, r2] @ encoding: [0x1d,0xf8,0x02,0xf0] +@ CHECK: pld [sp, r2, lsl #1] @ encoding: [0x1d,0xf8,0x12,0xf0] @------------------------------------------------------------------------------ @ PLI(immediate) @@ -1984,6 +1992,7 @@ pli [r7, #257] pli [pc, #+4095] pli [pc, #-4095] + pli.w [pc, #-4095] @ CHECK: pli [r5, #-4] @ encoding: [0x15,0xf9,0x04,0xfc] @ CHECK: pli [r6, #32] @ encoding: [0x96,0xf9,0x20,0xf0] @@ -1992,6 +2001,7 @@ @ CHECK: pli [r7, #257] @ encoding: [0x97,0xf9,0x01,0xf1] @ CHECK: pli [pc, #4095] @ encoding: [0x9f,0xf9,0xff,0xff] @ CHECK: pli [pc, #-4095] @ encoding: [0x1f,0xf9,0xff,0xff] +@ CHECK: pli [pc, #-4095] @ encoding: [0x1f,0xf9,0xff,0xff] @------------------------------------------------------------------------------ @@ -2009,17 +2019,21 @@ @------------------------------------------------------------------------------ pli [r8, r1] pli [r5, r2] + pli.w [r5, r2] pli [r0, r2, lsl #3] pli [r8, r2, lsl #2] pli [sp, r2, lsl #1] pli [sp, r2, lsl #0] + pli.w [sp, r2, lsl #1] @ CHECK: pli [r8, r1] @ encoding: [0x18,0xf9,0x01,0xf0] @ CHECK: pli [r5, r2] @ encoding: [0x15,0xf9,0x02,0xf0] +@ CHECK: pli [r5, r2] @ encoding: [0x15,0xf9,0x02,0xf0] @ CHECK: pli [r0, r2, lsl #3] @ encoding: [0x10,0xf9,0x32,0xf0] @ CHECK: pli [r8, r2, lsl #2] @ encoding: [0x18,0xf9,0x22,0xf0] @ CHECK: pli [sp, r2, lsl #1] @ encoding: [0x1d,0xf9,0x12,0xf0] @ CHECK: pli [sp, r2] @ encoding: [0x1d,0xf9,0x02,0xf0] +@ CHECK: pli [sp, r2, lsl #1] @ encoding: [0x1d,0xf9,0x12,0xf0] @------------------------------------------------------------------------------ @ POP (alias)