Index: clang/test/CodeGen/arm-target-features.c =================================================================== --- clang/test/CodeGen/arm-target-features.c +++ clang/test/CodeGen/arm-target-features.c @@ -107,4 +107,7 @@ // RUN: %clang_cc1 -triple thumb-linux-gnueabi -target-cpu cortex-m33 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-ARMV8M-MAIN-LINUX // CHECK-ARMV8M-MAIN-LINUX: "target-features"="+armv8-m.main,+dsp,+fp-armv8d16sp,+fp16,+hwdiv,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp" +// RUN: %clang_cc1 -triple thumb-linux-gnueabi -target-cpu cortex-m55 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-ARMV81M-MAIN-LINUX +// CHECK-ARMV81M-MAIN-LINUX: "target-features"="+armv8.1-m.main,+dsp,+fp-armv8d16,+fp-armv8d16sp,+fp16,+fp64,+fullfp16,+hwdiv,+lob,+mve,+mve.fp,+ras,+thumb-mode,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp,+vfp4d16,+vfp4d16sp" + void foo() {} Index: clang/test/Driver/arm-cortex-cpus.c =================================================================== --- clang/test/Driver/arm-cortex-cpus.c +++ clang/test/Driver/arm-cortex-cpus.c @@ -820,6 +820,9 @@ // CHECK-CORTEX-M33: "-cc1"{{.*}} "-triple" "thumbv8m.main-{{.*}} "-target-cpu" "cortex-m33" // CHECK-CORTEX-M35P: "-cc1"{{.*}} "-triple" "thumbv8m.main-{{.*}} "-target-cpu" "cortex-m35p" +// RUN: %clang -target arm -mcpu=cortex-m55 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-M55 %s +// CHECK-CORTEX-M55: "-cc1"{{.*}} "-triple" "thumbv8.1m.main-{{.*}} "-target-cpu" "cortex-m55" + // ================== Check whether -mcpu accepts mixed-case values. // RUN: %clang -target arm-linux-gnueabi -mcpu=Cortex-a5 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CASE-INSENSITIVE-CPUV7A %s // RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-A7 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CASE-INSENSITIVE-CPUV7A %s Index: clang/test/Preprocessor/arm-target-features.c =================================================================== --- clang/test/Preprocessor/arm-target-features.c +++ clang/test/Preprocessor/arm-target-features.c @@ -674,6 +674,7 @@ // RUN: %clang -target armv8m.main-none-linux-gnu -mcmse -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=V8M_CMSE %s // RUN: %clang -target arm-none-linux-gnu -mcpu=cortex-m33 -mcmse -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=V8M_CMSE %s // RUN: %clang -target arm -mcpu=cortex-m23 -mcmse -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=V8M_CMSE %s +// RUN: %clang -target arm-none-linux-gnu -mcpu=cortex-m55 -mcmse -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=V8M_CMSE %s // V8M_CMSE-NOT: __ARM_FEATURE_CMSE 1 // V8M_CMSE: #define __ARM_FEATURE_CMSE 3 @@ -726,6 +727,20 @@ // M33-ALLOW-FP-INSTR: #define __ARM_FP 0x6 // M33-ALLOW-FP-INSTR: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1 +// Test whether predefines are as expected when targeting cortex-m55 (softfp FP ABI as default). +// RUN: %clang -target arm-eabi -mcpu=cortex-m55 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=M55 %s +// M55: #define __ARM_ARCH 8 +// M55: #define __ARM_ARCH_8_1M_MAIN__ 1 +// M55: #define __ARM_ARCH_EXT_IDIV__ 1 +// M55-NOT: __ARM_ARCH_ISA_ARM +// M55: #define __ARM_ARCH_ISA_THUMB 2 +// M55: #define __ARM_ARCH_PROFILE 'M' +// M55-NOT: __ARM_FEATURE_CRC32 +// M55: #define __ARM_FEATURE_DSP 1 +// M55: #define __ARM_FEATURE_MVE 3 +// M55: #define __ARM_FP 0xe +// M55: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1 + // Test whether predefines are as expected when targeting krait (soft FP as default). // RUN: %clang -target armv7 -mcpu=krait -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=KRAIT %s // RUN: %clang -target armv7 -mthumb -mcpu=krait -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=KRAIT %s Index: llvm/include/llvm/Support/ARMTargetParser.def =================================================================== --- llvm/include/llvm/Support/ARMTargetParser.def +++ llvm/include/llvm/Support/ARMTargetParser.def @@ -268,6 +268,8 @@ ARM_CPU_NAME("cortex-m23", ARMV8MBaseline, FK_NONE, false, ARM::AEK_NONE) ARM_CPU_NAME("cortex-m33", ARMV8MMainline, FK_FPV5_SP_D16, false, ARM::AEK_DSP) ARM_CPU_NAME("cortex-m35p", ARMV8MMainline, FK_FPV5_SP_D16, false, ARM::AEK_DSP) +ARM_CPU_NAME("cortex-m55", ARMV8_1MMainline, FK_FP_ARMV8_FULLFP16_D16, false, + (ARM::AEK_DSP | ARM::AEK_SIMD | ARM::AEK_FP | ARM::AEK_FP16)) ARM_CPU_NAME("cortex-a32", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) ARM_CPU_NAME("cortex-a35", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) ARM_CPU_NAME("cortex-a53", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) Index: llvm/lib/Support/Host.cpp =================================================================== --- llvm/lib/Support/Host.cpp +++ llvm/lib/Support/Host.cpp @@ -192,6 +192,7 @@ .Case("0xc20", "cortex-m0") .Case("0xc23", "cortex-m3") .Case("0xc24", "cortex-m4") + .Case("0xd22", "cortex-m55") .Case("0xd02", "cortex-a34") .Case("0xd04", "cortex-a35") .Case("0xd03", "cortex-a53") Index: llvm/lib/Target/ARM/ARM.td =================================================================== --- llvm/lib/Target/ARM/ARM.td +++ llvm/lib/Target/ARM/ARM.td @@ -1124,6 +1124,14 @@ FeatureUseMISched, FeatureHasNoBranchPredictor]>; +def : ProcessorModel<"cortex-m55", CortexM4Model, [ARMv81mMainline, + FeatureDSP, + FeatureFPARMv8_D16, + FeatureUseMISched, + FeatureHasNoBranchPredictor, + FeaturePrefLoopAlign32, + FeatureHasSlowFPVMLx, + HasMVEFloatOps]>; def : ProcNoItin<"cortex-a32", [ARMv8a, FeatureHWDivThumb, Index: llvm/test/CodeGen/ARM/build-attributes.ll =================================================================== --- llvm/test/CodeGen/ARM/build-attributes.ll +++ llvm/test/CodeGen/ARM/build-attributes.ll @@ -233,6 +233,7 @@ ; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi | FileCheck %s --check-prefix=ARMv81M-MAIN ; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve | FileCheck %s --check-prefix=ARMv81M-MAIN-MVEINT ; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp | FileCheck %s --check-prefix=ARMv81M-MAIN-MVEFP +; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-m55 | FileCheck %s --check-prefix=CORTEX-M55 ; CPU-SUPPORTED-NOT: is not a recognized processor for this target @@ -1722,6 +1723,28 @@ ; ARMv81M-MAIN-MVEINT: .eabi_attribute 48, 1 @ Tag_MVE_arch ; ARMv81M-MAIN-MVEFP: .eabi_attribute 6, 21 @ Tag_CPU_arch ; ARMv81M-MAIN-MVEFP: .eabi_attribute 48, 2 @ Tag_MVE_arch + +; CORTEX-M55: .cpu cortex-m55 +; CORTEX-M55: .eabi_attribute 6, 21 +; CORTEX-M55: .eabi_attribute 7, 77 +; CORTEX-M55: .eabi_attribute 8, 0 +; CORTEX-M55: .eabi_attribute 9, 3 +; CORTEX-M55: .fpu fpv5-d16 +; CORTEX-M55: .eabi_attribute 36, 1 +; CORTEX-M55-NOT: .eabi_attribute 44 +; CORTEX-M55: .eabi_attribute 46, 1 +; CORTEX-M55: .eabi_attribute 34, 1 +; CORTEX-M55: .eabi_attribute 17, 1 +; CORTEX-M55-NOT: .eabi_attribute 19 +; CORTEX-M55: .eabi_attribute 20, 1 +; CORTEX-M55: .eabi_attribute 21, 1 +; CORTEX-M55: .eabi_attribute 23, 3 +; CORTEX-M55: .eabi_attribute 24, 1 +; CORTEX-M55: .eabi_attribute 25, 1 +; CORTEX-M55-NOT: .eabi_attribute 28 +; CORTEX-M55: .eabi_attribute 38, 1 +; CORTEX-M55: .eabi_attribute 14, 0 + define i32 @f(i64 %z) { ret i32 0 } Index: llvm/unittests/Support/TargetParserTest.cpp =================================================================== --- llvm/unittests/Support/TargetParserTest.cpp +++ llvm/unittests/Support/TargetParserTest.cpp @@ -290,6 +290,11 @@ ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP, "8-M.Mainline")); EXPECT_TRUE(testARMCPU("cortex-m35p", "armv8-m.main", "fpv5-sp-d16", ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP, "8-M.Mainline")); + EXPECT_TRUE(testARMCPU("cortex-m55", "armv8.1-m.main", "fp-armv8-fullfp16-d16", + ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_SIMD | + ARM::AEK_FP | ARM::AEK_RAS | ARM::AEK_LOB | + ARM::AEK_FP16, + "8.1-M.Mainline")); EXPECT_TRUE(testARMCPU("iwmmxt", "iwmmxt", "none", ARM::AEK_NONE, "iwmmxt")); EXPECT_TRUE(testARMCPU("xscale", "xscale", "none", @@ -299,7 +304,7 @@ "7-S")); } -static constexpr unsigned NumARMCPUArchs = 85; +static constexpr unsigned NumARMCPUArchs = 86; TEST(TargetParserTest, testARMCPUArchList) { SmallVector List;