Index: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
===================================================================
--- llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -4114,6 +4114,15 @@
                    "unpredictable STXP instruction, status is also a source");
     break;
   }
+  case AArch64::LDRABwriteback:
+  case AArch64::LDRAAwriteback: {
+    unsigned Xt = Inst.getOperand(0).getReg();
+    unsigned Xn = Inst.getOperand(1).getReg();
+    if (Xt == Xn)
+      return Error(Loc[0],
+          "unpredictable LDRA instruction, writeback base is also a source");
+    break;
+  }
   }
 
 
Index: llvm/test/MC/AArch64/armv8.3a-diagnostics.s
===================================================================
--- llvm/test/MC/AArch64/armv8.3a-diagnostics.s
+++ llvm/test/MC/AArch64/armv8.3a-diagnostics.s
@@ -18,3 +18,7 @@
 // CHECK: error: index must be a multiple of 8 in range [-4096, 4088].
   ldrab x0, [x1, 4086]
 // CHECK: error: index must be a multiple of 8 in range [-4096, 4088].
+  ldraa x0, [x0, -4096]!
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable LDRA instruction, writeback base is also a source
+  ldrab x0, [x0, -4096]!
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable LDRA instruction, writeback base is also a source