diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp --- a/llvm/lib/Analysis/ValueTracking.cpp +++ b/llvm/lib/Analysis/ValueTracking.cpp @@ -367,7 +367,7 @@ computeKnownBits(Op0, LHSKnown, Depth + 1, Q); computeKnownBits(Op1, Known2, Depth + 1, Q); - KnownOut = KnownBits::computeForAddSub(Add, NSW, LHSKnown, Known2); + KnownOut = KnownBits::computeForAddSub(Add, NSW, LHSKnown, std::move(Known2)); } static void computeKnownBitsMul(const Value *Op0, const Value *Op1, bool NSW, @@ -1094,7 +1094,7 @@ const Query &Q) { unsigned BitWidth = Known.getBitWidth(); - KnownBits Known2(Known); + KnownBits Known2(BitWidth); switch (I->getOpcode()) { default: break; case Instruction::Load: @@ -1504,7 +1504,7 @@ computeKnownBits(R, Known2, Depth + 1, RecQ); // We need to take the minimum number of known bits - KnownBits Known3(Known); + KnownBits Known3(BitWidth); RecQ.CxtI = LInst; computeKnownBits(L, Known3, Depth + 1, RecQ); @@ -1658,7 +1658,7 @@ if (II->getIntrinsicID() == Intrinsic::fshr) ShiftAmt = BitWidth - ShiftAmt; - KnownBits Known3(Known); + KnownBits Known3(BitWidth); computeKnownBits(I->getOperand(0), Known2, Depth + 1, Q); computeKnownBits(I->getOperand(1), Known3, Depth + 1, Q); @@ -1686,7 +1686,7 @@ Known2.countMinLeadingOnes()); Known = KnownBits::computeForAddSub( - IsAdd, /* NSW */ false, Known, Known2); + IsAdd, /* NSW */ false, Known, std::move(Known2)); // We select between the operation result and all-ones/zero // respectively, so we can preserve known ones/zeros. diff --git a/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp b/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp --- a/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp +++ b/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp @@ -182,7 +182,7 @@ computeKnownBitsImpl(MI.getOperand(2).getReg(), Known2, DemandedElts, Depth + 1); Known = KnownBits::computeForAddSub(/*Add*/ false, /*NSW*/ false, Known, - Known2); + std::move(Known2)); break; } case TargetOpcode::G_XOR: { @@ -211,7 +211,7 @@ computeKnownBitsImpl(MI.getOperand(2).getReg(), Known2, DemandedElts, Depth + 1); Known = - KnownBits::computeForAddSub(/*Add*/ true, /*NSW*/ false, Known, Known2); + KnownBits::computeForAddSub(/*Add*/ true, /*NSW*/ false, Known, std::move(Known2)); break; } case TargetOpcode::G_AND: { diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -3133,7 +3133,7 @@ Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1); Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1); Known = KnownBits::computeForAddSub(/* Add */ false, /* NSW */ false, - Known, Known2); + Known, std::move(Known2)); break; } case ISD::UADDO: diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -1950,7 +1950,7 @@ } } - Known = Known2; + Known = std::move(Known2); if (BitWidth > EltBitWidth) Known = Known.anyext(BitWidth); break; diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp --- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp @@ -488,7 +488,7 @@ // Otherwise just compute the known bits of the result. bool NSW = cast(I)->hasNoSignedWrap(); Known = KnownBits::computeForAddSub(I->getOpcode() == Instruction::Add, - NSW, LHSKnown, RHSKnown); + NSW, LHSKnown, std::move(RHSKnown)); break; } case Instruction::Shl: {