diff --git a/mlir/include/mlir/Dialect/LoopOps/LoopOps.td b/mlir/include/mlir/Dialect/LoopOps/LoopOps.td --- a/mlir/include/mlir/Dialect/LoopOps/LoopOps.td +++ b/mlir/include/mlir/Dialect/LoopOps/LoopOps.td @@ -249,6 +249,7 @@ }]; let arguments = (ins AnyType:$result); + let assemblyFormat = "$result attr-dict `:` type($result)"; } def TerminatorOp : Loop_Op<"terminator", [Terminator]> { diff --git a/mlir/include/mlir/Dialect/SPIRV/SPIRVBitOps.td b/mlir/include/mlir/Dialect/SPIRV/SPIRVBitOps.td --- a/mlir/include/mlir/Dialect/SPIRV/SPIRVBitOps.td +++ b/mlir/include/mlir/Dialect/SPIRV/SPIRVBitOps.td @@ -23,7 +23,8 @@ [NoSideEffect, SameOperandsAndResultType])>; class SPV_BitFieldExtractOp traits = []> : - SPV_Op { + SPV_Op])> { let arguments = (ins SPV_ScalarOrVectorOf:$base, SPV_Integer:$offset, @@ -34,9 +35,11 @@ SPV_ScalarOrVectorOf:$result ); - let parser = [{ return ::parseBitFieldExtractOp(parser, result); }]; - let printer = [{ ::printBitFieldExtractOp(this->getOperation(), p); }]; - let verifier = [{ return ::verifyBitFieldExtractOp(this->getOperation()); }]; + let verifier = [{ return success(); }]; + + let assemblyFormat = [{ + operands attr-dict `:` type($base) `,` type($offset) `,` type($count) + }]; } class SPV_BitUnaryOp traits = []> : diff --git a/mlir/include/mlir/Dialect/SPIRV/SPIRVControlFlowOps.td b/mlir/include/mlir/Dialect/SPIRV/SPIRVControlFlowOps.td --- a/mlir/include/mlir/Dialect/SPIRV/SPIRVControlFlowOps.td +++ b/mlir/include/mlir/Dialect/SPIRV/SPIRVControlFlowOps.td @@ -333,8 +333,7 @@ let results = (outs); - let parser = [{ return parseNoIOOp(parser, result); }]; - let printer = [{ printNoIOOp(getOperation(), p); }]; + let assemblyFormat = "attr-dict"; let hasOpcode = 0; @@ -360,8 +359,7 @@ let results = (outs); - let parser = [{ return parseNoIOOp(parser, result); }]; - let printer = [{ printNoIOOp(getOperation(), p); }]; + let assemblyFormat = "attr-dict"; } // ----- @@ -383,8 +381,7 @@ let results = (outs); - let parser = [{ return parseNoIOOp(parser, result); }]; - let printer = [{ printNoIOOp(getOperation(), p); }]; + let assemblyFormat = "attr-dict"; } // ----- diff --git a/mlir/include/mlir/Dialect/SPIRV/SPIRVStructureOps.td b/mlir/include/mlir/Dialect/SPIRV/SPIRVStructureOps.td --- a/mlir/include/mlir/Dialect/SPIRV/SPIRVStructureOps.td +++ b/mlir/include/mlir/Dialect/SPIRV/SPIRVStructureOps.td @@ -365,8 +365,7 @@ let results = (outs); - let parser = [{ return parseNoIOOp(parser, result); }]; - let printer = [{ printNoIOOp(getOperation(), p); }]; + let assemblyFormat = "attr-dict"; let verifier = [{ return success(); }]; diff --git a/mlir/lib/Dialect/LoopOps/LoopOps.cpp b/mlir/lib/Dialect/LoopOps/LoopOps.cpp --- a/mlir/lib/Dialect/LoopOps/LoopOps.cpp +++ b/mlir/lib/Dialect/LoopOps/LoopOps.cpp @@ -418,22 +418,6 @@ return success(); } -static ParseResult parseReduceReturnOp(OpAsmParser &parser, - OperationState &result) { - OpAsmParser::OperandType operand; - Type resultType; - if (parser.parseOperand(operand) || parser.parseColonType(resultType) || - parser.resolveOperand(operand, resultType, result.operands)) - return failure(); - - return success(); -} - -static void print(OpAsmPrinter &p, ReduceReturnOp op) { - p << op.getOperationName() << " " << op.result() << " : " - << op.result().getType(); -} - //===----------------------------------------------------------------------===// // TableGen'd op method definitions //===----------------------------------------------------------------------===// diff --git a/mlir/lib/Dialect/SPIRV/SPIRVOps.cpp b/mlir/lib/Dialect/SPIRV/SPIRVOps.cpp --- a/mlir/lib/Dialect/SPIRV/SPIRVOps.cpp +++ b/mlir/lib/Dialect/SPIRV/SPIRVOps.cpp @@ -488,41 +488,6 @@ // Common parsers and printers //===----------------------------------------------------------------------===// -static ParseResult parseBitFieldExtractOp(OpAsmParser &parser, - OperationState &state) { - SmallVector operandInfo; - Type baseType; - Type offsetType; - Type countType; - auto loc = parser.getCurrentLocation(); - - if (parser.parseOperandList(operandInfo, 3) || parser.parseColon() || - parser.parseType(baseType) || parser.parseComma() || - parser.parseType(offsetType) || parser.parseComma() || - parser.parseType(countType) || - parser.resolveOperands(operandInfo, {baseType, offsetType, countType}, - loc, state.operands)) { - return failure(); - } - state.addTypes(baseType); - return success(); -} - -static void printBitFieldExtractOp(Operation *op, OpAsmPrinter &printer) { - printer << op->getName() << ' ' << op->getOperands() << " : " - << op->getOperandTypes(); -} - -static LogicalResult verifyBitFieldExtractOp(Operation *op) { - if (op->getOperand(0).getType() != op->getResult(0).getType()) { - return op->emitError("expected the same type for the first operand and " - "result, but provided ") - << op->getOperand(0).getType() << " and " - << op->getResult(0).getType(); - } - return success(); -} - // Parses an atomic update op. If the update op does not take a value (like // AtomicIIncrement) `hasValue` must be false. static ParseResult parseAtomicUpdateOp(OpAsmParser &parser, @@ -668,19 +633,6 @@ return success(); } -// Parses an op that has no inputs and no outputs. -static ParseResult parseNoIOOp(OpAsmParser &parser, OperationState &state) { - if (parser.parseOptionalAttrDict(state.attributes)) - return failure(); - return success(); -} - -// Prints an op that has no inputs and no outputs. -static void printNoIOOp(Operation *op, OpAsmPrinter &printer) { - printer << op->getName(); - printer.printOptionalAttrDict(op->getAttrs()); -} - static ParseResult parseUnaryOp(OpAsmParser &parser, OperationState &state) { OpAsmParser::OperandType operandInfo; Type type; diff --git a/mlir/test/Dialect/SPIRV/ops.mlir b/mlir/test/Dialect/SPIRV/ops.mlir --- a/mlir/test/Dialect/SPIRV/ops.mlir +++ b/mlir/test/Dialect/SPIRV/ops.mlir @@ -257,7 +257,7 @@ // ----- func @bit_field_u_extract_invalid_result_type(%base: vector<3xi32>, %offset: i32, %count: i16) -> vector<4xi32> { - // expected-error @+1 {{expected the same type for the first operand and result, but provided 'vector<3xi32>' and 'vector<4xi32>'}} + // expected-error @+1 {{failed to verify that all of {base, result} have same type}} %0 = "spv.BitFieldUExtract" (%base, %offset, %count) : (vector<3xi32>, i32, i16) -> vector<4xi32> spv.ReturnValue %0 : vector<4xi32> }