Index: llvm/include/llvm/IR/IntrinsicsAArch64.td =================================================================== --- llvm/include/llvm/IR/IntrinsicsAArch64.td +++ llvm/include/llvm/IR/IntrinsicsAArch64.td @@ -1763,6 +1763,20 @@ def int_aarch64_sve_flogb : AdvSIMD_SVE_LOGB_Intrinsic; // +// SVE2 - Vector histogram count +// + +def int_aarch64_sve_histcnt : AdvSIMD_Pred2VectorArg_Intrinsic; +def int_aarch64_sve_histseg : AdvSIMD_2VectorArg_Intrinsic; + +// +// SVE2 - Character match +// + +def int_aarch64_sve_match : AdvSIMD_SVE_Compare_Intrinsic; +def int_aarch64_sve_nmatch : AdvSIMD_SVE_Compare_Intrinsic; + +// // SVE2 - Unary narrowing operations // Index: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td =================================================================== --- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td +++ llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td @@ -1667,8 +1667,8 @@ defm SQXTUNT_ZZ : sve2_int_sat_extract_narrow_top<0b10, "sqxtunt", int_aarch64_sve_sqxtunt>; // SVE2 character match - defm MATCH_PPzZZ : sve2_char_match<0b0, "match">; - defm NMATCH_PPzZZ : sve2_char_match<0b1, "nmatch">; + defm MATCH_PPzZZ : sve2_char_match<0b0, "match", int_aarch64_sve_match>; + defm NMATCH_PPzZZ : sve2_char_match<0b1, "nmatch", int_aarch64_sve_nmatch>; // SVE2 bitwise exclusive-or interleaved defm EORBT_ZZZ : sve2_bitwise_xor_interleaved<0b0, "eorbt">; @@ -1686,10 +1686,10 @@ defm SSUBLTB_ZZZ : sve2_misc_int_addsub_long_interleaved<0b11, "ssubltb">; // SVE2 histogram generation (segment) - def HISTSEG_ZZZ : sve2_hist_gen_segment<"histseg">; + def HISTSEG_ZZZ : sve2_hist_gen_segment<"histseg", int_aarch64_sve_histseg>; // SVE2 histogram generation (vector) - defm HISTCNT_ZPzZZ : sve2_hist_gen_vector<"histcnt">; + defm HISTCNT_ZPzZZ : sve2_hist_gen_vector<"histcnt", int_aarch64_sve_histcnt>; // SVE2 floating-point base 2 logarithm as integer defm FLOGB_ZPmZ : sve2_fp_flogb<"flogb", int_aarch64_sve_flogb>; Index: llvm/lib/Target/AArch64/SVEInstrFormats.td =================================================================== --- llvm/lib/Target/AArch64/SVEInstrFormats.td +++ llvm/lib/Target/AArch64/SVEInstrFormats.td @@ -6818,20 +6818,23 @@ let Defs = [NZCV]; } -multiclass sve2_char_match { +multiclass sve2_char_match { def _B : sve2_char_match<0b0, opc, asm, PPR8, ZPR8>; def _H : sve2_char_match<0b1, opc, asm, PPR16, ZPR16>; + + def : SVE_3_Op_Pat(NAME # _B)>; + def : SVE_3_Op_Pat(NAME # _H)>; } //===----------------------------------------------------------------------===// // SVE2 Histogram Computation - Segment Group //===----------------------------------------------------------------------===// -class sve2_hist_gen_segment +class sve2_hist_gen_segment : I<(outs ZPR8:$Zd), (ins ZPR8:$Zn, ZPR8:$Zm), asm, "\t$Zd, $Zn, $Zm", "", - []>, Sched<[]> { + [(set nxv16i8:$Zd, (op nxv16i8:$Zn, nxv16i8:$Zm))]>, Sched<[]> { bits<5> Zd; bits<5> Zn; bits<5> Zm; @@ -6865,9 +6868,12 @@ let Inst{4-0} = Zd; } -multiclass sve2_hist_gen_vector { +multiclass sve2_hist_gen_vector { def _S : sve2_hist_gen_vector<0b0, asm, ZPR32>; def _D : sve2_hist_gen_vector<0b1, asm, ZPR64>; + + def : SVE_3_Op_Pat(NAME # _S)>; + def : SVE_3_Op_Pat(NAME # _D)>; } //===----------------------------------------------------------------------===// Index: llvm/test/CodeGen/AArch64/sve2-intrinsics-character-match.ll =================================================================== --- /dev/null +++ llvm/test/CodeGen/AArch64/sve2-intrinsics-character-match.ll @@ -0,0 +1,54 @@ +; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 -asm-verbose=0 < %s | FileCheck %s + +; +; MATCH +; + +define @match_i8( %pg, %a, %b) { +; CHECK-LABEL: match_i8: +; CHECK: match p0.b, p0/z, z0.b, z1.b +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.match.nxv16i8( %pg, + %a, + %b) + ret %out +} + +define @match_i16( %pg, %a, %b) { +; CHECK-LABEL: match_i16: +; CHECK: match p0.h, p0/z, z0.h, z1.h +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.match.nxv8i16( %pg, + %a, + %b) + ret %out +} + +; +; NMATCH +; + +define @nmatch_i8( %pg, %a, %b) { +; CHECK-LABEL: nmatch_i8: +; CHECK: match p0.b, p0/z, z0.b, z1.b +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.nmatch.nxv16i8( %pg, + %a, + %b) + ret %out +} + +define @nmatch_i16( %pg, %a, %b) { +; CHECK-LABEL: nmatch_i16: +; CHECK: match p0.h, p0/z, z0.h, z1.h +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.nmatch.nxv8i16( %pg, + %a, + %b) + ret %out +} + +declare @llvm.aarch64.sve.match.nxv16i8(, , ) +declare @llvm.aarch64.sve.match.nxv8i16(, , ) +declare @llvm.aarch64.sve.nmatch.nxv16i8(, , ) +declare @llvm.aarch64.sve.nmatch.nxv8i16(, , ) Index: llvm/test/CodeGen/AArch64/sve2-intrinsics-vec-hist-count.ll =================================================================== --- /dev/null +++ llvm/test/CodeGen/AArch64/sve2-intrinsics-vec-hist-count.ll @@ -0,0 +1,42 @@ +; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 -asm-verbose=0 < %s | FileCheck %s + +; +; HISTCNT +; + +define @histcnt_i32( %pg, %a, %b) { +; CHECK-LABEL: histcnt_i32: +; CHECK: histcnt z0.s, p0/z, z0.s, z1.s +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.histcnt.nxv4i32( %pg, + %a, + %b) + ret %out +} + +define @histcnt_i64( %pg, %a, %b) { +; CHECK-LABEL: histcnt_i64: +; CHECK: histcnt z0.d, p0/z, z0.d, z1.d +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.histcnt.nxv2i64( %pg, + %a, + %b) + ret %out +} + +; +; HISTSEG +; + +define @histseg( %a, %b) { +; CHECK-LABEL: histseg: +; CHECK: histseg z0.b, z0.b, z1.b +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.histseg.nxv16i8( %a, + %b) + ret %out +} + +declare @llvm.aarch64.sve.histcnt.nxv4i32(, , ) +declare @llvm.aarch64.sve.histcnt.nxv2i64(, , ) +declare @llvm.aarch64.sve.histseg.nxv16i8(, )