diff --git a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
--- a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
+++ b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
@@ -723,18 +723,14 @@
     return false;
   }
 
-  SmallPtrSet<MachineInstr*, 2> Ignore = { LoLoop.End };
-  SmallPtrSet<MachineInstr*, 4> Remove;
-  if (!RDA->isSafeToRemove(LoLoop.Dec, Remove, Ignore)) {
-    LLVM_DEBUG(dbgs() << "ARM Loops: Unable to remove loop count chain.\n");
+  // Check that the only instruction using LoopDec is LoopEnd.
+  // TODO: Check for copy chains that really have no effect.
+  SmallPtrSet<MachineInstr*, 2> Uses;
+  RDA->getReachingLocalUses(LoLoop.Dec, ARM::LR, Uses);
+  if (Uses.size() > 1 || !Uses.count(LoLoop.End)) {
+    LLVM_DEBUG(dbgs() << "ARM Loops: Unable to remove LoopDec.\n");
     LoLoop.Revert = true;
-  } else {
-    LLVM_DEBUG(dbgs() << "ARM Loops: Will need to remove:\n";
-               for (auto *I : Remove)
-                 dbgs() << " - " << *I);
-    LoLoop.ToRemove.insert(Remove.begin(), Remove.end());
   }
-
   LoLoop.CheckLegality(BBUtils.get());
   Expand(LoLoop);
   return true;
@@ -970,6 +966,7 @@
     MIB.add(End->getOperand(0));
     MIB.add(End->getOperand(1));
     LLVM_DEBUG(dbgs() << "ARM Loops: Inserted LE: " << *MIB);
+    LoLoop.Dec->eraseFromParent();
     End->eraseFromParent();
     return &*MIB;
   };
diff --git a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-copy-chain.mir b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-copy-chain.mir
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-copy-chain.mir
@@ -0,0 +1,483 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=thumbv8.1m.main -run-pass=arm-low-overhead-loops %s -o - --verify-machineinstrs | FileCheck %s
+
+--- |
+  define dso_local arm_aapcscc void @test1(i32* nocapture %arg, i32* nocapture readonly %arg1, i32* nocapture readonly %arg2, i32 %arg3) {
+  bb:
+    %tmp = icmp eq i32 %arg3, 0
+    br i1 %tmp, label %bb27, label %bb4
+
+  bb4:                                              ; preds = %bb
+    %tmp5 = add i32 %arg3, -1
+    %tmp6 = and i32 %arg3, 3
+    %tmp7 = icmp ult i32 %tmp5, 3
+    %tmp8 = add i32 %arg3, -4
+    %tmp9 = sub i32 %tmp8, %tmp6
+    %tmp10 = lshr i32 %tmp9, 2
+    %tmp11 = add nuw nsw i32 %tmp10, 1
+    br i1 %tmp7, label %bb13, label %bb12
+
+  bb12:                                             ; preds = %bb4
+    call void @llvm.set.loop.iterations.i32(i32 %tmp11)
+    br label %bb28
+
+  bb13:                                             ; preds = %bb28, %bb4
+    %tmp14 = phi i32 [ 0, %bb4 ], [ %tmp54, %bb28 ]
+    %exit.count = phi i32 [ 0, %bb4 ], [ %loop.dec, %bb28 ]
+    %tmp15 = icmp eq i32 %tmp6, 0
+    br i1 %tmp15, label %bb27, label %bb16
+
+  bb16:                                             ; preds = %bb13
+    %tmp17 = getelementptr inbounds i32, i32* %arg1, i32 %tmp14
+    %tmp18 = load i32, i32* %tmp17, align 4
+    %tmp19 = getelementptr inbounds i32, i32* %arg2, i32 %tmp14
+    %tmp20 = load i32, i32* %tmp19, align 4
+    %tmp21 = xor i32 %tmp20, %tmp18
+    %tmp22 = getelementptr inbounds i32, i32* %arg, i32 %tmp14
+    %tmp23 = load i32, i32* %tmp22, align 4
+    %tmp24 = add nsw i32 %tmp23, %tmp21
+    store i32 %tmp24, i32* %tmp22, align 4
+    %tmp25 = add nuw i32 %tmp14, 1
+    %tmp26 = icmp eq i32 %tmp6, 1
+    br i1 %tmp26, label %bb27, label %bb57
+
+  bb27:                                             ; preds = %bb68, %bb57, %bb16, %bb13, %bb
+    ret void
+
+  bb28:                                             ; preds = %bb28, %bb12
+    %lsr.iv15 = phi i32 [ %lsr.iv.next16, %bb28 ], [ %tmp11, %bb12 ]
+    %lsr.iv = phi i32 [ %lsr.iv.next, %bb28 ], [ 0, %bb12 ]
+    %tmp29 = phi i32 [ 0, %bb12 ], [ %tmp54, %bb28 ]
+    %0 = bitcast i32* %arg1 to i8*
+    %1 = bitcast i32* %arg2 to i8*
+    %2 = bitcast i32* %arg to i8*
+    %uglygep14 = getelementptr i8, i8* %0, i32 %lsr.iv
+    %uglygep1415 = bitcast i8* %uglygep14 to i32*
+    %scevgep617 = bitcast i32* %uglygep1415 to i32*
+    %tmp34 = load i32, i32* %scevgep617, align 4
+    %uglygep8 = getelementptr i8, i8* %1, i32 %lsr.iv
+    %uglygep89 = bitcast i8* %uglygep8 to i32*
+    %scevgep418 = bitcast i32* %uglygep89 to i32*
+    %tmp35 = load i32, i32* %scevgep418, align 4
+    %tmp36 = xor i32 %tmp35, %tmp34
+    %uglygep2 = getelementptr i8, i8* %2, i32 %lsr.iv
+    %uglygep23 = bitcast i8* %uglygep2 to i32*
+    %scevgep219 = bitcast i32* %uglygep23 to i32*
+    %tmp37 = load i32, i32* %scevgep219, align 4
+    %tmp38 = add nsw i32 %tmp37, %tmp36
+    store i32 %tmp38, i32* %scevgep219, align 4
+    %uglygep33 = getelementptr i8, i8* %0, i32 %lsr.iv
+    %uglygep3334 = bitcast i8* %uglygep33 to i32*
+    %scevgep14 = getelementptr i32, i32* %uglygep3334, i32 1
+    %tmp39 = load i32, i32* %scevgep14, align 4
+    %uglygep27 = getelementptr i8, i8* %1, i32 %lsr.iv
+    %uglygep2728 = bitcast i8* %uglygep27 to i32*
+    %scevgep11 = getelementptr i32, i32* %uglygep2728, i32 1
+    %tmp40 = load i32, i32* %scevgep11, align 4
+    %tmp41 = xor i32 %tmp40, %tmp39
+    %uglygep20 = getelementptr i8, i8* %2, i32 %lsr.iv
+    %uglygep2021 = bitcast i8* %uglygep20 to i32*
+    %scevgep9 = getelementptr i32, i32* %uglygep2021, i32 1
+    %tmp42 = load i32, i32* %scevgep9, align 4
+    %tmp43 = add nsw i32 %tmp42, %tmp41
+    store i32 %tmp43, i32* %scevgep9, align 4
+    %uglygep30 = getelementptr i8, i8* %0, i32 %lsr.iv
+    %uglygep3031 = bitcast i8* %uglygep30 to i32*
+    %scevgep12 = getelementptr i32, i32* %uglygep3031, i32 2
+    %tmp44 = load i32, i32* %scevgep12, align 4
+    %uglygep24 = getelementptr i8, i8* %1, i32 %lsr.iv
+    %uglygep2425 = bitcast i8* %uglygep24 to i32*
+    %scevgep10 = getelementptr i32, i32* %uglygep2425, i32 2
+    %tmp45 = load i32, i32* %scevgep10, align 4
+    %tmp46 = xor i32 %tmp45, %tmp44
+    %uglygep17 = getelementptr i8, i8* %2, i32 %lsr.iv
+    %uglygep1718 = bitcast i8* %uglygep17 to i32*
+    %scevgep8 = getelementptr i32, i32* %uglygep1718, i32 2
+    %tmp47 = load i32, i32* %scevgep8, align 4
+    %tmp48 = add nsw i32 %tmp47, %tmp46
+    store i32 %tmp48, i32* %scevgep8, align 4
+    %uglygep11 = getelementptr i8, i8* %0, i32 %lsr.iv
+    %uglygep1112 = bitcast i8* %uglygep11 to i32*
+    %scevgep5 = getelementptr i32, i32* %uglygep1112, i32 3
+    %tmp49 = load i32, i32* %scevgep5, align 4
+    %uglygep5 = getelementptr i8, i8* %1, i32 %lsr.iv
+    %uglygep56 = bitcast i8* %uglygep5 to i32*
+    %scevgep3 = getelementptr i32, i32* %uglygep56, i32 3
+    %tmp50 = load i32, i32* %scevgep3, align 4
+    %tmp51 = xor i32 %tmp50, %tmp49
+    %uglygep = getelementptr i8, i8* %2, i32 %lsr.iv
+    %uglygep1 = bitcast i8* %uglygep to i32*
+    %scevgep1 = getelementptr i32, i32* %uglygep1, i32 3
+    %tmp52 = load i32, i32* %scevgep1, align 4
+    %tmp53 = add nsw i32 %tmp52, %tmp51
+    store i32 %tmp53, i32* %scevgep1, align 4
+    %tmp54 = add nuw i32 %tmp29, 4
+    %lsr.iv.next = add i32 %lsr.iv, 16
+    %loop.dec = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %lsr.iv15, i32 1)
+    %tmp56 = icmp ne i32 %loop.dec, 0
+    %lsr.iv.next16 = add nsw i32 %lsr.iv15, -1
+    br i1 %tmp56, label %bb28, label %bb13
+
+  bb57:                                             ; preds = %bb16
+    %tmp58 = getelementptr inbounds i32, i32* %arg1, i32 %tmp25
+    %tmp59 = load i32, i32* %tmp58, align 4
+    %tmp60 = getelementptr inbounds i32, i32* %arg2, i32 %tmp25
+    %tmp61 = load i32, i32* %tmp60, align 4
+    %tmp62 = xor i32 %tmp61, %tmp59
+    %tmp63 = getelementptr inbounds i32, i32* %arg, i32 %tmp25
+    %tmp64 = load i32, i32* %tmp63, align 4
+    %tmp65 = add nsw i32 %tmp64, %tmp62
+    store i32 %tmp65, i32* %tmp63, align 4
+    %tmp66 = add nuw i32 %tmp14, 2
+    %tmp67 = icmp eq i32 %tmp6, 2
+    br i1 %tmp67, label %bb27, label %bb68
+
+  bb68:                                             ; preds = %bb57
+    %tmp69 = getelementptr inbounds i32, i32* %arg1, i32 %tmp66
+    %tmp70 = load i32, i32* %tmp69, align 4
+    %tmp71 = getelementptr inbounds i32, i32* %arg2, i32 %tmp66
+    %tmp72 = load i32, i32* %tmp71, align 4
+    %tmp73 = xor i32 %tmp72, %tmp70
+    %tmp74 = getelementptr inbounds i32, i32* %arg, i32 %tmp66
+    %tmp75 = load i32, i32* %tmp74, align 4
+    %tmp76 = add nsw i32 %tmp75, %tmp73
+    store i32 %tmp76, i32* %tmp74, align 4
+    br label %bb27
+  }
+
+  declare void @llvm.set.loop.iterations.i32(i32)
+  declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32)
+
+...
+---
+name:            test1
+alignment:       2
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+failedISel:      false
+tracksRegLiveness: true
+hasWinCFI:       false
+registers:       []
+liveins:
+  - { reg: '$r0', virtual-reg: '' }
+  - { reg: '$r1', virtual-reg: '' }
+  - { reg: '$r2', virtual-reg: '' }
+  - { reg: '$r3', virtual-reg: '' }
+frameInfo:
+  isFrameAddressTaken: false
+  isReturnAddressTaken: false
+  hasStackMap:     false
+  hasPatchPoint:   false
+  stackSize:       40
+  offsetAdjustment: 0
+  maxAlignment:    4
+  adjustsStack:    false
+  hasCalls:        false
+  stackProtector:  ''
+  maxCallFrameSize: 0
+  cvBytesOfCalleeSavedRegisters: 0
+  hasOpaqueSPAdjustment: false
+  hasVAStart:      false
+  hasMustTailInVarArgFunc: false
+  localFrameSize:  0
+  savePoint:       ''
+  restorePoint:    ''
+fixedStack:      []
+stack:
+  - { id: 0, name: '', type: spill-slot, offset: -40, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 1, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 2, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r11', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 3, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r10', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 4, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r9', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 5, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r8', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 6, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 7, name: '', type: spill-slot, offset: -28, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 8, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 9, name: '', type: spill-slot, offset: -36, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+callSites:       []
+constants:       []
+machineFunctionInfo: {}
+body:             |
+  ; CHECK-LABEL: name: test1
+  ; CHECK: bb.0.bb:
+  ; CHECK:   successors: %bb.8(0x30000000), %bb.1(0x50000000)
+  ; CHECK:   liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11
+  ; CHECK:   $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr
+  ; CHECK:   frame-setup CFI_INSTRUCTION def_cfa_offset 36
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $lr, -4
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r11, -8
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r10, -12
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r9, -16
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r8, -20
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r7, -24
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r6, -28
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r5, -32
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r4, -36
+  ; CHECK:   $sp = frame-setup tSUBspi $sp, 1, 14, $noreg
+  ; CHECK:   frame-setup CFI_INSTRUCTION def_cfa_offset 40
+  ; CHECK:   tCMPi8 renamable $r3, 0, 14, $noreg, implicit-def $cpsr
+  ; CHECK:   tBcc %bb.8, 0, killed $cpsr
+  ; CHECK: bb.1.bb4:
+  ; CHECK:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
+  ; CHECK:   liveins: $r0, $r1, $r2, $r3
+  ; CHECK:   renamable $r4, dead $cpsr = tSUBi3 renamable $r3, 1, 14, $noreg
+  ; CHECK:   renamable $r7 = t2ANDri renamable $r3, 3, 14, $noreg, $noreg
+  ; CHECK:   tCMPi8 killed renamable $r4, 3, 14, $noreg, implicit-def $cpsr
+  ; CHECK:   tSTRspi killed renamable $r7, $sp, 0, 14, $noreg :: (store 4 into %stack.0)
+  ; CHECK:   tBcc %bb.3, 2, killed $cpsr
+  ; CHECK: bb.2:
+  ; CHECK:   successors: %bb.5(0x80000000)
+  ; CHECK:   liveins: $r0, $r1, $r2
+  ; CHECK:   renamable $r8 = t2MOVi 0, 14, $noreg, $noreg
+  ; CHECK:   tB %bb.5, 14, $noreg
+  ; CHECK: bb.3.bb12:
+  ; CHECK:   successors: %bb.4(0x80000000)
+  ; CHECK:   liveins: $r0, $r1, $r2, $r3
+  ; CHECK:   renamable $r3 = t2BICri killed renamable $r3, 3, 14, $noreg, $noreg
+  ; CHECK:   renamable $r4, dead $cpsr = tMOVi8 1, 14, $noreg
+  ; CHECK:   renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14, $noreg
+  ; CHECK:   renamable $r8 = t2MOVi 0, 14, $noreg, $noreg
+  ; CHECK:   renamable $r3 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg
+  ; CHECK:   $r12 = tMOVr killed $r3, 14, $noreg
+  ; CHECK:   renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg
+  ; CHECK: bb.4.bb28:
+  ; CHECK:   successors: %bb.4(0x7c000000), %bb.5(0x04000000)
+  ; CHECK:   liveins: $r0, $r1, $r2, $r3, $r8, $r12
+  ; CHECK:   renamable $r5 = tLDRr renamable $r1, $r3, 14, $noreg :: (load 4 from %ir.scevgep617)
+  ; CHECK:   renamable $r7, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14, $noreg
+  ; CHECK:   renamable $r6 = tLDRr renamable $r2, $r3, 14, $noreg :: (load 4 from %ir.scevgep418)
+  ; CHECK:   $lr = tMOVr killed $r12, 14, $noreg
+  ; CHECK:   renamable $r8 = nuw t2ADDri killed renamable $r8, 4, 14, $noreg, $noreg
+  ; CHECK:   renamable $r5, dead $cpsr = tEOR killed renamable $r5, killed renamable $r6, 14, $noreg
+  ; CHECK:   renamable $r6 = tLDRr renamable $r0, $r3, 14, $noreg :: (load 4 from %ir.scevgep219)
+  ; CHECK:   $lr = t2SUBri killed renamable $lr, 1, 14, $noreg, $noreg
+  ; CHECK:   $r12 = tMOVr $lr, 14, $noreg
+  ; CHECK:   renamable $r5 = nsw tADDhirr killed renamable $r5, killed renamable $r6, 14, $noreg
+  ; CHECK:   tSTRr killed renamable $r5, renamable $r0, $r3, 14, $noreg :: (store 4 into %ir.scevgep219)
+  ; CHECK:   renamable $r5, dead $cpsr = tADDrr renamable $r1, renamable $r3, 14, $noreg
+  ; CHECK:   renamable $r4 = tLDRi renamable $r7, 1, 14, $noreg :: (load 4 from %ir.scevgep11)
+  ; CHECK:   renamable $r6 = tLDRi renamable $r5, 1, 14, $noreg :: (load 4 from %ir.scevgep14)
+  ; CHECK:   renamable $r9 = t2EORrr killed renamable $r4, killed renamable $r6, 14, $noreg, $noreg
+  ; CHECK:   renamable $r6, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14, $noreg
+  ; CHECK:   $r11 = t2ADDri $r6, 4, 14, $noreg, $noreg
+  ; CHECK:   renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 16, 14, $noreg
+  ; CHECK:   t2LDMIA killed $r11, 14, $noreg, def $r4, def $r10, def $r11 :: (load 4 from %ir.scevgep9), (load 4 from %ir.scevgep8), (load 4 from %ir.scevgep1)
+  ; CHECK:   renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r9, 14, $noreg
+  ; CHECK:   tSTRi killed renamable $r4, renamable $r6, 1, 14, $noreg :: (store 4 into %ir.scevgep9)
+  ; CHECK:   renamable $r9 = t2LDRi12 renamable $r5, 8, 14, $noreg :: (load 4 from %ir.scevgep12)
+  ; CHECK:   renamable $r4 = tLDRi renamable $r7, 2, 14, $noreg :: (load 4 from %ir.scevgep10)
+  ; CHECK:   renamable $r4 = t2EORrr killed renamable $r4, killed renamable $r9, 14, $noreg, $noreg
+  ; CHECK:   renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r10, 14, $noreg
+  ; CHECK:   tSTRi killed renamable $r4, renamable $r6, 2, 14, $noreg :: (store 4 into %ir.scevgep8)
+  ; CHECK:   renamable $r4 = tLDRi killed renamable $r5, 3, 14, $noreg :: (load 4 from %ir.scevgep5)
+  ; CHECK:   renamable $r5 = tLDRi killed renamable $r7, 3, 14, $noreg :: (load 4 from %ir.scevgep3)
+  ; CHECK:   renamable $r4, dead $cpsr = tEOR killed renamable $r4, killed renamable $r5, 14, $noreg
+  ; CHECK:   renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r11, 14, $noreg
+  ; CHECK:   tSTRi killed renamable $r4, killed renamable $r6, 3, 14, $noreg :: (store 4 into %ir.scevgep1)
+  ; CHECK:   t2CMPri killed $lr, 0, 14, $noreg, implicit-def $cpsr
+  ; CHECK:   tBcc %bb.4, 1, killed $cpsr
+  ; CHECK:   tB %bb.5, 14, $noreg
+  ; CHECK: bb.5.bb13:
+  ; CHECK:   successors: %bb.8(0x30000000), %bb.6(0x50000000)
+  ; CHECK:   liveins: $r0, $r1, $r2, $r8
+  ; CHECK:   renamable $r5 = tLDRspi $sp, 0, 14, $noreg :: (load 4 from %stack.0)
+  ; CHECK:   tCBZ $r5, %bb.8
+  ; CHECK: bb.6.bb16:
+  ; CHECK:   successors: %bb.8(0x40000000), %bb.7(0x40000000)
+  ; CHECK:   liveins: $r0, $r1, $r2, $r5, $r8
+  ; CHECK:   renamable $lr = t2LDRs renamable $r1, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp17)
+  ; CHECK:   tCMPi8 renamable $r5, 1, 14, $noreg, implicit-def $cpsr
+  ; CHECK:   renamable $r3 = t2LDRs renamable $r2, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp19)
+  ; CHECK:   renamable $lr = t2EORrr killed renamable $lr, killed renamable $r3, 14, $noreg, $noreg
+  ; CHECK:   renamable $r3 = t2LDRs renamable $r0, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp22)
+  ; CHECK:   renamable $r3 = nsw tADDhirr killed renamable $r3, killed renamable $lr, 14, $noreg
+  ; CHECK:   t2STRs killed renamable $r3, renamable $r0, renamable $r8, 2, 14, $noreg :: (store 4 into %ir.tmp22)
+  ; CHECK:   tBcc %bb.8, 0, killed $cpsr
+  ; CHECK: bb.7.bb57:
+  ; CHECK:   successors: %bb.8(0x40000000), %bb.9(0x40000000)
+  ; CHECK:   liveins: $r0, $r1, $r2, $r5, $r8
+  ; CHECK:   renamable $r3 = nuw t2ADDri renamable $r8, 1, 14, $noreg, $noreg
+  ; CHECK:   tCMPi8 killed renamable $r5, 2, 14, $noreg, implicit-def $cpsr
+  ; CHECK:   renamable $r7 = t2LDRs renamable $r1, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp58)
+  ; CHECK:   renamable $r6 = t2LDRs renamable $r2, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp60)
+  ; CHECK:   renamable $r7 = t2EORrr killed renamable $r7, killed renamable $r6, 14, $noreg, $noreg
+  ; CHECK:   renamable $r6 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp63)
+  ; CHECK:   renamable $r7 = nsw tADDhirr killed renamable $r7, killed renamable $r6, 14, $noreg
+  ; CHECK:   t2STRs killed renamable $r7, renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store 4 into %ir.tmp63)
+  ; CHECK:   tBcc %bb.9, 1, killed $cpsr
+  ; CHECK: bb.8.bb27:
+  ; CHECK:   $sp = tADDspi $sp, 1, 14, $noreg
+  ; CHECK:   $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc
+  ; CHECK: bb.9.bb68:
+  ; CHECK:   liveins: $r0, $r1, $r2, $r8
+  ; CHECK:   renamable $r3 = nuw t2ADDri killed renamable $r8, 2, 14, $noreg, $noreg
+  ; CHECK:   renamable $r1 = t2LDRs killed renamable $r1, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp69)
+  ; CHECK:   renamable $r2 = t2LDRs killed renamable $r2, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp71)
+  ; CHECK:   renamable $r1, dead $cpsr = tEOR killed renamable $r1, killed renamable $r2, 14, $noreg
+  ; CHECK:   renamable $r2 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp74)
+  ; CHECK:   renamable $r1 = nsw tADDhirr killed renamable $r1, killed renamable $r2, 14, $noreg
+  ; CHECK:   t2STRs killed renamable $r1, killed renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store 4 into %ir.tmp74)
+  ; CHECK:   $sp = tADDspi $sp, 1, 14, $noreg
+  ; CHECK:   $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc
+  bb.0.bb:
+    successors: %bb.8(0x30000000), %bb.1(0x50000000)
+    liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $lr
+
+    $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr
+    frame-setup CFI_INSTRUCTION def_cfa_offset 36
+    frame-setup CFI_INSTRUCTION offset $lr, -4
+    frame-setup CFI_INSTRUCTION offset $r11, -8
+    frame-setup CFI_INSTRUCTION offset $r10, -12
+    frame-setup CFI_INSTRUCTION offset $r9, -16
+    frame-setup CFI_INSTRUCTION offset $r8, -20
+    frame-setup CFI_INSTRUCTION offset $r7, -24
+    frame-setup CFI_INSTRUCTION offset $r6, -28
+    frame-setup CFI_INSTRUCTION offset $r5, -32
+    frame-setup CFI_INSTRUCTION offset $r4, -36
+    $sp = frame-setup tSUBspi $sp, 1, 14, $noreg
+    frame-setup CFI_INSTRUCTION def_cfa_offset 40
+    tCMPi8 renamable $r3, 0, 14, $noreg, implicit-def $cpsr
+    tBcc %bb.8, 0, killed $cpsr
+
+  bb.1.bb4:
+    successors: %bb.2(0x40000000), %bb.3(0x40000000)
+    liveins: $r0, $r1, $r2, $r3
+
+    renamable $r4, dead $cpsr = tSUBi3 renamable $r3, 1, 14, $noreg
+    renamable $r7 = t2ANDri renamable $r3, 3, 14, $noreg, $noreg
+    tCMPi8 killed renamable $r4, 3, 14, $noreg, implicit-def $cpsr
+    tSTRspi killed renamable $r7, $sp, 0, 14, $noreg :: (store 4 into %stack.0)
+    tBcc %bb.3, 2, killed $cpsr
+
+  bb.2:
+    successors: %bb.5(0x80000000)
+    liveins: $r0, $r1, $r2
+
+    renamable $r8 = t2MOVi 0, 14, $noreg, $noreg
+    tB %bb.5, 14, $noreg
+
+  bb.3.bb12:
+    successors: %bb.4(0x80000000)
+    liveins: $r0, $r1, $r2, $r3
+
+    renamable $r3 = t2BICri killed renamable $r3, 3, 14, $noreg, $noreg
+    renamable $r4, dead $cpsr = tMOVi8 1, 14, $noreg
+    renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14, $noreg
+    renamable $r8 = t2MOVi 0, 14, $noreg, $noreg
+    renamable $r3 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg
+    t2DoLoopStart renamable $r3
+    $r12 = tMOVr killed $r3, 14, $noreg
+    renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg
+
+  bb.4.bb28:
+    successors: %bb.4(0x7c000000), %bb.5(0x04000000)
+    liveins: $r0, $r1, $r2, $r3, $r8, $r12
+
+    renamable $r5 = tLDRr renamable $r1, $r3, 14, $noreg :: (load 4 from %ir.scevgep617)
+    renamable $r7, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14, $noreg
+    renamable $r6 = tLDRr renamable $r2, $r3, 14, $noreg :: (load 4 from %ir.scevgep418)
+    $lr = tMOVr $r12, 14, $noreg
+    renamable $r8 = nuw t2ADDri killed renamable $r8, 4, 14, $noreg, $noreg
+    renamable $r5, dead $cpsr = tEOR killed renamable $r5, killed renamable $r6, 14, $noreg
+    renamable $r6 = tLDRr renamable $r0, $r3, 14, $noreg :: (load 4 from %ir.scevgep219)
+    renamable $lr = t2LoopDec killed renamable $lr, 1
+    $r12 = tMOVr $lr, 14, $noreg
+    renamable $r5 = nsw tADDhirr killed renamable $r5, killed renamable $r6, 14, $noreg
+    tSTRr killed renamable $r5, renamable $r0, $r3, 14, $noreg :: (store 4 into %ir.scevgep219)
+    renamable $r5, dead $cpsr = tADDrr renamable $r1, renamable $r3, 14, $noreg
+    renamable $r4 = tLDRi renamable $r7, 1, 14, $noreg :: (load 4 from %ir.scevgep11)
+    renamable $r6 = tLDRi renamable $r5, 1, 14, $noreg :: (load 4 from %ir.scevgep14)
+    renamable $r9 = t2EORrr killed renamable $r4, killed renamable $r6, 14, $noreg, $noreg
+    renamable $r6, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14, $noreg
+    $r11 = t2ADDri $r6, 4, 14, $noreg, $noreg
+    renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 16, 14, $noreg
+    t2LDMIA killed $r11, 14, $noreg, def $r4, def $r10, def $r11 :: (load 4 from %ir.scevgep9), (load 4 from %ir.scevgep8), (load 4 from %ir.scevgep1)
+    renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r9, 14, $noreg
+    tSTRi killed renamable $r4, renamable $r6, 1, 14, $noreg :: (store 4 into %ir.scevgep9)
+    renamable $r9 = t2LDRi12 renamable $r5, 8, 14, $noreg :: (load 4 from %ir.scevgep12)
+    renamable $r4 = tLDRi renamable $r7, 2, 14, $noreg :: (load 4 from %ir.scevgep10)
+    renamable $r4 = t2EORrr killed renamable $r4, killed renamable $r9, 14, $noreg, $noreg
+    renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r10, 14, $noreg
+    tSTRi killed renamable $r4, renamable $r6, 2, 14, $noreg :: (store 4 into %ir.scevgep8)
+    renamable $r4 = tLDRi killed renamable $r5, 3, 14, $noreg :: (load 4 from %ir.scevgep5)
+    renamable $r5 = tLDRi killed renamable $r7, 3, 14, $noreg :: (load 4 from %ir.scevgep3)
+    renamable $r4, dead $cpsr = tEOR killed renamable $r4, killed renamable $r5, 14, $noreg
+    renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r11, 14, $noreg
+    tSTRi killed renamable $r4, killed renamable $r6, 3, 14, $noreg :: (store 4 into %ir.scevgep1)
+    t2LoopEnd killed renamable $lr, %bb.4, implicit-def dead $cpsr
+    tB %bb.5, 14, $noreg
+
+  bb.5.bb13:
+    successors: %bb.8(0x30000000), %bb.6(0x50000000)
+    liveins: $r0, $r1, $r2, $r8
+
+    renamable $r5 = tLDRspi $sp, 0, 14, $noreg :: (load 4 from %stack.0)
+    tCBZ $r5, %bb.8
+
+  bb.6.bb16:
+    successors: %bb.8(0x40000000), %bb.7(0x40000000)
+    liveins: $r0, $r1, $r2, $r5, $r8
+
+    renamable $lr = t2LDRs renamable $r1, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp17)
+    tCMPi8 renamable $r5, 1, 14, $noreg, implicit-def $cpsr
+    renamable $r3 = t2LDRs renamable $r2, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp19)
+    renamable $lr = t2EORrr killed renamable $lr, killed renamable $r3, 14, $noreg, $noreg
+    renamable $r3 = t2LDRs renamable $r0, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp22)
+    renamable $r3 = nsw tADDhirr killed renamable $r3, killed renamable $lr, 14, $noreg
+    t2STRs killed renamable $r3, renamable $r0, renamable $r8, 2, 14, $noreg :: (store 4 into %ir.tmp22)
+    tBcc %bb.8, 0, killed $cpsr
+
+  bb.7.bb57:
+    successors: %bb.8(0x40000000), %bb.9(0x40000000)
+    liveins: $r0, $r1, $r2, $r5, $r8
+
+    renamable $r3 = nuw t2ADDri renamable $r8, 1, 14, $noreg, $noreg
+    tCMPi8 killed renamable $r5, 2, 14, $noreg, implicit-def $cpsr
+    renamable $r7 = t2LDRs renamable $r1, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp58)
+    renamable $r6 = t2LDRs renamable $r2, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp60)
+    renamable $r7 = t2EORrr killed renamable $r7, killed renamable $r6, 14, $noreg, $noreg
+    renamable $r6 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp63)
+    renamable $r7 = nsw tADDhirr killed renamable $r7, killed renamable $r6, 14, $noreg
+    t2STRs killed renamable $r7, renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store 4 into %ir.tmp63)
+    tBcc %bb.9, 1, killed $cpsr
+
+  bb.8.bb27:
+    $sp = tADDspi $sp, 1, 14, $noreg
+    $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc
+
+  bb.9.bb68:
+    liveins: $r0, $r1, $r2, $r8
+
+    renamable $r3 = nuw t2ADDri killed renamable $r8, 2, 14, $noreg, $noreg
+    renamable $r1 = t2LDRs killed renamable $r1, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp69)
+    renamable $r2 = t2LDRs killed renamable $r2, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp71)
+    renamable $r1, dead $cpsr = tEOR killed renamable $r1, killed renamable $r2, 14, $noreg
+    renamable $r2 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp74)
+    renamable $r1 = nsw tADDhirr killed renamable $r1, killed renamable $r2, 14, $noreg
+    t2STRs killed renamable $r1, killed renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store 4 into %ir.tmp74)
+    $sp = tADDspi $sp, 1, 14, $noreg
+    $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc
+
+...
diff --git a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-copy-prev-iteration.mir b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-copy-prev-iteration.mir
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-copy-prev-iteration.mir
@@ -0,0 +1,514 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=thumbv8.1m.main -run-pass=arm-low-overhead-loops %s -o - --verify-machineinstrs | FileCheck %s
+
+--- |
+  define dso_local arm_aapcscc i32 @test1(i32* nocapture %arg, i32* nocapture readonly %arg1, i32* nocapture readonly %arg2, i32 %arg3) {
+  bb:
+    %tmp = icmp eq i32 %arg3, 0
+    br i1 %tmp, label %bb27, label %bb4
+
+  bb4:                                              ; preds = %bb
+    %tmp5 = add i32 %arg3, -1
+    %tmp6 = and i32 %arg3, 3
+    %tmp7 = icmp ult i32 %tmp5, 3
+    %tmp8 = add i32 %arg3, -4
+    %tmp9 = sub i32 %tmp8, %tmp6
+    %tmp10 = lshr i32 %tmp9, 2
+    %tmp11 = add nuw nsw i32 %tmp10, 1
+    br i1 %tmp7, label %bb13, label %bb12
+
+  bb12:                                             ; preds = %bb4
+    call void @llvm.set.loop.iterations.i32(i32 %tmp11)
+    br label %bb28
+
+  bb13:                                             ; preds = %bb28, %bb4
+    %tmp14 = phi i32 [ 0, %bb4 ], [ %tmp54, %bb28 ]
+    %exit.count = phi i32 [ 0, %bb4 ], [ %loop.dec, %bb28 ]
+    %tmp15 = icmp eq i32 %tmp6, 0
+    br i1 %tmp15, label %bb27, label %bb16
+
+  bb16:                                             ; preds = %bb13
+    %tmp17 = getelementptr inbounds i32, i32* %arg1, i32 %tmp14
+    %tmp18 = load i32, i32* %tmp17, align 4
+    %tmp19 = getelementptr inbounds i32, i32* %arg2, i32 %tmp14
+    %tmp20 = load i32, i32* %tmp19, align 4
+    %tmp21 = xor i32 %tmp20, %tmp18
+    %tmp22 = getelementptr inbounds i32, i32* %arg, i32 %tmp14
+    %tmp23 = load i32, i32* %tmp22, align 4
+    %tmp24 = add nsw i32 %tmp23, %tmp21
+    store i32 %tmp24, i32* %tmp22, align 4
+    %tmp25 = add nuw i32 %tmp14, 1
+    %tmp26 = icmp eq i32 %tmp6, 1
+    br i1 %tmp26, label %bb27, label %bb57
+
+  bb27:                                             ; preds = %bb68, %bb57, %bb16, %bb13, %bb
+    %res = phi i32 [ %exit.count, %bb13 ], [ 3, %bb68 ], [ 2, %bb57 ], [ 1, %bb16 ], [ 0, %bb ]
+    ret i32 %res
+
+  bb28:                                             ; preds = %bb28, %bb12
+    %lsr.iv15 = phi i32 [ %lsr.iv.next16, %bb28 ], [ %tmp11, %bb12 ]
+    %lsr.iv = phi i32 [ %lsr.iv.next, %bb28 ], [ 0, %bb12 ]
+    %tmp29 = phi i32 [ 0, %bb12 ], [ %tmp54, %bb28 ]
+    %0 = bitcast i32* %arg1 to i8*
+    %1 = bitcast i32* %arg2 to i8*
+    %2 = bitcast i32* %arg to i8*
+    %uglygep14 = getelementptr i8, i8* %0, i32 %lsr.iv
+    %uglygep1415 = bitcast i8* %uglygep14 to i32*
+    %scevgep617 = bitcast i32* %uglygep1415 to i32*
+    %tmp34 = load i32, i32* %scevgep617, align 4
+    %uglygep8 = getelementptr i8, i8* %1, i32 %lsr.iv
+    %uglygep89 = bitcast i8* %uglygep8 to i32*
+    %scevgep418 = bitcast i32* %uglygep89 to i32*
+    %tmp35 = load i32, i32* %scevgep418, align 4
+    %tmp36 = xor i32 %tmp35, %tmp34
+    %uglygep2 = getelementptr i8, i8* %2, i32 %lsr.iv
+    %uglygep23 = bitcast i8* %uglygep2 to i32*
+    %scevgep219 = bitcast i32* %uglygep23 to i32*
+    %tmp37 = load i32, i32* %scevgep219, align 4
+    %tmp38 = add nsw i32 %tmp37, %tmp36
+    store i32 %tmp38, i32* %scevgep219, align 4
+    %uglygep33 = getelementptr i8, i8* %0, i32 %lsr.iv
+    %uglygep3334 = bitcast i8* %uglygep33 to i32*
+    %scevgep14 = getelementptr i32, i32* %uglygep3334, i32 1
+    %tmp39 = load i32, i32* %scevgep14, align 4
+    %uglygep27 = getelementptr i8, i8* %1, i32 %lsr.iv
+    %uglygep2728 = bitcast i8* %uglygep27 to i32*
+    %scevgep11 = getelementptr i32, i32* %uglygep2728, i32 1
+    %tmp40 = load i32, i32* %scevgep11, align 4
+    %tmp41 = xor i32 %tmp40, %tmp39
+    %uglygep20 = getelementptr i8, i8* %2, i32 %lsr.iv
+    %uglygep2021 = bitcast i8* %uglygep20 to i32*
+    %scevgep9 = getelementptr i32, i32* %uglygep2021, i32 1
+    %tmp42 = load i32, i32* %scevgep9, align 4
+    %tmp43 = add nsw i32 %tmp42, %tmp41
+    store i32 %tmp43, i32* %scevgep9, align 4
+    %uglygep30 = getelementptr i8, i8* %0, i32 %lsr.iv
+    %uglygep3031 = bitcast i8* %uglygep30 to i32*
+    %scevgep12 = getelementptr i32, i32* %uglygep3031, i32 2
+    %tmp44 = load i32, i32* %scevgep12, align 4
+    %uglygep24 = getelementptr i8, i8* %1, i32 %lsr.iv
+    %uglygep2425 = bitcast i8* %uglygep24 to i32*
+    %scevgep10 = getelementptr i32, i32* %uglygep2425, i32 2
+    %tmp45 = load i32, i32* %scevgep10, align 4
+    %tmp46 = xor i32 %tmp45, %tmp44
+    %uglygep17 = getelementptr i8, i8* %2, i32 %lsr.iv
+    %uglygep1718 = bitcast i8* %uglygep17 to i32*
+    %scevgep8 = getelementptr i32, i32* %uglygep1718, i32 2
+    %tmp47 = load i32, i32* %scevgep8, align 4
+    %tmp48 = add nsw i32 %tmp47, %tmp46
+    store i32 %tmp48, i32* %scevgep8, align 4
+    %uglygep11 = getelementptr i8, i8* %0, i32 %lsr.iv
+    %uglygep1112 = bitcast i8* %uglygep11 to i32*
+    %scevgep5 = getelementptr i32, i32* %uglygep1112, i32 3
+    %tmp49 = load i32, i32* %scevgep5, align 4
+    %uglygep5 = getelementptr i8, i8* %1, i32 %lsr.iv
+    %uglygep56 = bitcast i8* %uglygep5 to i32*
+    %scevgep3 = getelementptr i32, i32* %uglygep56, i32 3
+    %tmp50 = load i32, i32* %scevgep3, align 4
+    %tmp51 = xor i32 %tmp50, %tmp49
+    %uglygep = getelementptr i8, i8* %2, i32 %lsr.iv
+    %uglygep1 = bitcast i8* %uglygep to i32*
+    %scevgep1 = getelementptr i32, i32* %uglygep1, i32 3
+    %tmp52 = load i32, i32* %scevgep1, align 4
+    %tmp53 = add nsw i32 %tmp52, %tmp51
+    store i32 %tmp53, i32* %scevgep1, align 4
+    %tmp54 = add nuw i32 %tmp29, 4
+    %lsr.iv.next = add i32 %lsr.iv, 16
+    %loop.dec = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %lsr.iv15, i32 1)
+    %tmp56 = icmp ne i32 %loop.dec, 0
+    %lsr.iv.next16 = add nsw i32 %lsr.iv15, -1
+    br i1 %tmp56, label %bb28, label %bb13
+
+  bb57:                                             ; preds = %bb16
+    %tmp58 = getelementptr inbounds i32, i32* %arg1, i32 %tmp25
+    %tmp59 = load i32, i32* %tmp58, align 4
+    %tmp60 = getelementptr inbounds i32, i32* %arg2, i32 %tmp25
+    %tmp61 = load i32, i32* %tmp60, align 4
+    %tmp62 = xor i32 %tmp61, %tmp59
+    %tmp63 = getelementptr inbounds i32, i32* %arg, i32 %tmp25
+    %tmp64 = load i32, i32* %tmp63, align 4
+    %tmp65 = add nsw i32 %tmp64, %tmp62
+    store i32 %tmp65, i32* %tmp63, align 4
+    %tmp66 = add nuw i32 %tmp14, 2
+    %tmp67 = icmp eq i32 %tmp6, 2
+    br i1 %tmp67, label %bb27, label %bb68
+
+  bb68:                                             ; preds = %bb57
+    %tmp69 = getelementptr inbounds i32, i32* %arg1, i32 %tmp66
+    %tmp70 = load i32, i32* %tmp69, align 4
+    %tmp71 = getelementptr inbounds i32, i32* %arg2, i32 %tmp66
+    %tmp72 = load i32, i32* %tmp71, align 4
+    %tmp73 = xor i32 %tmp72, %tmp70
+    %tmp74 = getelementptr inbounds i32, i32* %arg, i32 %tmp66
+    %tmp75 = load i32, i32* %tmp74, align 4
+    %tmp76 = add nsw i32 %tmp75, %tmp73
+    store i32 %tmp76, i32* %tmp74, align 4
+    br label %bb27
+  }
+
+  declare void @llvm.set.loop.iterations.i32(i32)
+  declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32)
+
+...
+---
+name:            test1
+alignment:       2
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+failedISel:      false
+tracksRegLiveness: true
+hasWinCFI:       false
+registers:       []
+liveins:
+  - { reg: '$r0', virtual-reg: '' }
+  - { reg: '$r1', virtual-reg: '' }
+  - { reg: '$r2', virtual-reg: '' }
+  - { reg: '$r3', virtual-reg: '' }
+frameInfo:
+  isFrameAddressTaken: false
+  isReturnAddressTaken: false
+  hasStackMap:     false
+  hasPatchPoint:   false
+  stackSize:       40
+  offsetAdjustment: 0
+  maxAlignment:    4
+  adjustsStack:    false
+  hasCalls:        false
+  stackProtector:  ''
+  maxCallFrameSize: 0
+  cvBytesOfCalleeSavedRegisters: 0
+  hasOpaqueSPAdjustment: false
+  hasVAStart:      false
+  hasMustTailInVarArgFunc: false
+  localFrameSize:  0
+  savePoint:       ''
+  restorePoint:    ''
+fixedStack:      []
+stack:
+  - { id: 0, name: '', type: spill-slot, offset: -40, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 1, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 2, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r11', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 3, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r10', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 4, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r9', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 5, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r8', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 6, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 7, name: '', type: spill-slot, offset: -28, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 8, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 9, name: '', type: spill-slot, offset: -36, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+callSites:       []
+constants:       []
+machineFunctionInfo: {}
+body:             |
+  ; CHECK-LABEL: name: test1
+  ; CHECK: bb.0.bb:
+  ; CHECK:   successors: %bb.3(0x30000000), %bb.1(0x50000000)
+  ; CHECK:   liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11
+  ; CHECK:   $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr
+  ; CHECK:   frame-setup CFI_INSTRUCTION def_cfa_offset 36
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $lr, -4
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r11, -8
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r10, -12
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r9, -16
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r8, -20
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r7, -24
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r6, -28
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r5, -32
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r4, -36
+  ; CHECK:   $sp = frame-setup tSUBspi $sp, 1, 14, $noreg
+  ; CHECK:   frame-setup CFI_INSTRUCTION def_cfa_offset 40
+  ; CHECK:   tCBZ $r3, %bb.3
+  ; CHECK: bb.1.bb4:
+  ; CHECK:   successors: %bb.2(0x40000000), %bb.4(0x40000000)
+  ; CHECK:   liveins: $r0, $r1, $r2, $r3
+  ; CHECK:   renamable $r4, dead $cpsr = tSUBi3 renamable $r3, 1, 14, $noreg
+  ; CHECK:   renamable $r7 = t2ANDri renamable $r3, 3, 14, $noreg, $noreg
+  ; CHECK:   tCMPi8 killed renamable $r4, 3, 14, $noreg, implicit-def $cpsr
+  ; CHECK:   tSTRspi killed renamable $r7, $sp, 0, 14, $noreg :: (store 4 into %stack.0)
+  ; CHECK:   tBcc %bb.4, 2, killed $cpsr
+  ; CHECK: bb.2:
+  ; CHECK:   successors: %bb.6(0x80000000)
+  ; CHECK:   liveins: $r0, $r1, $r2
+  ; CHECK:   renamable $r8 = t2MOVi 0, 14, $noreg, $noreg
+  ; CHECK:   renamable $lr = t2MOVi 0, 14, $noreg, $noreg
+  ; CHECK:   tB %bb.6, 14, $noreg
+  ; CHECK: bb.3:
+  ; CHECK:   successors: %bb.12(0x80000000)
+  ; CHECK:   renamable $lr = t2MOVi 0, 14, $noreg, $noreg
+  ; CHECK:   tB %bb.12, 14, $noreg
+  ; CHECK: bb.4.bb12:
+  ; CHECK:   successors: %bb.5(0x80000000)
+  ; CHECK:   liveins: $r0, $r1, $r2, $r3
+  ; CHECK:   renamable $r3 = t2BICri killed renamable $r3, 3, 14, $noreg, $noreg
+  ; CHECK:   renamable $r4, dead $cpsr = tMOVi8 1, 14, $noreg
+  ; CHECK:   renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14, $noreg
+  ; CHECK:   renamable $r8 = t2MOVi 0, 14, $noreg, $noreg
+  ; CHECK:   renamable $r3 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg
+  ; CHECK:   $lr = t2DLS killed renamable $r3
+  ; CHECK:   renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg
+  ; CHECK: bb.5.bb28:
+  ; CHECK:   successors: %bb.5(0x7c000000), %bb.6(0x04000000)
+  ; CHECK:   liveins: $lr, $r0, $r1, $r2, $r3, $r8
+  ; CHECK:   renamable $r5 = tLDRr renamable $r1, $r3, 14, $noreg :: (load 4 from %ir.scevgep617)
+  ; CHECK:   renamable $r7, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14, $noreg
+  ; CHECK:   renamable $r6 = tLDRr renamable $r2, $r3, 14, $noreg :: (load 4 from %ir.scevgep418)
+  ; CHECK:   dead $r12 = tMOVr $lr, 14, $noreg
+  ; CHECK:   renamable $r8 = nuw t2ADDri killed renamable $r8, 4, 14, $noreg, $noreg
+  ; CHECK:   renamable $r5, dead $cpsr = tEOR killed renamable $r5, killed renamable $r6, 14, $noreg
+  ; CHECK:   renamable $r6 = tLDRr renamable $r0, $r3, 14, $noreg :: (load 4 from %ir.scevgep219)
+  ; CHECK:   renamable $r5 = nsw tADDhirr killed renamable $r5, killed renamable $r6, 14, $noreg
+  ; CHECK:   tSTRr killed renamable $r5, renamable $r0, $r3, 14, $noreg :: (store 4 into %ir.scevgep219)
+  ; CHECK:   renamable $r5, dead $cpsr = tADDrr renamable $r1, renamable $r3, 14, $noreg
+  ; CHECK:   renamable $r4 = tLDRi renamable $r7, 1, 14, $noreg :: (load 4 from %ir.scevgep11)
+  ; CHECK:   renamable $r6 = tLDRi renamable $r5, 1, 14, $noreg :: (load 4 from %ir.scevgep14)
+  ; CHECK:   renamable $r9 = t2EORrr killed renamable $r4, killed renamable $r6, 14, $noreg, $noreg
+  ; CHECK:   renamable $r6, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14, $noreg
+  ; CHECK:   $r11 = t2ADDri $r6, 4, 14, $noreg, $noreg
+  ; CHECK:   renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 16, 14, $noreg
+  ; CHECK:   t2LDMIA killed $r11, 14, $noreg, def $r4, def $r10, def $r11 :: (load 4 from %ir.scevgep9), (load 4 from %ir.scevgep8), (load 4 from %ir.scevgep1)
+  ; CHECK:   renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r9, 14, $noreg
+  ; CHECK:   tSTRi killed renamable $r4, renamable $r6, 1, 14, $noreg :: (store 4 into %ir.scevgep9)
+  ; CHECK:   renamable $r9 = t2LDRi12 renamable $r5, 8, 14, $noreg :: (load 4 from %ir.scevgep12)
+  ; CHECK:   renamable $r4 = tLDRi renamable $r7, 2, 14, $noreg :: (load 4 from %ir.scevgep10)
+  ; CHECK:   renamable $r4 = t2EORrr killed renamable $r4, killed renamable $r9, 14, $noreg, $noreg
+  ; CHECK:   renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r10, 14, $noreg
+  ; CHECK:   tSTRi killed renamable $r4, renamable $r6, 2, 14, $noreg :: (store 4 into %ir.scevgep8)
+  ; CHECK:   renamable $r4 = tLDRi killed renamable $r5, 3, 14, $noreg :: (load 4 from %ir.scevgep5)
+  ; CHECK:   renamable $r5 = tLDRi killed renamable $r7, 3, 14, $noreg :: (load 4 from %ir.scevgep3)
+  ; CHECK:   renamable $r4, dead $cpsr = tEOR killed renamable $r4, killed renamable $r5, 14, $noreg
+  ; CHECK:   renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r11, 14, $noreg
+  ; CHECK:   tSTRi killed renamable $r4, killed renamable $r6, 3, 14, $noreg :: (store 4 into %ir.scevgep1)
+  ; CHECK:   $lr = t2LEUpdate killed renamable $lr, %bb.5
+  ; CHECK: bb.6.bb13:
+  ; CHECK:   successors: %bb.12(0x30000000), %bb.7(0x50000000)
+  ; CHECK:   liveins: $lr, $r0, $r1, $r2, $r8
+  ; CHECK:   renamable $r5 = tLDRspi $sp, 0, 14, $noreg :: (load 4 from %stack.0)
+  ; CHECK:   tCBZ $r5, %bb.12
+  ; CHECK: bb.7.bb16:
+  ; CHECK:   successors: %bb.8(0x40000000), %bb.9(0x40000000)
+  ; CHECK:   liveins: $r0, $r1, $r2, $r5, $r8
+  ; CHECK:   renamable $lr = t2LDRs renamable $r1, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp17)
+  ; CHECK:   tCMPi8 renamable $r5, 1, 14, $noreg, implicit-def $cpsr
+  ; CHECK:   renamable $r3 = t2LDRs renamable $r2, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp19)
+  ; CHECK:   renamable $lr = t2EORrr killed renamable $lr, killed renamable $r3, 14, $noreg, $noreg
+  ; CHECK:   renamable $r3 = t2LDRs renamable $r0, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp22)
+  ; CHECK:   renamable $r3 = nsw tADDhirr killed renamable $r3, killed renamable $lr, 14, $noreg
+  ; CHECK:   t2STRs killed renamable $r3, renamable $r0, renamable $r8, 2, 14, $noreg :: (store 4 into %ir.tmp22)
+  ; CHECK:   tBcc %bb.9, 1, killed $cpsr
+  ; CHECK: bb.8:
+  ; CHECK:   successors: %bb.12(0x80000000)
+  ; CHECK:   renamable $lr = t2MOVi 1, 14, $noreg, $noreg
+  ; CHECK:   tB %bb.12, 14, $noreg
+  ; CHECK: bb.9.bb57:
+  ; CHECK:   successors: %bb.10(0x40000000), %bb.11(0x40000000)
+  ; CHECK:   liveins: $r0, $r1, $r2, $r5, $r8
+  ; CHECK:   renamable $r3 = nuw t2ADDri renamable $r8, 1, 14, $noreg, $noreg
+  ; CHECK:   tCMPi8 killed renamable $r5, 2, 14, $noreg, implicit-def $cpsr
+  ; CHECK:   renamable $r7 = t2LDRs renamable $r1, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp58)
+  ; CHECK:   renamable $r6 = t2LDRs renamable $r2, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp60)
+  ; CHECK:   renamable $r7 = t2EORrr killed renamable $r7, killed renamable $r6, 14, $noreg, $noreg
+  ; CHECK:   renamable $r6 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp63)
+  ; CHECK:   renamable $r7 = nsw tADDhirr killed renamable $r7, killed renamable $r6, 14, $noreg
+  ; CHECK:   t2STRs killed renamable $r7, renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store 4 into %ir.tmp63)
+  ; CHECK:   tBcc %bb.11, 1, killed $cpsr
+  ; CHECK: bb.10:
+  ; CHECK:   successors: %bb.12(0x80000000)
+  ; CHECK:   renamable $lr = t2MOVi 2, 14, $noreg, $noreg
+  ; CHECK:   tB %bb.12, 14, $noreg
+  ; CHECK: bb.11.bb68:
+  ; CHECK:   successors: %bb.12(0x80000000)
+  ; CHECK:   liveins: $r0, $r1, $r2, $r8
+  ; CHECK:   renamable $r3 = nuw t2ADDri killed renamable $r8, 2, 14, $noreg, $noreg
+  ; CHECK:   renamable $lr = t2MOVi 3, 14, $noreg, $noreg
+  ; CHECK:   renamable $r1 = t2LDRs killed renamable $r1, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp69)
+  ; CHECK:   renamable $r2 = t2LDRs killed renamable $r2, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp71)
+  ; CHECK:   renamable $r1, dead $cpsr = tEOR killed renamable $r1, killed renamable $r2, 14, $noreg
+  ; CHECK:   renamable $r2 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp74)
+  ; CHECK:   renamable $r1 = nsw tADDhirr killed renamable $r1, killed renamable $r2, 14, $noreg
+  ; CHECK:   t2STRs killed renamable $r1, killed renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store 4 into %ir.tmp74)
+  ; CHECK: bb.12.bb27:
+  ; CHECK:   liveins: $lr
+  ; CHECK:   $r0 = tMOVr killed $lr, 14, $noreg
+  ; CHECK:   $sp = tADDspi $sp, 1, 14, $noreg
+  ; CHECK:   $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc, implicit killed $r0
+  bb.0.bb:
+    successors: %bb.3(0x30000000), %bb.1(0x50000000)
+    liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $lr
+
+    $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr
+    frame-setup CFI_INSTRUCTION def_cfa_offset 36
+    frame-setup CFI_INSTRUCTION offset $lr, -4
+    frame-setup CFI_INSTRUCTION offset $r11, -8
+    frame-setup CFI_INSTRUCTION offset $r10, -12
+    frame-setup CFI_INSTRUCTION offset $r9, -16
+    frame-setup CFI_INSTRUCTION offset $r8, -20
+    frame-setup CFI_INSTRUCTION offset $r7, -24
+    frame-setup CFI_INSTRUCTION offset $r6, -28
+    frame-setup CFI_INSTRUCTION offset $r5, -32
+    frame-setup CFI_INSTRUCTION offset $r4, -36
+    $sp = frame-setup tSUBspi $sp, 1, 14, $noreg
+    frame-setup CFI_INSTRUCTION def_cfa_offset 40
+    tCBZ $r3, %bb.3
+
+  bb.1.bb4:
+    successors: %bb.2(0x40000000), %bb.4(0x40000000)
+    liveins: $r0, $r1, $r2, $r3
+
+    renamable $r4, dead $cpsr = tSUBi3 renamable $r3, 1, 14, $noreg
+    renamable $r7 = t2ANDri renamable $r3, 3, 14, $noreg, $noreg
+    tCMPi8 killed renamable $r4, 3, 14, $noreg, implicit-def $cpsr
+    tSTRspi killed renamable $r7, $sp, 0, 14, $noreg :: (store 4 into %stack.0)
+    tBcc %bb.4, 2, killed $cpsr
+
+  bb.2:
+    successors: %bb.6(0x80000000)
+    liveins: $r0, $r1, $r2
+
+    renamable $r8 = t2MOVi 0, 14, $noreg, $noreg
+    renamable $lr = t2MOVi 0, 14, $noreg, $noreg
+    tB %bb.6, 14, $noreg
+
+  bb.3:
+    successors: %bb.12(0x80000000)
+
+    renamable $lr = t2MOVi 0, 14, $noreg, $noreg
+    tB %bb.12, 14, $noreg
+
+  bb.4.bb12:
+    successors: %bb.5(0x80000000)
+    liveins: $r0, $r1, $r2, $r3
+
+    renamable $r3 = t2BICri killed renamable $r3, 3, 14, $noreg, $noreg
+    renamable $r4, dead $cpsr = tMOVi8 1, 14, $noreg
+    renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14, $noreg
+    renamable $r8 = t2MOVi 0, 14, $noreg, $noreg
+    renamable $r3 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg
+    t2DoLoopStart renamable $r3
+    $lr = tMOVr killed $r3, 14, $noreg
+    renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg
+
+  bb.5.bb28:
+    successors: %bb.5(0x7c000000), %bb.6(0x04000000)
+    liveins: $r0, $r1, $r2, $r3, $r8, $r12, $lr
+
+    renamable $r5 = tLDRr renamable $r1, $r3, 14, $noreg :: (load 4 from %ir.scevgep617)
+    renamable $r7, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14, $noreg
+    renamable $r6 = tLDRr renamable $r2, $r3, 14, $noreg :: (load 4 from %ir.scevgep418)
+    $r12 = tMOVr $lr, 14, $noreg
+    renamable $r8 = nuw t2ADDri killed renamable $r8, 4, 14, $noreg, $noreg
+    renamable $r5, dead $cpsr = tEOR killed renamable $r5, killed renamable $r6, 14, $noreg
+    renamable $r6 = tLDRr renamable $r0, $r3, 14, $noreg :: (load 4 from %ir.scevgep219)
+    renamable $lr = t2LoopDec killed renamable $lr, 1
+    renamable $r5 = nsw tADDhirr killed renamable $r5, killed renamable $r6, 14, $noreg
+    tSTRr killed renamable $r5, renamable $r0, $r3, 14, $noreg :: (store 4 into %ir.scevgep219)
+    renamable $r5, dead $cpsr = tADDrr renamable $r1, renamable $r3, 14, $noreg
+    renamable $r4 = tLDRi renamable $r7, 1, 14, $noreg :: (load 4 from %ir.scevgep11)
+    renamable $r6 = tLDRi renamable $r5, 1, 14, $noreg :: (load 4 from %ir.scevgep14)
+    renamable $r9 = t2EORrr killed renamable $r4, killed renamable $r6, 14, $noreg, $noreg
+    renamable $r6, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14, $noreg
+    $r11 = t2ADDri $r6, 4, 14, $noreg, $noreg
+    renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 16, 14, $noreg
+    t2LDMIA killed $r11, 14, $noreg, def $r4, def $r10, def $r11 :: (load 4 from %ir.scevgep9), (load 4 from %ir.scevgep8), (load 4 from %ir.scevgep1)
+    renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r9, 14, $noreg
+    tSTRi killed renamable $r4, renamable $r6, 1, 14, $noreg :: (store 4 into %ir.scevgep9)
+    renamable $r9 = t2LDRi12 renamable $r5, 8, 14, $noreg :: (load 4 from %ir.scevgep12)
+    renamable $r4 = tLDRi renamable $r7, 2, 14, $noreg :: (load 4 from %ir.scevgep10)
+    renamable $r4 = t2EORrr killed renamable $r4, killed renamable $r9, 14, $noreg, $noreg
+    renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r10, 14, $noreg
+    tSTRi killed renamable $r4, renamable $r6, 2, 14, $noreg :: (store 4 into %ir.scevgep8)
+    renamable $r4 = tLDRi killed renamable $r5, 3, 14, $noreg :: (load 4 from %ir.scevgep5)
+    renamable $r5 = tLDRi killed renamable $r7, 3, 14, $noreg :: (load 4 from %ir.scevgep3)
+    renamable $r4, dead $cpsr = tEOR killed renamable $r4, killed renamable $r5, 14, $noreg
+    renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r11, 14, $noreg
+    tSTRi killed renamable $r4, killed renamable $r6, 3, 14, $noreg :: (store 4 into %ir.scevgep1)
+    t2LoopEnd renamable $lr, %bb.5, implicit-def dead $cpsr
+    tB %bb.6, 14, $noreg
+
+  bb.6.bb13:
+    successors: %bb.12(0x30000000), %bb.7(0x50000000)
+    liveins: $lr, $r0, $r1, $r2, $r8
+
+    renamable $r5 = tLDRspi $sp, 0, 14, $noreg :: (load 4 from %stack.0)
+    tCBZ $r5, %bb.12
+
+  bb.7.bb16:
+    successors: %bb.8(0x40000000), %bb.9(0x40000000)
+    liveins: $r0, $r1, $r2, $r5, $r8
+
+    renamable $lr = t2LDRs renamable $r1, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp17)
+    tCMPi8 renamable $r5, 1, 14, $noreg, implicit-def $cpsr
+    renamable $r3 = t2LDRs renamable $r2, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp19)
+    renamable $lr = t2EORrr killed renamable $lr, killed renamable $r3, 14, $noreg, $noreg
+    renamable $r3 = t2LDRs renamable $r0, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp22)
+    renamable $r3 = nsw tADDhirr killed renamable $r3, killed renamable $lr, 14, $noreg
+    t2STRs killed renamable $r3, renamable $r0, renamable $r8, 2, 14, $noreg :: (store 4 into %ir.tmp22)
+    tBcc %bb.9, 1, killed $cpsr
+
+  bb.8:
+    successors: %bb.12(0x80000000)
+
+    renamable $lr = t2MOVi 1, 14, $noreg, $noreg
+    tB %bb.12, 14, $noreg
+
+  bb.9.bb57:
+    successors: %bb.10(0x40000000), %bb.11(0x40000000)
+    liveins: $r0, $r1, $r2, $r5, $r8
+
+    renamable $r3 = nuw t2ADDri renamable $r8, 1, 14, $noreg, $noreg
+    tCMPi8 killed renamable $r5, 2, 14, $noreg, implicit-def $cpsr
+    renamable $r7 = t2LDRs renamable $r1, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp58)
+    renamable $r6 = t2LDRs renamable $r2, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp60)
+    renamable $r7 = t2EORrr killed renamable $r7, killed renamable $r6, 14, $noreg, $noreg
+    renamable $r6 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp63)
+    renamable $r7 = nsw tADDhirr killed renamable $r7, killed renamable $r6, 14, $noreg
+    t2STRs killed renamable $r7, renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store 4 into %ir.tmp63)
+    tBcc %bb.11, 1, killed $cpsr
+
+  bb.10:
+    successors: %bb.12(0x80000000)
+
+    renamable $lr = t2MOVi 2, 14, $noreg, $noreg
+    tB %bb.12, 14, $noreg
+
+  bb.11.bb68:
+    successors: %bb.12(0x80000000)
+    liveins: $r0, $r1, $r2, $r8
+
+    renamable $r3 = nuw t2ADDri killed renamable $r8, 2, 14, $noreg, $noreg
+    renamable $lr = t2MOVi 3, 14, $noreg, $noreg
+    renamable $r1 = t2LDRs killed renamable $r1, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp69)
+    renamable $r2 = t2LDRs killed renamable $r2, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp71)
+    renamable $r1, dead $cpsr = tEOR killed renamable $r1, killed renamable $r2, 14, $noreg
+    renamable $r2 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp74)
+    renamable $r1 = nsw tADDhirr killed renamable $r1, killed renamable $r2, 14, $noreg
+    t2STRs killed renamable $r1, killed renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store 4 into %ir.tmp74)
+
+  bb.12.bb27:
+    liveins: $lr
+
+    $r0 = tMOVr killed $lr, 14, $noreg
+    $sp = tADDspi $sp, 1, 14, $noreg
+    $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc, implicit killed $r0
+
+...
diff --git a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-liveout.mir b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-liveout.mir
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-liveout.mir
@@ -0,0 +1,512 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=thumbv8.1m.main -run-pass=arm-low-overhead-loops %s -o - --verify-machineinstrs | FileCheck %s
+
+--- |
+  define dso_local arm_aapcscc i32 @test1(i32* nocapture %arg, i32* nocapture readonly %arg1, i32* nocapture readonly %arg2, i32 %arg3) {
+  bb:
+    %tmp = icmp eq i32 %arg3, 0
+    br i1 %tmp, label %bb27, label %bb4
+
+  bb4:                                              ; preds = %bb
+    %tmp5 = add i32 %arg3, -1
+    %tmp6 = and i32 %arg3, 3
+    %tmp7 = icmp ult i32 %tmp5, 3
+    %tmp8 = add i32 %arg3, -4
+    %tmp9 = sub i32 %tmp8, %tmp6
+    %tmp10 = lshr i32 %tmp9, 2
+    %tmp11 = add nuw nsw i32 %tmp10, 1
+    br i1 %tmp7, label %bb13, label %bb12
+
+  bb12:                                             ; preds = %bb4
+    call void @llvm.set.loop.iterations.i32(i32 %tmp11)
+    br label %bb28
+
+  bb13:                                             ; preds = %bb28, %bb4
+    %tmp14 = phi i32 [ 0, %bb4 ], [ %tmp54, %bb28 ]
+    %exit.count = phi i32 [ 0, %bb4 ], [ %loop.dec, %bb28 ]
+    %tmp15 = icmp eq i32 %tmp6, 0
+    br i1 %tmp15, label %bb27, label %bb16
+
+  bb16:                                             ; preds = %bb13
+    %tmp17 = getelementptr inbounds i32, i32* %arg1, i32 %tmp14
+    %tmp18 = load i32, i32* %tmp17, align 4
+    %tmp19 = getelementptr inbounds i32, i32* %arg2, i32 %tmp14
+    %tmp20 = load i32, i32* %tmp19, align 4
+    %tmp21 = xor i32 %tmp20, %tmp18
+    %tmp22 = getelementptr inbounds i32, i32* %arg, i32 %tmp14
+    %tmp23 = load i32, i32* %tmp22, align 4
+    %tmp24 = add nsw i32 %tmp23, %tmp21
+    store i32 %tmp24, i32* %tmp22, align 4
+    %tmp25 = add nuw i32 %tmp14, 1
+    %tmp26 = icmp eq i32 %tmp6, 1
+    br i1 %tmp26, label %bb27, label %bb57
+
+  bb27:                                             ; preds = %bb68, %bb57, %bb16, %bb13, %bb
+    %res = phi i32 [ %exit.count, %bb13 ], [ 3, %bb68 ], [ 2, %bb57 ], [ 1, %bb16 ], [ 0, %bb ]
+    ret i32 %res
+
+  bb28:                                             ; preds = %bb28, %bb12
+    %lsr.iv15 = phi i32 [ %lsr.iv.next16, %bb28 ], [ %tmp11, %bb12 ]
+    %lsr.iv = phi i32 [ %lsr.iv.next, %bb28 ], [ 0, %bb12 ]
+    %tmp29 = phi i32 [ 0, %bb12 ], [ %tmp54, %bb28 ]
+    %0 = bitcast i32* %arg1 to i8*
+    %1 = bitcast i32* %arg2 to i8*
+    %2 = bitcast i32* %arg to i8*
+    %uglygep14 = getelementptr i8, i8* %0, i32 %lsr.iv
+    %uglygep1415 = bitcast i8* %uglygep14 to i32*
+    %scevgep617 = bitcast i32* %uglygep1415 to i32*
+    %tmp34 = load i32, i32* %scevgep617, align 4
+    %uglygep8 = getelementptr i8, i8* %1, i32 %lsr.iv
+    %uglygep89 = bitcast i8* %uglygep8 to i32*
+    %scevgep418 = bitcast i32* %uglygep89 to i32*
+    %tmp35 = load i32, i32* %scevgep418, align 4
+    %tmp36 = xor i32 %tmp35, %tmp34
+    %uglygep2 = getelementptr i8, i8* %2, i32 %lsr.iv
+    %uglygep23 = bitcast i8* %uglygep2 to i32*
+    %scevgep219 = bitcast i32* %uglygep23 to i32*
+    %tmp37 = load i32, i32* %scevgep219, align 4
+    %tmp38 = add nsw i32 %tmp37, %tmp36
+    store i32 %tmp38, i32* %scevgep219, align 4
+    %uglygep33 = getelementptr i8, i8* %0, i32 %lsr.iv
+    %uglygep3334 = bitcast i8* %uglygep33 to i32*
+    %scevgep14 = getelementptr i32, i32* %uglygep3334, i32 1
+    %tmp39 = load i32, i32* %scevgep14, align 4
+    %uglygep27 = getelementptr i8, i8* %1, i32 %lsr.iv
+    %uglygep2728 = bitcast i8* %uglygep27 to i32*
+    %scevgep11 = getelementptr i32, i32* %uglygep2728, i32 1
+    %tmp40 = load i32, i32* %scevgep11, align 4
+    %tmp41 = xor i32 %tmp40, %tmp39
+    %uglygep20 = getelementptr i8, i8* %2, i32 %lsr.iv
+    %uglygep2021 = bitcast i8* %uglygep20 to i32*
+    %scevgep9 = getelementptr i32, i32* %uglygep2021, i32 1
+    %tmp42 = load i32, i32* %scevgep9, align 4
+    %tmp43 = add nsw i32 %tmp42, %tmp41
+    store i32 %tmp43, i32* %scevgep9, align 4
+    %uglygep30 = getelementptr i8, i8* %0, i32 %lsr.iv
+    %uglygep3031 = bitcast i8* %uglygep30 to i32*
+    %scevgep12 = getelementptr i32, i32* %uglygep3031, i32 2
+    %tmp44 = load i32, i32* %scevgep12, align 4
+    %uglygep24 = getelementptr i8, i8* %1, i32 %lsr.iv
+    %uglygep2425 = bitcast i8* %uglygep24 to i32*
+    %scevgep10 = getelementptr i32, i32* %uglygep2425, i32 2
+    %tmp45 = load i32, i32* %scevgep10, align 4
+    %tmp46 = xor i32 %tmp45, %tmp44
+    %uglygep17 = getelementptr i8, i8* %2, i32 %lsr.iv
+    %uglygep1718 = bitcast i8* %uglygep17 to i32*
+    %scevgep8 = getelementptr i32, i32* %uglygep1718, i32 2
+    %tmp47 = load i32, i32* %scevgep8, align 4
+    %tmp48 = add nsw i32 %tmp47, %tmp46
+    store i32 %tmp48, i32* %scevgep8, align 4
+    %uglygep11 = getelementptr i8, i8* %0, i32 %lsr.iv
+    %uglygep1112 = bitcast i8* %uglygep11 to i32*
+    %scevgep5 = getelementptr i32, i32* %uglygep1112, i32 3
+    %tmp49 = load i32, i32* %scevgep5, align 4
+    %uglygep5 = getelementptr i8, i8* %1, i32 %lsr.iv
+    %uglygep56 = bitcast i8* %uglygep5 to i32*
+    %scevgep3 = getelementptr i32, i32* %uglygep56, i32 3
+    %tmp50 = load i32, i32* %scevgep3, align 4
+    %tmp51 = xor i32 %tmp50, %tmp49
+    %uglygep = getelementptr i8, i8* %2, i32 %lsr.iv
+    %uglygep1 = bitcast i8* %uglygep to i32*
+    %scevgep1 = getelementptr i32, i32* %uglygep1, i32 3
+    %tmp52 = load i32, i32* %scevgep1, align 4
+    %tmp53 = add nsw i32 %tmp52, %tmp51
+    store i32 %tmp53, i32* %scevgep1, align 4
+    %tmp54 = add nuw i32 %tmp29, 4
+    %lsr.iv.next = add i32 %lsr.iv, 16
+    %loop.dec = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %lsr.iv15, i32 1)
+    %tmp56 = icmp ne i32 %loop.dec, 0
+    %lsr.iv.next16 = add nsw i32 %lsr.iv15, -1
+    br i1 %tmp56, label %bb28, label %bb13
+
+  bb57:                                             ; preds = %bb16
+    %tmp58 = getelementptr inbounds i32, i32* %arg1, i32 %tmp25
+    %tmp59 = load i32, i32* %tmp58, align 4
+    %tmp60 = getelementptr inbounds i32, i32* %arg2, i32 %tmp25
+    %tmp61 = load i32, i32* %tmp60, align 4
+    %tmp62 = xor i32 %tmp61, %tmp59
+    %tmp63 = getelementptr inbounds i32, i32* %arg, i32 %tmp25
+    %tmp64 = load i32, i32* %tmp63, align 4
+    %tmp65 = add nsw i32 %tmp64, %tmp62
+    store i32 %tmp65, i32* %tmp63, align 4
+    %tmp66 = add nuw i32 %tmp14, 2
+    %tmp67 = icmp eq i32 %tmp6, 2
+    br i1 %tmp67, label %bb27, label %bb68
+
+  bb68:                                             ; preds = %bb57
+    %tmp69 = getelementptr inbounds i32, i32* %arg1, i32 %tmp66
+    %tmp70 = load i32, i32* %tmp69, align 4
+    %tmp71 = getelementptr inbounds i32, i32* %arg2, i32 %tmp66
+    %tmp72 = load i32, i32* %tmp71, align 4
+    %tmp73 = xor i32 %tmp72, %tmp70
+    %tmp74 = getelementptr inbounds i32, i32* %arg, i32 %tmp66
+    %tmp75 = load i32, i32* %tmp74, align 4
+    %tmp76 = add nsw i32 %tmp75, %tmp73
+    store i32 %tmp76, i32* %tmp74, align 4
+    br label %bb27
+  }
+
+  declare void @llvm.set.loop.iterations.i32(i32)
+  declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32)
+
+...
+---
+name:            test1
+alignment:       2
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+failedISel:      false
+tracksRegLiveness: true
+hasWinCFI:       false
+registers:       []
+liveins:
+  - { reg: '$r0', virtual-reg: '' }
+  - { reg: '$r1', virtual-reg: '' }
+  - { reg: '$r2', virtual-reg: '' }
+  - { reg: '$r3', virtual-reg: '' }
+frameInfo:
+  isFrameAddressTaken: false
+  isReturnAddressTaken: false
+  hasStackMap:     false
+  hasPatchPoint:   false
+  stackSize:       40
+  offsetAdjustment: 0
+  maxAlignment:    4
+  adjustsStack:    false
+  hasCalls:        false
+  stackProtector:  ''
+  maxCallFrameSize: 0
+  cvBytesOfCalleeSavedRegisters: 0
+  hasOpaqueSPAdjustment: false
+  hasVAStart:      false
+  hasMustTailInVarArgFunc: false
+  localFrameSize:  0
+  savePoint:       ''
+  restorePoint:    ''
+fixedStack:      []
+stack:
+  - { id: 0, name: '', type: spill-slot, offset: -40, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 1, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 2, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r11', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 3, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r10', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 4, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r9', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 5, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r8', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 6, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 7, name: '', type: spill-slot, offset: -28, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 8, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+  - { id: 9, name: '', type: spill-slot, offset: -36, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+callSites:       []
+constants:       []
+machineFunctionInfo: {}
+body:             |
+  ; CHECK-LABEL: name: test1
+  ; CHECK: bb.0.bb:
+  ; CHECK:   successors: %bb.3(0x30000000), %bb.1(0x50000000)
+  ; CHECK:   liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11
+  ; CHECK:   $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr
+  ; CHECK:   frame-setup CFI_INSTRUCTION def_cfa_offset 36
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $lr, -4
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r11, -8
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r10, -12
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r9, -16
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r8, -20
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r7, -24
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r6, -28
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r5, -32
+  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r4, -36
+  ; CHECK:   $sp = frame-setup tSUBspi $sp, 1, 14, $noreg
+  ; CHECK:   frame-setup CFI_INSTRUCTION def_cfa_offset 40
+  ; CHECK:   tCBZ $r3, %bb.3
+  ; CHECK: bb.1.bb4:
+  ; CHECK:   successors: %bb.2(0x40000000), %bb.4(0x40000000)
+  ; CHECK:   liveins: $r0, $r1, $r2, $r3
+  ; CHECK:   renamable $r4, dead $cpsr = tSUBi3 renamable $r3, 1, 14, $noreg
+  ; CHECK:   renamable $r7 = t2ANDri renamable $r3, 3, 14, $noreg, $noreg
+  ; CHECK:   tCMPi8 killed renamable $r4, 3, 14, $noreg, implicit-def $cpsr
+  ; CHECK:   tSTRspi killed renamable $r7, $sp, 0, 14, $noreg :: (store 4 into %stack.0)
+  ; CHECK:   tBcc %bb.4, 2, killed $cpsr
+  ; CHECK: bb.2:
+  ; CHECK:   successors: %bb.6(0x80000000)
+  ; CHECK:   liveins: $r0, $r1, $r2
+  ; CHECK:   renamable $r8 = t2MOVi 0, 14, $noreg, $noreg
+  ; CHECK:   renamable $lr = t2MOVi 0, 14, $noreg, $noreg
+  ; CHECK:   tB %bb.6, 14, $noreg
+  ; CHECK: bb.3:
+  ; CHECK:   successors: %bb.12(0x80000000)
+  ; CHECK:   renamable $lr = t2MOVi 0, 14, $noreg, $noreg
+  ; CHECK:   tB %bb.12, 14, $noreg
+  ; CHECK: bb.4.bb12:
+  ; CHECK:   successors: %bb.5(0x80000000)
+  ; CHECK:   liveins: $r0, $r1, $r2, $r3
+  ; CHECK:   renamable $r3 = t2BICri killed renamable $r3, 3, 14, $noreg, $noreg
+  ; CHECK:   renamable $r4, dead $cpsr = tMOVi8 1, 14, $noreg
+  ; CHECK:   renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14, $noreg
+  ; CHECK:   renamable $r8 = t2MOVi 0, 14, $noreg, $noreg
+  ; CHECK:   renamable $r3 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg
+  ; CHECK:   $lr = t2DLS killed renamable $r3
+  ; CHECK:   renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg
+  ; CHECK: bb.5.bb28:
+  ; CHECK:   successors: %bb.5(0x7c000000), %bb.6(0x04000000)
+  ; CHECK:   liveins: $lr, $r0, $r1, $r2, $r3, $r8
+  ; CHECK:   renamable $r5 = tLDRr renamable $r1, $r3, 14, $noreg :: (load 4 from %ir.scevgep617)
+  ; CHECK:   renamable $r7, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14, $noreg
+  ; CHECK:   renamable $r6 = tLDRr renamable $r2, $r3, 14, $noreg :: (load 4 from %ir.scevgep418)
+  ; CHECK:   renamable $r8 = nuw t2ADDri killed renamable $r8, 4, 14, $noreg, $noreg
+  ; CHECK:   renamable $r5, dead $cpsr = tEOR killed renamable $r5, killed renamable $r6, 14, $noreg
+  ; CHECK:   renamable $r6 = tLDRr renamable $r0, $r3, 14, $noreg :: (load 4 from %ir.scevgep219)
+  ; CHECK:   renamable $r5 = nsw tADDhirr killed renamable $r5, killed renamable $r6, 14, $noreg
+  ; CHECK:   tSTRr killed renamable $r5, renamable $r0, $r3, 14, $noreg :: (store 4 into %ir.scevgep219)
+  ; CHECK:   renamable $r5, dead $cpsr = tADDrr renamable $r1, renamable $r3, 14, $noreg
+  ; CHECK:   renamable $r4 = tLDRi renamable $r7, 1, 14, $noreg :: (load 4 from %ir.scevgep11)
+  ; CHECK:   renamable $r6 = tLDRi renamable $r5, 1, 14, $noreg :: (load 4 from %ir.scevgep14)
+  ; CHECK:   renamable $r9 = t2EORrr killed renamable $r4, killed renamable $r6, 14, $noreg, $noreg
+  ; CHECK:   renamable $r6, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14, $noreg
+  ; CHECK:   $r11 = t2ADDri $r6, 4, 14, $noreg, $noreg
+  ; CHECK:   renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 16, 14, $noreg
+  ; CHECK:   t2LDMIA killed $r11, 14, $noreg, def $r4, def $r10, def $r11 :: (load 4 from %ir.scevgep9), (load 4 from %ir.scevgep8), (load 4 from %ir.scevgep1)
+  ; CHECK:   renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r9, 14, $noreg
+  ; CHECK:   tSTRi killed renamable $r4, renamable $r6, 1, 14, $noreg :: (store 4 into %ir.scevgep9)
+  ; CHECK:   renamable $r9 = t2LDRi12 renamable $r5, 8, 14, $noreg :: (load 4 from %ir.scevgep12)
+  ; CHECK:   renamable $r4 = tLDRi renamable $r7, 2, 14, $noreg :: (load 4 from %ir.scevgep10)
+  ; CHECK:   renamable $r4 = t2EORrr killed renamable $r4, killed renamable $r9, 14, $noreg, $noreg
+  ; CHECK:   renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r10, 14, $noreg
+  ; CHECK:   tSTRi killed renamable $r4, renamable $r6, 2, 14, $noreg :: (store 4 into %ir.scevgep8)
+  ; CHECK:   renamable $r4 = tLDRi killed renamable $r5, 3, 14, $noreg :: (load 4 from %ir.scevgep5)
+  ; CHECK:   renamable $r5 = tLDRi killed renamable $r7, 3, 14, $noreg :: (load 4 from %ir.scevgep3)
+  ; CHECK:   renamable $r4, dead $cpsr = tEOR killed renamable $r4, killed renamable $r5, 14, $noreg
+  ; CHECK:   renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r11, 14, $noreg
+  ; CHECK:   tSTRi killed renamable $r4, killed renamable $r6, 3, 14, $noreg :: (store 4 into %ir.scevgep1)
+  ; CHECK:   $lr = t2LEUpdate killed renamable $lr, %bb.5
+  ; CHECK: bb.6.bb13:
+  ; CHECK:   successors: %bb.12(0x30000000), %bb.7(0x50000000)
+  ; CHECK:   liveins: $lr, $r0, $r1, $r2, $r8
+  ; CHECK:   renamable $r5 = tLDRspi $sp, 0, 14, $noreg :: (load 4 from %stack.0)
+  ; CHECK:   tCBZ $r5, %bb.12
+  ; CHECK: bb.7.bb16:
+  ; CHECK:   successors: %bb.8(0x40000000), %bb.9(0x40000000)
+  ; CHECK:   liveins: $lr, $r0, $r1, $r2, $r5, $r8
+  ; CHECK:   renamable $lr = t2LDRs renamable $r1, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp17)
+  ; CHECK:   tCMPi8 renamable $r5, 1, 14, $noreg, implicit-def $cpsr
+  ; CHECK:   renamable $r3 = t2LDRs renamable $r2, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp19)
+  ; CHECK:   renamable $lr = t2EORrr killed renamable $lr, killed renamable $r3, 14, $noreg, $noreg
+  ; CHECK:   renamable $r3 = t2LDRs renamable $r0, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp22)
+  ; CHECK:   renamable $r3 = nsw tADDhirr killed renamable $r3, killed renamable $lr, 14, $noreg
+  ; CHECK:   t2STRs killed renamable $r3, renamable $r0, renamable $r8, 2, 14, $noreg :: (store 4 into %ir.tmp22)
+  ; CHECK:   tBcc %bb.9, 1, killed $cpsr
+  ; CHECK: bb.8:
+  ; CHECK:   successors: %bb.12(0x80000000)
+  ; CHECK:   renamable $lr = t2MOVi 1, 14, $noreg, $noreg
+  ; CHECK:   tB %bb.12, 14, $noreg
+  ; CHECK: bb.9.bb57:
+  ; CHECK:   successors: %bb.10(0x40000000), %bb.11(0x40000000)
+  ; CHECK:   liveins: $r0, $r1, $r2, $r5, $r8
+  ; CHECK:   renamable $r3 = nuw t2ADDri renamable $r8, 1, 14, $noreg, $noreg
+  ; CHECK:   tCMPi8 killed renamable $r5, 2, 14, $noreg, implicit-def $cpsr
+  ; CHECK:   renamable $r7 = t2LDRs renamable $r1, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp58)
+  ; CHECK:   renamable $r6 = t2LDRs renamable $r2, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp60)
+  ; CHECK:   renamable $r7 = t2EORrr killed renamable $r7, killed renamable $r6, 14, $noreg, $noreg
+  ; CHECK:   renamable $r6 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp63)
+  ; CHECK:   renamable $r7 = nsw tADDhirr killed renamable $r7, killed renamable $r6, 14, $noreg
+  ; CHECK:   t2STRs killed renamable $r7, renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store 4 into %ir.tmp63)
+  ; CHECK:   tBcc %bb.11, 1, killed $cpsr
+  ; CHECK: bb.10:
+  ; CHECK:   successors: %bb.12(0x80000000)
+  ; CHECK:   renamable $lr = t2MOVi 2, 14, $noreg, $noreg
+  ; CHECK:   tB %bb.12, 14, $noreg
+  ; CHECK: bb.11.bb68:
+  ; CHECK:   successors: %bb.12(0x80000000)
+  ; CHECK:   liveins: $r0, $r1, $r2, $r8
+  ; CHECK:   renamable $r3 = nuw t2ADDri killed renamable $r8, 2, 14, $noreg, $noreg
+  ; CHECK:   renamable $lr = t2MOVi 3, 14, $noreg, $noreg
+  ; CHECK:   renamable $r1 = t2LDRs killed renamable $r1, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp69)
+  ; CHECK:   renamable $r2 = t2LDRs killed renamable $r2, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp71)
+  ; CHECK:   renamable $r1, dead $cpsr = tEOR killed renamable $r1, killed renamable $r2, 14, $noreg
+  ; CHECK:   renamable $r2 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp74)
+  ; CHECK:   renamable $r1 = nsw tADDhirr killed renamable $r1, killed renamable $r2, 14, $noreg
+  ; CHECK:   t2STRs killed renamable $r1, killed renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store 4 into %ir.tmp74)
+  ; CHECK: bb.12.bb27:
+  ; CHECK:   liveins: $lr
+  ; CHECK:   $r0 = tMOVr killed $lr, 14, $noreg
+  ; CHECK:   $sp = tADDspi $sp, 1, 14, $noreg
+  ; CHECK:   $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc, implicit killed $r0
+  bb.0.bb:
+    successors: %bb.3(0x30000000), %bb.1(0x50000000)
+    liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $lr
+
+    $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr
+    frame-setup CFI_INSTRUCTION def_cfa_offset 36
+    frame-setup CFI_INSTRUCTION offset $lr, -4
+    frame-setup CFI_INSTRUCTION offset $r11, -8
+    frame-setup CFI_INSTRUCTION offset $r10, -12
+    frame-setup CFI_INSTRUCTION offset $r9, -16
+    frame-setup CFI_INSTRUCTION offset $r8, -20
+    frame-setup CFI_INSTRUCTION offset $r7, -24
+    frame-setup CFI_INSTRUCTION offset $r6, -28
+    frame-setup CFI_INSTRUCTION offset $r5, -32
+    frame-setup CFI_INSTRUCTION offset $r4, -36
+    $sp = frame-setup tSUBspi $sp, 1, 14, $noreg
+    frame-setup CFI_INSTRUCTION def_cfa_offset 40
+    tCBZ $r3, %bb.3
+
+  bb.1.bb4:
+    successors: %bb.2(0x40000000), %bb.4(0x40000000)
+    liveins: $r0, $r1, $r2, $r3
+
+    renamable $r4, dead $cpsr = tSUBi3 renamable $r3, 1, 14, $noreg
+    renamable $r7 = t2ANDri renamable $r3, 3, 14, $noreg, $noreg
+    tCMPi8 killed renamable $r4, 3, 14, $noreg, implicit-def $cpsr
+    tSTRspi killed renamable $r7, $sp, 0, 14, $noreg :: (store 4 into %stack.0)
+    tBcc %bb.4, 2, killed $cpsr
+
+  bb.2:
+    successors: %bb.6(0x80000000)
+    liveins: $r0, $r1, $r2
+
+    renamable $r8 = t2MOVi 0, 14, $noreg, $noreg
+    renamable $lr = t2MOVi 0, 14, $noreg, $noreg
+    tB %bb.6, 14, $noreg
+
+  bb.3:
+    successors: %bb.12(0x80000000)
+
+    renamable $lr = t2MOVi 0, 14, $noreg, $noreg
+    tB %bb.12, 14, $noreg
+
+  bb.4.bb12:
+    successors: %bb.5(0x80000000)
+    liveins: $r0, $r1, $r2, $r3
+
+    renamable $r3 = t2BICri killed renamable $r3, 3, 14, $noreg, $noreg
+    renamable $r4, dead $cpsr = tMOVi8 1, 14, $noreg
+    renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14, $noreg
+    renamable $r8 = t2MOVi 0, 14, $noreg, $noreg
+    renamable $r3 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg
+    t2DoLoopStart renamable $r3
+    $lr = tMOVr $r3, 14, $noreg
+    renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg
+
+  bb.5.bb28:
+    successors: %bb.5(0x7c000000), %bb.6(0x04000000)
+    liveins: $r0, $r1, $r2, $r3, $r8, $lr
+
+    renamable $r5 = tLDRr renamable $r1, $r3, 14, $noreg :: (load 4 from %ir.scevgep617)
+    renamable $r7, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14, $noreg
+    renamable $r6 = tLDRr renamable $r2, $r3, 14, $noreg :: (load 4 from %ir.scevgep418)
+    renamable $r8 = nuw t2ADDri killed renamable $r8, 4, 14, $noreg, $noreg
+    renamable $r5, dead $cpsr = tEOR killed renamable $r5, killed renamable $r6, 14, $noreg
+    renamable $r6 = tLDRr renamable $r0, $r3, 14, $noreg :: (load 4 from %ir.scevgep219)
+    renamable $lr = t2LoopDec killed renamable $lr, 1
+    renamable $r5 = nsw tADDhirr killed renamable $r5, killed renamable $r6, 14, $noreg
+    tSTRr killed renamable $r5, renamable $r0, $r3, 14, $noreg :: (store 4 into %ir.scevgep219)
+    renamable $r5, dead $cpsr = tADDrr renamable $r1, renamable $r3, 14, $noreg
+    renamable $r4 = tLDRi renamable $r7, 1, 14, $noreg :: (load 4 from %ir.scevgep11)
+    renamable $r6 = tLDRi renamable $r5, 1, 14, $noreg :: (load 4 from %ir.scevgep14)
+    renamable $r9 = t2EORrr killed renamable $r4, killed renamable $r6, 14, $noreg, $noreg
+    renamable $r6, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14, $noreg
+    $r11 = t2ADDri $r6, 4, 14, $noreg, $noreg
+    renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 16, 14, $noreg
+    t2LDMIA killed $r11, 14, $noreg, def $r4, def $r10, def $r11 :: (load 4 from %ir.scevgep9), (load 4 from %ir.scevgep8), (load 4 from %ir.scevgep1)
+    renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r9, 14, $noreg
+    tSTRi killed renamable $r4, renamable $r6, 1, 14, $noreg :: (store 4 into %ir.scevgep9)
+    renamable $r9 = t2LDRi12 renamable $r5, 8, 14, $noreg :: (load 4 from %ir.scevgep12)
+    renamable $r4 = tLDRi renamable $r7, 2, 14, $noreg :: (load 4 from %ir.scevgep10)
+    renamable $r4 = t2EORrr killed renamable $r4, killed renamable $r9, 14, $noreg, $noreg
+    renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r10, 14, $noreg
+    tSTRi killed renamable $r4, renamable $r6, 2, 14, $noreg :: (store 4 into %ir.scevgep8)
+    renamable $r4 = tLDRi killed renamable $r5, 3, 14, $noreg :: (load 4 from %ir.scevgep5)
+    renamable $r5 = tLDRi killed renamable $r7, 3, 14, $noreg :: (load 4 from %ir.scevgep3)
+    renamable $r4, dead $cpsr = tEOR killed renamable $r4, killed renamable $r5, 14, $noreg
+    renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r11, 14, $noreg
+    tSTRi killed renamable $r4, killed renamable $r6, 3, 14, $noreg :: (store 4 into %ir.scevgep1)
+    t2LoopEnd renamable $lr, %bb.5, implicit-def dead $cpsr
+    tB %bb.6, 14, $noreg
+
+  bb.6.bb13:
+    successors: %bb.12(0x30000000), %bb.7(0x50000000)
+    liveins: $lr, $r0, $r1, $r2, $r8
+
+    renamable $r5 = tLDRspi $sp, 0, 14, $noreg :: (load 4 from %stack.0)
+    tCBZ $r5, %bb.12
+
+  bb.7.bb16:
+    successors: %bb.8(0x40000000), %bb.9(0x40000000)
+    liveins: $lr, $r0, $r1, $r2, $r5, $r8
+
+    renamable $lr = t2LDRs renamable $r1, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp17)
+    tCMPi8 renamable $r5, 1, 14, $noreg, implicit-def $cpsr
+    renamable $r3 = t2LDRs renamable $r2, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp19)
+    renamable $lr = t2EORrr killed renamable $lr, killed renamable $r3, 14, $noreg, $noreg
+    renamable $r3 = t2LDRs renamable $r0, renamable $r8, 2, 14, $noreg :: (load 4 from %ir.tmp22)
+    renamable $r3 = nsw tADDhirr killed renamable $r3, killed renamable $lr, 14, $noreg
+    t2STRs killed renamable $r3, renamable $r0, renamable $r8, 2, 14, $noreg :: (store 4 into %ir.tmp22)
+    tBcc %bb.9, 1, killed $cpsr
+
+  bb.8:
+    successors: %bb.12(0x80000000)
+
+    renamable $lr = t2MOVi 1, 14, $noreg, $noreg
+    tB %bb.12, 14, $noreg
+
+  bb.9.bb57:
+    successors: %bb.10(0x40000000), %bb.11(0x40000000)
+    liveins: $r0, $r1, $r2, $r5, $r8
+
+    renamable $r3 = nuw t2ADDri renamable $r8, 1, 14, $noreg, $noreg
+    tCMPi8 killed renamable $r5, 2, 14, $noreg, implicit-def $cpsr
+    renamable $r7 = t2LDRs renamable $r1, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp58)
+    renamable $r6 = t2LDRs renamable $r2, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp60)
+    renamable $r7 = t2EORrr killed renamable $r7, killed renamable $r6, 14, $noreg, $noreg
+    renamable $r6 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp63)
+    renamable $r7 = nsw tADDhirr killed renamable $r7, killed renamable $r6, 14, $noreg
+    t2STRs killed renamable $r7, renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store 4 into %ir.tmp63)
+    tBcc %bb.11, 1, killed $cpsr
+
+  bb.10:
+    successors: %bb.12(0x80000000)
+
+    renamable $lr = t2MOVi 2, 14, $noreg, $noreg
+    tB %bb.12, 14, $noreg
+
+  bb.11.bb68:
+    successors: %bb.12(0x80000000)
+    liveins: $r0, $r1, $r2, $r8
+
+    renamable $r3 = nuw t2ADDri killed renamable $r8, 2, 14, $noreg, $noreg
+    renamable $lr = t2MOVi 3, 14, $noreg, $noreg
+    renamable $r1 = t2LDRs killed renamable $r1, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp69)
+    renamable $r2 = t2LDRs killed renamable $r2, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp71)
+    renamable $r1, dead $cpsr = tEOR killed renamable $r1, killed renamable $r2, 14, $noreg
+    renamable $r2 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load 4 from %ir.tmp74)
+    renamable $r1 = nsw tADDhirr killed renamable $r1, killed renamable $r2, 14, $noreg
+    t2STRs killed renamable $r1, killed renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store 4 into %ir.tmp74)
+
+  bb.12.bb27:
+    liveins: $lr
+
+    $r0 = tMOVr killed $lr, 14, $noreg
+    $sp = tADDspi $sp, 1, 14, $noreg
+    $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc, implicit killed $r0
+
+...
diff --git a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/remove-elem-moves.mir b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/remove-elem-moves.mir
--- a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/remove-elem-moves.mir
+++ b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/remove-elem-moves.mir
@@ -175,18 +175,21 @@
   ; CHECK:   renamable $r7, dead $cpsr = tSUBrr renamable $r2, renamable $r4, 14, $noreg
   ; CHECK:   renamable $r3 = nuw nsw t2ADDrs killed renamable $r3, killed renamable $r12, 19, 14, $noreg, $noreg
   ; CHECK:   renamable $r12 = t2ADDrs renamable $r0, renamable $r4, 18, 14, $noreg, $noreg
-  ; CHECK:   $lr = t2DLS renamable $r3
   ; CHECK:   renamable $r0, dead $cpsr = tSUBi8 killed renamable $r0, 16, 14, $noreg
-  ; CHECK:   dead $r5 = tMOVr killed $r3, 14, $noreg
+  ; CHECK:   $r5 = tMOVr killed $r3, 14, $noreg
   ; CHECK:   renamable $r3 = t2ADDrs renamable $r1, renamable $r4, 18, 14, $noreg, $noreg
   ; CHECK:   renamable $r1, dead $cpsr = tSUBi8 killed renamable $r1, 16, 14, $noreg
   ; CHECK: bb.4.vector.body:
   ; CHECK:   successors: %bb.4(0x7c000000), %bb.5(0x04000000)
-  ; CHECK:   liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r7, $r12
+  ; CHECK:   liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r7, $r12
   ; CHECK:   renamable $r0, renamable $q0 = MVE_VLDRWU32_pre killed renamable $r0, 16, 0, $noreg :: (load 16 from %ir.scevgep18, align 4)
+  ; CHECK:   $lr = tMOVr killed $r5, 14, $noreg
   ; CHECK:   renamable $q0 = nnan ninf nsz arcp contract afn reassoc MVE_VABSf32 killed renamable $q0, 0, $noreg, undef renamable $q0
   ; CHECK:   renamable $r1 = MVE_VSTRBU8_pre killed renamable $q0, killed renamable $r1, 16, 0, $noreg :: (store 16 into %ir.scevgep13, align 4)
-  ; CHECK:   $lr = t2LEUpdate killed renamable $lr, %bb.4
+  ; CHECK:   $lr = t2SUBri killed renamable $lr, 1, 14, $noreg, def $cpsr
+  ; CHECK:   $r5 = tMOVr killed $lr, 14, $noreg
+  ; CHECK:   tBcc %bb.4, 1, killed $cpsr
+  ; CHECK:   tB %bb.5, 14, $noreg
   ; CHECK: bb.5.middle.block:
   ; CHECK:   successors: %bb.7(0x80000000)
   ; CHECK:   liveins: $r2, $r3, $r4, $r7, $r12