Index: lib/CodeGen/CGStmt.cpp =================================================================== --- lib/CodeGen/CGStmt.cpp +++ lib/CodeGen/CGStmt.cpp @@ -1696,7 +1696,7 @@ static std::string AddVariableConstraints(const std::string &Constraint, const Expr &AsmExpr, const TargetInfo &Target, CodeGenModule &CGM, - const AsmStmt &Stmt) { + const AsmStmt &Stmt, const bool EarlyClobber) { const DeclRefExpr *AsmDeclRef = dyn_cast(&AsmExpr); if (!AsmDeclRef) return Constraint; @@ -1721,7 +1721,7 @@ } // Canonicalize the register here before returning it. Register = Target.getNormalizedGCCRegisterName(Register); - return "{" + Register.str() + "}"; + return (EarlyClobber ? "&{" : "{") + Register.str() + "}"; } llvm::Value* @@ -1854,7 +1854,8 @@ OutExpr = OutExpr->IgnoreParenNoopCasts(getContext()); OutputConstraint = AddVariableConstraints(OutputConstraint, *OutExpr, - getTarget(), CGM, S); + getTarget(), CGM, S, + Info.earlyClobber()); LValue Dest = EmitLValue(OutExpr); if (!Constraints.empty()) @@ -1959,7 +1960,7 @@ InputConstraint = AddVariableConstraints(InputConstraint, *InputExpr->IgnoreParenNoopCasts(getContext()), - getTarget(), CGM, S); + getTarget(), CGM, S, Info.earlyClobber()); llvm::Value *Arg = EmitAsmInput(Info, InputExpr, Constraints); Index: test/CodeGen/arm-asm-variable.c =================================================================== --- test/CodeGen/arm-asm-variable.c +++ test/CodeGen/arm-asm-variable.c @@ -17,7 +17,7 @@ : [_rl] "=&r" (rl), [_rh] "=&r" (rh) \ : [_p] "p" (p) : "memory"); - // CHECK: call { i32, i32 } asm sideeffect "ldrexd$0, $1, [$2]", "={r1},={r2},r,~{memory}"(i64* + // CHECK: call { i32, i32 } asm sideeffect "ldrexd$0, $1, [$2]", "=&{r1},=&{r2},r,~{memory}"(i64* return r; } Index: test/CodeGen/asm-reg-var-local.c =================================================================== --- test/CodeGen/asm-reg-var-local.c +++ test/CodeGen/asm-reg-var-local.c @@ -2,6 +2,7 @@ // Exercise various use cases for local asm "register variables". int foo() { +// CHECK-LABEL: define i32 @foo() // CHECK: [[A:%[a-zA-Z0-9]+]] = alloca i32 register int a asm("rsi")=5; @@ -22,3 +23,26 @@ // CHECK: [[TMP1:%[a-zA-Z0-9]+]] = load i32* [[A]] // CHECK: ret i32 [[TMP1]] } + +int earlyclobber() { +// CHECK-LABEL: define i32 @earlyclobber() +// CHECK: [[A:%[a-zA-Z0-9]+]] = alloca i32 + + register int a asm("rsi")=5; +// CHECK: store i32 5, i32* [[A]] + + asm volatile("; %0 This asm defines rsi" : "=&r"(a)); +// CHECK: [[Z:%[a-zA-Z0-9]+]] = call i32 asm sideeffect "; $0 This asm defines rsi", "=&{rsi},~{dirflag},~{fpsr},~{flags}"() +// CHECK: store i32 [[Z]], i32* [[A]] + + a = 42; +// CHECK: store i32 42, i32* [[A]] + + asm volatile("; %0 This asm uses rsi" : : "r"(a)); +// CHECK: [[TMP:%[a-zA-Z0-9]+]] = load i32* [[A]] +// CHECK: call void asm sideeffect "; $0 This asm uses rsi", "{rsi},~{dirflag},~{fpsr},~{flags}"(i32 [[TMP]]) + + return a; +// CHECK: [[TMP1:%[a-zA-Z0-9]+]] = load i32* [[A]] +// CHECK: ret i32 [[TMP1]] +}