Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -3667,7 +3667,11 @@
         LegalizeSetCCCondCode(Node->getValueType(0), Tmp1, Tmp2, Tmp3,
                               NeedInvert, dl, Chain, IsSignaling);
 
-    if (Legalized) {
+    // If the condition code can be legalized then we can convert to a SETCC
+    // using that condition code. If we have a strict SETCC the condition code
+    // may already be legal, in which case we similarly convert to a non-strict
+    // SETCC with the condition code we already have.
+    if (Legalized || IsStrict) {
       // If we expanded the SETCC by swapping LHS and RHS, or by inverting the
       // condition code, create a new SETCC node.
       if (Tmp3.getNode())
@@ -3686,10 +3690,6 @@
       break;
     }
 
-    // FIXME: It seems Legalized is false iff CCCode is Legal. I don't
-    // understand if this code is useful for strict nodes.
-    assert(!IsStrict && "Don't know how to expand for strict nodes.");
-
     // Otherwise, SETCC for the given comparison type must be completely
     // illegal; expand it into a SELECT_CC.
     EVT VT = Node->getValueType(0);
Index: llvm/test/CodeGen/ARM/fp-intrinsics.ll
===================================================================
--- llvm/test/CodeGen/ARM/fp-intrinsics.ll
+++ llvm/test/CodeGen/ARM/fp-intrinsics.ll
@@ -8,9 +8,8 @@
 ; hardware being present or absent work as expected (i.e. we get an instruction
 ; when one is available, otherwise a libcall).
 
-; FIXME: Tests fails as various things in CodeGen and Target/ARM need fixing.
-; XFAIL: *
-
+; FIXME: We're not generating the right instructions for some of these
+; operations (see further FIXMEs down below).
 
 ; Single-precision intrinsics
 
@@ -71,7 +70,7 @@
 
 ; CHECK-LABEL: fptoui_f32:
 ; CHECK-NOSP: bl __aeabi_f2uiz
-; CHECK-SP: vcvt.u32.f32
+; FIXME-CHECK-SP: vcvt.u32.f32
 define i32 @fptoui_f32(float %x) #0 {
   %val = call i32 @llvm.experimental.constrained.fptoui.f32(float %x, metadata !"fpexcept.strict") #0
   ret i32 %val
@@ -300,7 +299,7 @@
 
 ; CHECK-LABEL: fptoui_f64:
 ; CHECK-NODP: bl __aeabi_d2uiz
-; CHECK-DP: vcvt.u32.f64
+; FIXME-CHECK-DP: vcvt.u32.f64
 define i32 @fptoui_f64(double %x) #0 {
   %val = call i32 @llvm.experimental.constrained.fptoui.f64(double %x, metadata !"fpexcept.strict") #0
   ret i32 %val
@@ -490,15 +489,15 @@
 
 ; CHECK-LABEL: sitofp_f32_i32:
 ; CHECK-NOSP: bl __aeabi_i2f
-; CHECK-SP: vcvt.f32.s32
+; FIXME-CHECK-SP: vcvt.f32.s32
 define float @sitofp_f32_i32(i32 %x) #0 {
   %val = call float @llvm.experimental.constrained.sitofp.f32.i32(i32 %x, metadata !"round.tonearest", metadata !"fpexcept.strict") #0
   ret float %val
 }
 
 ; CHECK-LABEL: sitofp_f64_i32:
-; CHECK-NODP: bl __aeabi_i2d
-; CHECK-DP: vcvt.f64.s32
+; FIXME-CHECK-NODP: bl __aeabi_i2d
+; FIXME-CHECK-DP: vcvt.f64.s32
 define double @sitofp_f64_i32(i32 %x) #0 {
   %val = call double @llvm.experimental.constrained.sitofp.f64.i32(i32 %x, metadata !"round.tonearest", metadata !"fpexcept.strict") #0
   ret double %val