Index: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp =================================================================== --- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -666,7 +666,8 @@ } }; - const auto needToSplitMemOp = [=](const LegalityQuery &Query, bool IsLoad) -> bool { + const auto needToSplitMemOp = [=](const LegalityQuery &Query, + bool IsLoad) -> bool { const LLT DstTy = Query.Types[0]; // Split vector extloads. @@ -686,9 +687,15 @@ // Catch weird sized loads that don't evenly divide into the access sizes // TODO: May be able to widen depending on alignment etc. - unsigned NumRegs = MemSize / 32; - if (NumRegs == 3 && !ST.hasDwordx3LoadStores()) - return true; + unsigned NumRegs = (MemSize + 31) / 32; + if (NumRegs == 3) { + if (!ST.hasDwordx3LoadStores()) + return true; + } else { + // If the alignment allows, these should have been widened. + if (!isPowerOf2_32(NumRegs)) + return true; + } if (Align < MemSize) { const SITargetLowering *TLI = ST.getTargetLowering(); @@ -698,6 +705,23 @@ return false; }; + const auto shouldWidenLoadResult = [=](const LegalityQuery &Query) -> bool { + unsigned Size = Query.Types[0].getSizeInBits(); + if (isPowerOf2_32(Size)) + return false; + + if (Size == 96 && ST.hasDwordx3LoadStores()) + return false; + + unsigned AddrSpace = Query.Types[1].getAddressSpace(); + if (Size >= maxSizeForAddrSpace(AddrSpace, true)) + return false; + + unsigned Align = Query.MMODescrs[0].AlignInBits; + unsigned RoundedSize = NextPowerOf2(Size); + return (Align >= RoundedSize); + }; + unsigned GlobalAlign32 = ST.hasUnalignedBufferAccess() ? 0 : 32; unsigned GlobalAlign16 = ST.hasUnalignedBufferAccess() ? 0 : 16; unsigned GlobalAlign8 = ST.hasUnalignedBufferAccess() ? 0 : 8; @@ -711,13 +735,9 @@ auto &Actions = getActionDefinitionsBuilder(Op); // Whitelist the common cases. - // TODO: Pointer loads - // TODO: Wide constant loads - // TODO: Only CI+ has 3x loads // TODO: Loads to s16 on gfx9 Actions.legalForTypesWithMemDesc({{S32, GlobalPtr, 32, GlobalAlign32}, {V2S32, GlobalPtr, 64, GlobalAlign32}, - {V3S32, GlobalPtr, 96, GlobalAlign32}, {S96, GlobalPtr, 96, GlobalAlign32}, {V4S32, GlobalPtr, 128, GlobalAlign32}, {S128, GlobalPtr, 128, GlobalAlign32}, @@ -746,13 +766,23 @@ {S32, ConstantPtr, 32, GlobalAlign32}, {V2S32, ConstantPtr, 64, GlobalAlign32}, - {V3S32, ConstantPtr, 96, GlobalAlign32}, {V4S32, ConstantPtr, 128, GlobalAlign32}, {S64, ConstantPtr, 64, GlobalAlign32}, {S128, ConstantPtr, 128, GlobalAlign32}, {V2S32, ConstantPtr, 32, GlobalAlign32}}); Actions .customIf(typeIs(1, Constant32Ptr)) + // Widen suitably aligned loads by loading extra elements. + .moreElementsIf([=](const LegalityQuery &Query) { + const LLT Ty = Query.Types[0]; + return Op == G_LOAD && Ty.isVector() && + shouldWidenLoadResult(Query); + }, moreElementsToNextPow2(0)) + .widenScalarIf([=](const LegalityQuery &Query) { + const LLT Ty = Query.Types[0]; + return Op == G_LOAD && !Ty.isVector() && + shouldWidenLoadResult(Query); + }, widenScalarOrEltToNextPow2(0)) .narrowScalarIf( [=](const LegalityQuery &Query) -> bool { return !Query.Types[0].isVector() && @@ -796,6 +826,10 @@ unsigned MaxSize = maxSizeForAddrSpace(PtrTy.getAddressSpace(), Op == G_LOAD); + // FIXME: Handle widened to power of 2 results better. This ends + // up scalarizing. + // FIXME: 3 element stores scalarized on SI + // Split if it's too large for the address space. if (Query.MMODescrs[0].SizeInBits > MaxSize) { unsigned NumElts = DstTy.getNumElements(); @@ -868,7 +902,6 @@ } }) .widenScalarToNextPow2(0) - // TODO: v3s32->v4s32 with alignment .moreElementsIf(vectorSmallerThan(0, 32), moreEltsToNext32Bit(0)); } Index: llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir =================================================================== --- llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir +++ llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir @@ -1,4 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=SI %s # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=bonaire -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=CI %s # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=VI %s # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX9 %s @@ -11,6 +12,13 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s1_align1 + ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] + ; SI: $vgpr0 = COPY [[AND]](s32) ; CI-LABEL: name: test_load_constant_s1_align1 ; CI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 1, addrspace 4) @@ -58,6 +66,13 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s2_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] + ; SI: $vgpr0 = COPY [[AND]](s32) ; CI-LABEL: name: test_load_constant_s2_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -105,6 +120,11 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s8_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, align 4, addrspace 4) + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: $vgpr0 = COPY [[COPY1]](s32) ; CI-LABEL: name: test_load_constant_s8_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, align 4, addrspace 4) @@ -142,6 +162,11 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s8_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: $vgpr0 = COPY [[COPY1]](s32) ; CI-LABEL: name: test_load_constant_s8_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -179,6 +204,11 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s16_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, align 4, addrspace 4) + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: $vgpr0 = COPY [[COPY1]](s32) ; CI-LABEL: name: test_load_constant_s16_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, align 4, addrspace 4) @@ -216,6 +246,11 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s16_align2 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: $vgpr0 = COPY [[COPY1]](s32) ; CI-LABEL: name: test_load_constant_s16_align2 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) @@ -253,6 +288,24 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s16_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] + ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) + ; SI: $vgpr0 = COPY [[ANYEXT]](s32) ; CI-LABEL: name: test_load_constant_s16_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -349,6 +402,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s32_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; SI: $vgpr0 = COPY [[LOAD]](s32) ; CI-LABEL: name: test_load_constant_s32_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) @@ -380,6 +437,21 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s32_align2 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 2, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] + ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) + ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] + ; SI: $vgpr0 = COPY [[OR]](s32) ; CI-LABEL: name: test_load_constant_s32_align2 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) @@ -466,6 +538,42 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s32_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]] + ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C4]](s32) + ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C5]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C3]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C5]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) + ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) + ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C6]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] + ; SI: $vgpr0 = COPY [[OR2]](s32) ; CI-LABEL: name: test_load_constant_s32_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -645,6 +753,13 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s48_align8 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 6, align 8, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 281474976710655 + ; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY [[LOAD]](s64) + ; SI: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]] + ; SI: $vgpr0_vgpr1 = COPY [[AND]](s64) ; CI-LABEL: name: test_load_constant_s48_align8 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 6, align 8, addrspace 4) @@ -692,6 +807,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s64_align8 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) ; CI-LABEL: name: test_load_constant_s64_align8 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) @@ -723,6 +842,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s64_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 8, align 4, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) ; CI-LABEL: name: test_load_constant_s64_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 8, align 4, addrspace 4) @@ -754,6 +877,34 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s64_align2 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 2, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 2, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 2, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] + ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) + ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] + ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) + ; SI: $vgpr0_vgpr1 = COPY [[MV]](s64) ; CI-LABEL: name: test_load_constant_s64_align2 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) @@ -905,6 +1056,75 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s64_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 1, addrspace 4) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 5 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 1, addrspace 4) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 1, addrspace 4) + ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 7 + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 1, addrspace 4) + ; SI: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] + ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C9]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C9]] + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) + ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] + ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) + ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] + ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) + ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C9]] + ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C8]](s32) + ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) + ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] + ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) + ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) + ; SI: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C10]](s32) + ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] + ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) + ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) + ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C10]](s32) + ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] + ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) + ; SI: $vgpr0_vgpr1 = COPY [[MV]](s64) ; CI-LABEL: name: test_load_constant_s64_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -1237,6 +1457,11 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s96_align16 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p4) :: (load 12, align 16, addrspace 4) + ; SI: [[TRUNC:%[0-9]+]]:_(s96) = G_TRUNC [[LOAD]](s128) + ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[TRUNC]](s96) ; CI-LABEL: name: test_load_constant_s96_align16 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 16, addrspace 4) @@ -1268,6 +1493,16 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s96_align8 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, align 8, addrspace 4) + ; SI: [[DEF:%[0-9]+]]:_(s96) = G_IMPLICIT_DEF + ; SI: [[INSERT:%[0-9]+]]:_(s96) = G_INSERT [[DEF]], [[LOAD]](s64), 0 + ; SI: [[INSERT1:%[0-9]+]]:_(s96) = G_INSERT [[INSERT]], [[LOAD1]](s32), 64 + ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT1]](s96) ; CI-LABEL: name: test_load_constant_s96_align8 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 8, addrspace 4) @@ -1299,6 +1534,17 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s96_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 4) + ; SI: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) + ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[MV]](s96) ; CI-LABEL: name: test_load_constant_s96_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4) @@ -1330,6 +1576,46 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s96_align2 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 2, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 2, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 2, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 2, addrspace 4) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 10 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 2, addrspace 4) + ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C5]] + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C5]] + ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C6]](s32) + ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C5]] + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C5]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C5]] + ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C5]] + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C6]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] + ; SI: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32), [[OR2]](s32) + ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[MV]](s96) ; CI-LABEL: name: test_load_constant_s96_align2 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) @@ -1541,6 +1827,107 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s96_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 1, addrspace 4) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 5 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 1, addrspace 4) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 1, addrspace 4) + ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 7 + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 1, addrspace 4) + ; SI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 1, addrspace 4) + ; SI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 9 + ; SI: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C8]](s64) + ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 1, addrspace 4) + ; SI: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 10 + ; SI: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C9]](s64) + ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 1, addrspace 4) + ; SI: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 11 + ; SI: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C10]](s64) + ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 1, addrspace 4) + ; SI: [[C11:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C11]] + ; SI: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C12]](s32) + ; SI: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C13]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C11]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C12]](s32) + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C13]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C11]] + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C12]](s32) + ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C13]] + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) + ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] + ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) + ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C11]] + ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[C12]](s32) + ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) + ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C13]] + ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[COPY7]](s32) + ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) + ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] + ; SI: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD8]](s32) + ; SI: [[AND8:%[0-9]+]]:_(s16) = G_AND [[TRUNC8]], [[C11]] + ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[C12]](s32) + ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) + ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C13]] + ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[COPY9]](s32) + ; SI: [[TRUNC9:%[0-9]+]]:_(s16) = G_TRUNC [[SHL4]](s32) + ; SI: [[OR4:%[0-9]+]]:_(s16) = G_OR [[AND8]], [[TRUNC9]] + ; SI: [[TRUNC10:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD10]](s32) + ; SI: [[AND10:%[0-9]+]]:_(s16) = G_AND [[TRUNC10]], [[C11]] + ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) + ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C13]] + ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C12]](s32) + ; SI: [[TRUNC11:%[0-9]+]]:_(s16) = G_TRUNC [[SHL5]](s32) + ; SI: [[OR5:%[0-9]+]]:_(s16) = G_OR [[AND10]], [[TRUNC11]] + ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) + ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) + ; SI: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C14]](s32) + ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL6]] + ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) + ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) + ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C14]](s32) + ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL7]] + ; SI: [[ZEXT4:%[0-9]+]]:_(s32) = G_ZEXT [[OR4]](s16) + ; SI: [[ZEXT5:%[0-9]+]]:_(s32) = G_ZEXT [[OR5]](s16) + ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[ZEXT5]], [[C14]](s32) + ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[ZEXT4]], [[SHL8]] + ; SI: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[OR6]](s32), [[OR7]](s32), [[OR8]](s32) + ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[MV]](s96) ; CI-LABEL: name: test_load_constant_s96_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -2021,31 +2408,108 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s160_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, addrspace 4) + ; SI: [[MV:%[0-9]+]]:_(s160) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32) + ; SI: S_NOP 0, implicit [[MV]](s160) ; CI-LABEL: name: test_load_constant_s160_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; CI: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 20, align 4, addrspace 4) - ; CI: [[TRUNC:%[0-9]+]]:_(s160) = G_TRUNC [[LOAD]](s256) - ; CI: S_NOP 0, implicit [[TRUNC]](s160) + ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; CI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; CI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; CI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 4) + ; CI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; CI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, addrspace 4) + ; CI: [[MV:%[0-9]+]]:_(s160) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32) + ; CI: S_NOP 0, implicit [[MV]](s160) ; VI-LABEL: name: test_load_constant_s160_align4 ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; VI: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 20, align 4, addrspace 4) - ; VI: [[TRUNC:%[0-9]+]]:_(s160) = G_TRUNC [[LOAD]](s256) - ; VI: S_NOP 0, implicit [[TRUNC]](s160) + ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; VI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; VI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 4) + ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; VI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; VI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; VI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, addrspace 4) + ; VI: [[MV:%[0-9]+]]:_(s160) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32) + ; VI: S_NOP 0, implicit [[MV]](s160) ; GFX9-LABEL: name: test_load_constant_s160_align4 ; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; GFX9: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 20, align 4, addrspace 4) - ; GFX9: [[TRUNC:%[0-9]+]]:_(s160) = G_TRUNC [[LOAD]](s256) - ; GFX9: S_NOP 0, implicit [[TRUNC]](s160) + ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, addrspace 4) + ; GFX9: [[MV:%[0-9]+]]:_(s160) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32) + ; GFX9: S_NOP 0, implicit [[MV]](s160) ; CI-MESA-LABEL: name: test_load_constant_s160_align4 ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; CI-MESA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 20, align 4, addrspace 4) - ; CI-MESA: [[TRUNC:%[0-9]+]]:_(s160) = G_TRUNC [[LOAD]](s256) - ; CI-MESA: S_NOP 0, implicit [[TRUNC]](s160) + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; CI-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI-MESA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI-MESA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-MESA: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; CI-MESA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI-MESA: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; CI-MESA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[MV:%[0-9]+]]:_(s160) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32) + ; CI-MESA: S_NOP 0, implicit [[MV]](s160) ; GFX9-MESA-LABEL: name: test_load_constant_s160_align4 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 20, align 4, addrspace 4) - ; GFX9-MESA: [[TRUNC:%[0-9]+]]:_(s160) = G_TRUNC [[LOAD]](s256) - ; GFX9-MESA: S_NOP 0, implicit [[TRUNC]](s160) + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; GFX9-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9-MESA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9-MESA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-MESA: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; GFX9-MESA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9-MESA: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; GFX9-MESA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[MV:%[0-9]+]]:_(s160) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32) + ; GFX9-MESA: S_NOP 0, implicit [[MV]](s160) %0:_(p4) = COPY $vgpr0_vgpr1 %1:_(s160) = G_LOAD %0 :: (load 20, align 4, addrspace 4) S_NOP 0, implicit %1 @@ -2057,40 +2521,155 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s224_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, addrspace 4) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, addrspace 4) + ; SI: [[MV:%[0-9]+]]:_(s224) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32) + ; SI: [[DEF:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF + ; SI: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[MV]](s224), 0 + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](s256) ; CI-LABEL: name: test_load_constant_s224_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; CI: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 28, align 4, addrspace 4) - ; CI: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[LOAD]](s256) + ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; CI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; CI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; CI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 4) + ; CI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; CI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, addrspace 4) + ; CI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; CI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; CI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; CI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, addrspace 4) + ; CI: [[MV:%[0-9]+]]:_(s224) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32) ; CI: [[DEF:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF - ; CI: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[TRUNC]](s224), 0 + ; CI: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[MV]](s224), 0 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](s256) ; VI-LABEL: name: test_load_constant_s224_align4 ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; VI: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 28, align 4, addrspace 4) - ; VI: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[LOAD]](s256) + ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; VI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; VI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 4) + ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; VI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; VI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; VI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, addrspace 4) + ; VI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; VI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; VI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; VI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, addrspace 4) + ; VI: [[MV:%[0-9]+]]:_(s224) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32) ; VI: [[DEF:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF - ; VI: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[TRUNC]](s224), 0 + ; VI: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[MV]](s224), 0 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](s256) ; GFX9-LABEL: name: test_load_constant_s224_align4 ; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; GFX9: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 28, align 4, addrspace 4) - ; GFX9: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[LOAD]](s256) + ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, addrspace 4) + ; GFX9: [[MV:%[0-9]+]]:_(s224) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32) ; GFX9: [[DEF:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF - ; GFX9: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[TRUNC]](s224), 0 + ; GFX9: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[MV]](s224), 0 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](s256) ; CI-MESA-LABEL: name: test_load_constant_s224_align4 ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; CI-MESA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 28, align 4, addrspace 4) - ; CI-MESA: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[LOAD]](s256) + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; CI-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI-MESA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI-MESA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-MESA: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; CI-MESA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI-MESA: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; CI-MESA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; CI-MESA: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; CI-MESA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; CI-MESA: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; CI-MESA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[MV:%[0-9]+]]:_(s224) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32) ; CI-MESA: [[DEF:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF - ; CI-MESA: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[TRUNC]](s224), 0 + ; CI-MESA: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[MV]](s224), 0 ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](s256) ; GFX9-MESA-LABEL: name: test_load_constant_s224_align4 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 28, align 4, addrspace 4) - ; GFX9-MESA: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[LOAD]](s256) + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; GFX9-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9-MESA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9-MESA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-MESA: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; GFX9-MESA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9-MESA: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; GFX9-MESA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; GFX9-MESA: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; GFX9-MESA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; GFX9-MESA: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; GFX9-MESA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[MV:%[0-9]+]]:_(s224) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32) ; GFX9-MESA: [[DEF:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF - ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[TRUNC]](s224), 0 + ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[MV]](s224), 0 ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](s256) %0:_(p4) = COPY $vgpr0_vgpr1 %1:_(s224) = G_LOAD %0 :: (load 28, align 4, addrspace 4) @@ -2106,6 +2685,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s128_align16 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p4) :: (load 16, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](s128) ; CI-LABEL: name: test_load_constant_s128_align16 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p4) :: (load 16, addrspace 4) @@ -2137,6 +2720,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s128_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p4) :: (load 16, align 4, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](s128) ; CI-LABEL: name: test_load_constant_s128_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p4) :: (load 16, align 4, addrspace 4) @@ -2168,6 +2755,139 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s128_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 1, addrspace 4) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 5 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 1, addrspace 4) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 1, addrspace 4) + ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 7 + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 1, addrspace 4) + ; SI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 1, addrspace 4) + ; SI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 9 + ; SI: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C8]](s64) + ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 1, addrspace 4) + ; SI: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 10 + ; SI: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C9]](s64) + ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 1, addrspace 4) + ; SI: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 11 + ; SI: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C10]](s64) + ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 1, addrspace 4) + ; SI: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 1, addrspace 4) + ; SI: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 13 + ; SI: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C12]](s64) + ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 1, addrspace 4) + ; SI: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 14 + ; SI: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C13]](s64) + ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 1, addrspace 4) + ; SI: [[C14:%[0-9]+]]:_(s64) = G_CONSTANT i64 15 + ; SI: [[PTR_ADD14:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C14]](s64) + ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p4) :: (load 1, addrspace 4) + ; SI: [[C15:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C15]] + ; SI: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C16]](s32) + ; SI: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C17]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C15]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C16]](s32) + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C17]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C15]] + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C16]](s32) + ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C17]] + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) + ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] + ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) + ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C15]] + ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[C16]](s32) + ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) + ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C17]] + ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[COPY7]](s32) + ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) + ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] + ; SI: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD8]](s32) + ; SI: [[AND8:%[0-9]+]]:_(s16) = G_AND [[TRUNC8]], [[C15]] + ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[C16]](s32) + ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) + ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C17]] + ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[COPY9]](s32) + ; SI: [[TRUNC9:%[0-9]+]]:_(s16) = G_TRUNC [[SHL4]](s32) + ; SI: [[OR4:%[0-9]+]]:_(s16) = G_OR [[AND8]], [[TRUNC9]] + ; SI: [[TRUNC10:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD10]](s32) + ; SI: [[AND10:%[0-9]+]]:_(s16) = G_AND [[TRUNC10]], [[C15]] + ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[C16]](s32) + ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) + ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C17]] + ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[COPY11]](s32) + ; SI: [[TRUNC11:%[0-9]+]]:_(s16) = G_TRUNC [[SHL5]](s32) + ; SI: [[OR5:%[0-9]+]]:_(s16) = G_OR [[AND10]], [[TRUNC11]] + ; SI: [[TRUNC12:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD12]](s32) + ; SI: [[AND12:%[0-9]+]]:_(s16) = G_AND [[TRUNC12]], [[C15]] + ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[C16]](s32) + ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) + ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C17]] + ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[COPY13]](s32) + ; SI: [[TRUNC13:%[0-9]+]]:_(s16) = G_TRUNC [[SHL6]](s32) + ; SI: [[OR6:%[0-9]+]]:_(s16) = G_OR [[AND12]], [[TRUNC13]] + ; SI: [[TRUNC14:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD14]](s32) + ; SI: [[AND14:%[0-9]+]]:_(s16) = G_AND [[TRUNC14]], [[C15]] + ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) + ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C17]] + ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C16]](s32) + ; SI: [[TRUNC15:%[0-9]+]]:_(s16) = G_TRUNC [[SHL7]](s32) + ; SI: [[OR7:%[0-9]+]]:_(s16) = G_OR [[AND14]], [[TRUNC15]] + ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) + ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) + ; SI: [[C18:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C18]](s32) + ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL8]] + ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) + ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) + ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C18]](s32) + ; SI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL9]] + ; SI: [[ZEXT4:%[0-9]+]]:_(s32) = G_ZEXT [[OR4]](s16) + ; SI: [[ZEXT5:%[0-9]+]]:_(s32) = G_ZEXT [[OR5]](s16) + ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[ZEXT5]], [[C18]](s32) + ; SI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[ZEXT4]], [[SHL10]] + ; SI: [[ZEXT6:%[0-9]+]]:_(s32) = G_ZEXT [[OR6]](s16) + ; SI: [[ZEXT7:%[0-9]+]]:_(s32) = G_ZEXT [[OR7]](s16) + ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[ZEXT7]], [[C18]](s32) + ; SI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[ZEXT6]], [[SHL11]] + ; SI: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[OR8]](s32), [[OR9]](s32), [[OR10]](s32), [[OR11]](s32) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128) ; CI-LABEL: name: test_load_constant_s128_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -2796,6 +3516,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s256_align32 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 32, align 16, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](s256) ; CI-LABEL: name: test_load_constant_s256_align32 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 32, align 16, addrspace 4) @@ -2821,12 +3545,170 @@ $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1 ... +--- +name: test_load_constant_s288_align32 +body: | + bb.0: + liveins: $vgpr0_vgpr1 + + ; SI-LABEL: name: test_load_constant_s288_align32 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, align 32, addrspace 4) + ; SI: [[DEF:%[0-9]+]]:_(s288) = G_IMPLICIT_DEF + ; SI: [[INSERT:%[0-9]+]]:_(s288) = G_INSERT [[DEF]], [[LOAD]](s256), 0 + ; SI: [[INSERT1:%[0-9]+]]:_(s288) = G_INSERT [[INSERT]], [[LOAD1]](s32), 256 + ; SI: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[INSERT1]](s288), 0 + ; SI: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[INSERT1]](s288), 256 + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; SI: $vgpr8 = COPY [[EXTRACT1]](s32) + ; CI-LABEL: name: test_load_constant_s288_align32 + ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) + ; CI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; CI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, align 32, addrspace 4) + ; CI: [[DEF:%[0-9]+]]:_(s288) = G_IMPLICIT_DEF + ; CI: [[INSERT:%[0-9]+]]:_(s288) = G_INSERT [[DEF]], [[LOAD]](s256), 0 + ; CI: [[INSERT1:%[0-9]+]]:_(s288) = G_INSERT [[INSERT]], [[LOAD1]](s32), 256 + ; CI: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[INSERT1]](s288), 0 + ; CI: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[INSERT1]](s288), 256 + ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; CI: $vgpr8 = COPY [[EXTRACT1]](s32) + ; VI-LABEL: name: test_load_constant_s288_align32 + ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; VI: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) + ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; VI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, align 32, addrspace 4) + ; VI: [[DEF:%[0-9]+]]:_(s288) = G_IMPLICIT_DEF + ; VI: [[INSERT:%[0-9]+]]:_(s288) = G_INSERT [[DEF]], [[LOAD]](s256), 0 + ; VI: [[INSERT1:%[0-9]+]]:_(s288) = G_INSERT [[INSERT]], [[LOAD1]](s32), 256 + ; VI: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[INSERT1]](s288), 0 + ; VI: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[INSERT1]](s288), 256 + ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; VI: $vgpr8 = COPY [[EXTRACT1]](s32) + ; GFX9-LABEL: name: test_load_constant_s288_align32 + ; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) + ; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, align 32, addrspace 4) + ; GFX9: [[DEF:%[0-9]+]]:_(s288) = G_IMPLICIT_DEF + ; GFX9: [[INSERT:%[0-9]+]]:_(s288) = G_INSERT [[DEF]], [[LOAD]](s256), 0 + ; GFX9: [[INSERT1:%[0-9]+]]:_(s288) = G_INSERT [[INSERT]], [[LOAD1]](s32), 256 + ; GFX9: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[INSERT1]](s288), 0 + ; GFX9: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[INSERT1]](s288), 256 + ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; GFX9: $vgpr8 = COPY [[EXTRACT1]](s32) + ; CI-MESA-LABEL: name: test_load_constant_s288_align32 + ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) + ; CI-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; CI-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, align 32, addrspace 4) + ; CI-MESA: [[DEF:%[0-9]+]]:_(s288) = G_IMPLICIT_DEF + ; CI-MESA: [[INSERT:%[0-9]+]]:_(s288) = G_INSERT [[DEF]], [[LOAD]](s256), 0 + ; CI-MESA: [[INSERT1:%[0-9]+]]:_(s288) = G_INSERT [[INSERT]], [[LOAD1]](s32), 256 + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[INSERT1]](s288), 0 + ; CI-MESA: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[INSERT1]](s288), 256 + ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; CI-MESA: $vgpr8 = COPY [[EXTRACT1]](s32) + ; GFX9-MESA-LABEL: name: test_load_constant_s288_align32 + ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) + ; GFX9-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; GFX9-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, align 32, addrspace 4) + ; GFX9-MESA: [[DEF:%[0-9]+]]:_(s288) = G_IMPLICIT_DEF + ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(s288) = G_INSERT [[DEF]], [[LOAD]](s256), 0 + ; GFX9-MESA: [[INSERT1:%[0-9]+]]:_(s288) = G_INSERT [[INSERT]], [[LOAD1]](s32), 256 + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[INSERT1]](s288), 0 + ; GFX9-MESA: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[INSERT1]](s288), 256 + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; GFX9-MESA: $vgpr8 = COPY [[EXTRACT1]](s32) + %0:_(p4) = COPY $vgpr0_vgpr1 + %1:_(s288) = G_LOAD %0 :: (load 36, align 32, addrspace 4) + %2:_(s256) = G_EXTRACT %1, 0 + %3:_(s32) = G_EXTRACT %1, 256 + $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %2 + $vgpr8 = COPY %3 +... + +--- +name: test_load_constant_s288_align64 +body: | + bb.0: + liveins: $vgpr0_vgpr1 + + ; SI-LABEL: name: test_load_constant_s288_align64 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s512) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 4) + ; SI: [[TRUNC:%[0-9]+]]:_(s288) = G_TRUNC [[LOAD]](s512) + ; SI: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[TRUNC]](s288), 0 + ; SI: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[TRUNC]](s288), 256 + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; SI: $vgpr8 = COPY [[EXTRACT1]](s32) + ; CI-LABEL: name: test_load_constant_s288_align64 + ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI: [[LOAD:%[0-9]+]]:_(s512) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 4) + ; CI: [[TRUNC:%[0-9]+]]:_(s288) = G_TRUNC [[LOAD]](s512) + ; CI: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[TRUNC]](s288), 0 + ; CI: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[TRUNC]](s288), 256 + ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; CI: $vgpr8 = COPY [[EXTRACT1]](s32) + ; VI-LABEL: name: test_load_constant_s288_align64 + ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; VI: [[LOAD:%[0-9]+]]:_(s512) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 4) + ; VI: [[TRUNC:%[0-9]+]]:_(s288) = G_TRUNC [[LOAD]](s512) + ; VI: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[TRUNC]](s288), 0 + ; VI: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[TRUNC]](s288), 256 + ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; VI: $vgpr8 = COPY [[EXTRACT1]](s32) + ; GFX9-LABEL: name: test_load_constant_s288_align64 + ; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9: [[LOAD:%[0-9]+]]:_(s512) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 4) + ; GFX9: [[TRUNC:%[0-9]+]]:_(s288) = G_TRUNC [[LOAD]](s512) + ; GFX9: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[TRUNC]](s288), 0 + ; GFX9: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[TRUNC]](s288), 256 + ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; GFX9: $vgpr8 = COPY [[EXTRACT1]](s32) + ; CI-MESA-LABEL: name: test_load_constant_s288_align64 + ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s512) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 4) + ; CI-MESA: [[TRUNC:%[0-9]+]]:_(s288) = G_TRUNC [[LOAD]](s512) + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[TRUNC]](s288), 0 + ; CI-MESA: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[TRUNC]](s288), 256 + ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; CI-MESA: $vgpr8 = COPY [[EXTRACT1]](s32) + ; GFX9-MESA-LABEL: name: test_load_constant_s288_align64 + ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s512) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 4) + ; GFX9-MESA: [[TRUNC:%[0-9]+]]:_(s288) = G_TRUNC [[LOAD]](s512) + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[TRUNC]](s288), 0 + ; GFX9-MESA: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[TRUNC]](s288), 256 + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; GFX9-MESA: $vgpr8 = COPY [[EXTRACT1]](s32) + %0:_(p4) = COPY $vgpr0_vgpr1 + %1:_(s288) = G_LOAD %0 :: (load 36, align 64, addrspace 4) + %2:_(s256) = G_EXTRACT %1, 0 + %3:_(s32) = G_EXTRACT %1, 256 + $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %2 + $vgpr8 = COPY %3 +... + --- name: test_load_constant_p1_align8 body: | bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_p1_align8 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](p1) ; CI-LABEL: name: test_load_constant_p1_align8 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) @@ -2858,6 +3740,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_p1_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p4) :: (load 8, align 4, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](p1) ; CI-LABEL: name: test_load_constant_p1_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[COPY]](p4) :: (load 8, align 4, addrspace 4) @@ -2889,6 +3775,75 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_p1_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 1, addrspace 4) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 5 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 1, addrspace 4) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 1, addrspace 4) + ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 7 + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 1, addrspace 4) + ; SI: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] + ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C9]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C9]] + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) + ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] + ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) + ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] + ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) + ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C9]] + ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C8]](s32) + ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) + ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] + ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) + ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) + ; SI: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C10]](s32) + ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] + ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) + ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) + ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C10]](s32) + ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] + ; SI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) + ; SI: $vgpr0_vgpr1 = COPY [[MV]](p1) ; CI-LABEL: name: test_load_constant_p1_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -3221,6 +4176,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_p3_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; SI: $vgpr0 = COPY [[LOAD]](p3) ; CI-LABEL: name: test_load_constant_p3_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) @@ -3252,6 +4211,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_p4_align8 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](p4) ; CI-LABEL: name: test_load_constant_p4_align8 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) @@ -3283,6 +4246,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_p4_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[COPY]](p4) :: (load 8, align 4, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](p4) ; CI-LABEL: name: test_load_constant_p4_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[COPY]](p4) :: (load 8, align 4, addrspace 4) @@ -3314,6 +4281,34 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_p4_align2 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 2, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 2, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 2, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] + ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) + ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] + ; SI: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) + ; SI: $vgpr0_vgpr1 = COPY [[MV]](p4) ; CI-LABEL: name: test_load_constant_p4_align2 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) @@ -3465,6 +4460,75 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_p4_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 1, addrspace 4) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 5 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 1, addrspace 4) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 1, addrspace 4) + ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 7 + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 1, addrspace 4) + ; SI: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] + ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C9]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C9]] + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) + ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] + ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) + ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] + ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) + ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C9]] + ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C8]](s32) + ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) + ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] + ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) + ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) + ; SI: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C10]](s32) + ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] + ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) + ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) + ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C10]](s32) + ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] + ; SI: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) + ; SI: $vgpr0_vgpr1 = COPY [[MV]](p4) ; CI-LABEL: name: test_load_constant_p4_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -3797,6 +4861,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_p5_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; SI: $vgpr0 = COPY [[LOAD]](p5) ; CI-LABEL: name: test_load_constant_p5_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) @@ -3828,6 +4896,22 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_p5_align2 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 2, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] + ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) + ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] + ; SI: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR]](s32) + ; SI: $vgpr0 = COPY [[INTTOPTR]](p5) ; CI-LABEL: name: test_load_constant_p5_align2 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) @@ -3919,6 +5003,43 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_p5_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]] + ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C4]](s32) + ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C5]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C3]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C5]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) + ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) + ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C6]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] + ; SI: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR2]](s32) + ; SI: $vgpr0 = COPY [[INTTOPTR]](p5) ; CI-LABEL: name: test_load_constant_p5_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -4103,6 +5224,13 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2s8_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<4 x s8>) = G_LOAD [[COPY]](p4) :: (load 2, align 4, addrspace 4) + ; SI: [[EXTRACT:%[0-9]+]]:_(<2 x s8>) = G_EXTRACT [[LOAD]](<4 x s8>), 0 + ; SI: [[BITCAST:%[0-9]+]]:_(s16) = G_BITCAST [[EXTRACT]](<2 x s8>) + ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[BITCAST]](s16) + ; SI: $vgpr0 = COPY [[ANYEXT]](s32) ; CI-LABEL: name: test_load_constant_v2s8_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<4 x s8>) = G_LOAD [[COPY]](p4) :: (load 2, align 4, addrspace 4) @@ -4151,6 +5279,28 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2s8_align2 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, align 2, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, align 2, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) + ; SI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) + ; SI: [[EXTRACT:%[0-9]+]]:_(<2 x s8>) = G_EXTRACT [[TRUNC]](<4 x s8>), 0 + ; SI: [[BITCAST:%[0-9]+]]:_(s16) = G_BITCAST [[EXTRACT]](<2 x s8>) + ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[BITCAST]](s16) + ; SI: $vgpr0 = COPY [[ANYEXT]](s32) ; CI-LABEL: name: test_load_constant_v2s8_align2 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, align 2, addrspace 4) @@ -4274,6 +5424,19 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2s8_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32) + ; SI: [[TRUNC:%[0-9]+]]:_(<2 x s8>) = G_TRUNC [[BUILD_VECTOR]](<2 x s32>) + ; SI: [[BITCAST:%[0-9]+]]:_(s16) = G_BITCAST [[TRUNC]](<2 x s8>) + ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[BITCAST]](s16) + ; SI: $vgpr0 = COPY [[ANYEXT]](s32) ; CI-LABEL: name: test_load_constant_v2s8_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -4352,6 +5515,14 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v3s8_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p4) :: (load 3, align 4, addrspace 4) + ; SI: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF + ; SI: [[ANYEXT:%[0-9]+]]:_(<4 x s16>) = G_ANYEXT [[DEF]](<4 x s8>) + ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[ANYEXT]], [[LOAD]](<3 x s8>), 0 + ; SI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[INSERT]](<4 x s16>) + ; SI: $vgpr0 = COPY [[TRUNC]](<4 x s8>) ; CI-LABEL: name: test_load_constant_v3s8_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p4) :: (load 3, align 4, addrspace 4) @@ -4405,6 +5576,14 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v3s8_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p4) :: (load 2, align 1, addrspace 4) + ; SI: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF + ; SI: [[ANYEXT:%[0-9]+]]:_(<4 x s16>) = G_ANYEXT [[DEF]](<4 x s8>) + ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[ANYEXT]], [[LOAD]](<3 x s8>), 0 + ; SI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[INSERT]](<4 x s16>) + ; SI: $vgpr0 = COPY [[TRUNC]](<4 x s8>) ; CI-LABEL: name: test_load_constant_v3s8_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p4) :: (load 2, align 1, addrspace 4) @@ -4458,6 +5637,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v4s8_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<4 x s8>) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; SI: $vgpr0 = COPY [[LOAD]](<4 x s8>) ; CI-LABEL: name: test_load_constant_v4s8_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<4 x s8>) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) @@ -4489,6 +5672,25 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v4s8_align2 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, align 2, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, align 2, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) + ; SI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) + ; SI: $vgpr0 = COPY [[TRUNC]](<4 x s8>) ; CI-LABEL: name: test_load_constant_v4s8_align2 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, align 2, addrspace 4) @@ -4595,6 +5797,25 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v4s8_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) + ; SI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) + ; SI: $vgpr0 = COPY [[TRUNC]](<4 x s8>) ; CI-LABEL: name: test_load_constant_v4s8_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -4701,6 +5922,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v8s8_align8 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<8 x s8>) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<8 x s8>) ; CI-LABEL: name: test_load_constant_v8s8_align8 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<8 x s8>) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) @@ -4732,6 +5957,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v16s8_align16 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<16 x s8>) = G_LOAD [[COPY]](p4) :: (load 16, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<16 x s8>) ; CI-LABEL: name: test_load_constant_v16s8_align16 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<16 x s8>) = G_LOAD [[COPY]](p4) :: (load 16, addrspace 4) @@ -4763,6 +5992,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v32s8_align32 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<32 x s8>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<32 x s8>) ; CI-LABEL: name: test_load_constant_v32s8_align32 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<32 x s8>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) @@ -4795,6 +6028,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2s16_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; SI: $vgpr0 = COPY [[LOAD]](<2 x s16>) ; CI-LABEL: name: test_load_constant_v2s16_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) @@ -4826,6 +6063,16 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2s16_align2 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 2, addrspace 4) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16) + ; SI: $vgpr0 = COPY [[BUILD_VECTOR]](<2 x s16>) ; CI-LABEL: name: test_load_constant_v2s16_align2 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) @@ -4887,6 +6134,37 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2s16_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] + ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD1]], [[C]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[OR]](s16), [[OR1]](s16) + ; SI: $vgpr0 = COPY [[BUILD_VECTOR]](<2 x s16>) ; CI-LABEL: name: test_load_constant_v2s16_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -5041,35 +6319,47 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v3s16_align8 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p4) :: (load 6, align 8, addrspace 4) + ; SI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 + ; SI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF + ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 + ; SI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; CI-LABEL: name: test_load_constant_v3s16_align8 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; CI: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p4) :: (load 6, align 8, addrspace 4) + ; CI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p4) :: (load 6, align 8, addrspace 4) + ; CI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; CI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; CI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; CI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; CI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; VI-LABEL: name: test_load_constant_v3s16_align8 ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; VI: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p4) :: (load 6, align 8, addrspace 4) + ; VI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p4) :: (load 6, align 8, addrspace 4) + ; VI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; VI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; VI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; GFX9-LABEL: name: test_load_constant_v3s16_align8 ; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; GFX9: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p4) :: (load 6, align 8, addrspace 4) + ; GFX9: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p4) :: (load 6, align 8, addrspace 4) + ; GFX9: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; GFX9: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; CI-MESA-LABEL: name: test_load_constant_v3s16_align8 ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; CI-MESA: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p4) :: (load 6, align 8, addrspace 4) + ; CI-MESA: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p4) :: (load 6, align 8, addrspace 4) + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; CI-MESA: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; CI-MESA: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; CI-MESA: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; CI-MESA: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; GFX9-MESA-LABEL: name: test_load_constant_v3s16_align8 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p4) :: (load 6, align 8, addrspace 4) + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p4) :: (load 6, align 8, addrspace 4) + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; GFX9-MESA: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; GFX9-MESA: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) %0:_(p4) = COPY $vgpr0_vgpr1 %1:_(<3 x s16>) = G_LOAD %0 :: (load 6, align 8, addrspace 4) @@ -5084,6 +6374,12 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v3s16_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p4) :: (load 6, align 4, addrspace 4) + ; SI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF + ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; SI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; CI-LABEL: name: test_load_constant_v3s16_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p4) :: (load 6, align 4, addrspace 4) @@ -5127,6 +6423,26 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v3s16_align2 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 2, addrspace 4) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 2, addrspace 4) + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16) + ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[DEF]](s16) + ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s16>), [[BUILD_VECTOR1]](<2 x s16>) + ; SI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[CONCAT_VECTORS]](<4 x s16>), 0 + ; SI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF + ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 + ; SI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; CI-LABEL: name: test_load_constant_v3s16_align2 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) @@ -5240,6 +6556,62 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v3s16_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] + ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD1]], [[C]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[OR]](s16), [[OR1]](s16) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD3]], [[C]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 1, addrspace 4) + ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C2]](s32) + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY4]](s32) + ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] + ; SI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF + ; SI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 + ; SI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF + ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 + ; SI: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BUILD_VECTOR]](<2 x s16>), 0 + ; SI: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT1]](<4 x s16>), 0 + ; SI: [[DEF2:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF + ; SI: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF2]], [[EXTRACT1]](<3 x s16>), 0 + ; SI: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[OR2]](s16), 32 + ; SI: [[EXTRACT2:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT3]](<4 x s16>), 0 + ; SI: [[DEF3:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF + ; SI: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF3]], [[EXTRACT2]](<3 x s16>), 0 + ; SI: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) ; CI-LABEL: name: test_load_constant_v3s16_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -5515,6 +6887,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v4s16_align8 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) ; CI-LABEL: name: test_load_constant_v4s16_align8 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) @@ -5546,6 +6922,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v4s16_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p4) :: (load 8, align 4, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<4 x s16>) ; CI-LABEL: name: test_load_constant_v4s16_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p4) :: (load 8, align 4, addrspace 4) @@ -5577,6 +6957,26 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v4s16_align2 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 2, addrspace 4) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 2, addrspace 4) + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 2, addrspace 4) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16) + ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16) + ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s16>), [[BUILD_VECTOR1]](<2 x s16>) + ; SI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) ; CI-LABEL: name: test_load_constant_v4s16_align2 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) @@ -5688,6 +7088,64 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v4s16_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] + ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD1]], [[C]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[OR]](s16), [[OR1]](s16) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD3]], [[C]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 1, addrspace 4) + ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C2]](s32) + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY4]](s32) + ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD3]], [[C4]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD5]], [[C]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 1, addrspace 4) + ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) + ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C1]] + ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[C2]](s32) + ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) + ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] + ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[COPY6]](s32) + ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) + ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] + ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[OR2]](s16), [[OR3]](s16) + ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s16>), [[BUILD_VECTOR1]](<2 x s16>) + ; SI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) ; CI-LABEL: name: test_load_constant_v4s16_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -5965,6 +7423,44 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v8s16_align8 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, align 8, addrspace 4) + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 2, addrspace 4) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 2, align 4, addrspace 4) + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 2, addrspace 4) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 2, align 8, addrspace 4) + ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 10 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 2, addrspace 4) + ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD5]](s32) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 2, align 4, addrspace 4) + ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) + ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 14 + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 2, addrspace 4) + ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD7]](s32) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16) + ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16) + ; SI: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC4]](s16), [[TRUNC5]](s16) + ; SI: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC6]](s16), [[TRUNC7]](s16) + ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s16>), [[BUILD_VECTOR1]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<8 x s16>) ; CI-LABEL: name: test_load_constant_v8s16_align8 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, align 8, addrspace 4) @@ -6166,6 +7662,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2s32_align8 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) ; CI-LABEL: name: test_load_constant_v2s32_align8 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) @@ -6197,6 +7697,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2s32_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p4) :: (load 8, align 4, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) ; CI-LABEL: name: test_load_constant_v2s32_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p4) :: (load 8, align 4, addrspace 4) @@ -6229,6 +7733,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2s32_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p4) :: (load 8, align 4, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) ; CI-LABEL: name: test_load_constant_v2s32_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p4) :: (load 8, align 4, addrspace 4) @@ -6260,6 +7768,11 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v3s32_align16 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p4) :: (load 12, align 16, addrspace 4) + ; SI: [[EXTRACT:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[LOAD]](<4 x s32>), 0 + ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](<3 x s32>) ; CI-LABEL: name: test_load_constant_v3s32_align16 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p4) :: (load 12, align 16, addrspace 4) @@ -6293,6 +7806,17 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v3s32_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 4) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) + ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) ; CI-LABEL: name: test_load_constant_v3s32_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 4) @@ -6324,6 +7848,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v4s32_align16 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p4) :: (load 16, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) ; CI-LABEL: name: test_load_constant_v4s32_align16 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p4) :: (load 16, addrspace 4) @@ -6355,6 +7883,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v4s32_align8 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p4) :: (load 16, align 8, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) ; CI-LABEL: name: test_load_constant_v4s32_align8 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p4) :: (load 16, align 8, addrspace 4) @@ -6386,6 +7918,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v4s32_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p4) :: (load 16, align 4, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) ; CI-LABEL: name: test_load_constant_v4s32_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p4) :: (load 16, align 4, addrspace 4) @@ -6417,29 +7953,706 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v8s32_align32 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<8 x s32>) ; CI-LABEL: name: test_load_constant_v8s32_align32 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<8 x s32>) ; VI-LABEL: name: test_load_constant_v8s32_align32 ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; VI: [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) - ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<8 x s32>) - ; GFX9-LABEL: name: test_load_constant_v8s32_align32 + ; VI: [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) + ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<8 x s32>) + ; GFX9-LABEL: name: test_load_constant_v8s32_align32 + ; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9: [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) + ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<8 x s32>) + ; CI-MESA-LABEL: name: test_load_constant_v8s32_align32 + ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI-MESA: [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) + ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<8 x s32>) + ; GFX9-MESA-LABEL: name: test_load_constant_v8s32_align32 + ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<8 x s32>) + %0:_(p4) = COPY $vgpr0_vgpr1 + %1:_(<8 x s32>) = G_LOAD %0 :: (load 32, align 32, addrspace 4) + $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1 +... + +--- +name: test_load_constant_v9s32_align32 +body: | + bb.0: + liveins: $vgpr0_vgpr1 + + ; SI-LABEL: name: test_load_constant_v9s32_align32 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 4) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 4) + ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 4) + ; SI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; SI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 4) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<9 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32) + ; SI: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<9 x s32>), 0 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; SI: $vgpr8 = COPY [[COPY1]](s32) + ; CI-LABEL: name: test_load_constant_v9s32_align32 + ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 4) + ; CI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; CI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; CI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 4) + ; CI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; CI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 4) + ; CI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; CI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; CI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; CI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 4) + ; CI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; CI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 4) + ; CI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; CI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 4) + ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<9 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32) + ; CI: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<9 x s32>), 0 + ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) + ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; CI: $vgpr8 = COPY [[COPY1]](s32) + ; VI-LABEL: name: test_load_constant_v9s32_align32 + ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 4) + ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; VI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; VI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 4) + ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; VI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; VI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; VI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 4) + ; VI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; VI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; VI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; VI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 4) + ; VI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; VI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 4) + ; VI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; VI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 4) + ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<9 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32) + ; VI: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<9 x s32>), 0 + ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) + ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; VI: $vgpr8 = COPY [[COPY1]](s32) + ; GFX9-LABEL: name: test_load_constant_v9s32_align32 + ; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 4) + ; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 4) + ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 4) + ; GFX9: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 4) + ; GFX9: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 4) + ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<9 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32) + ; GFX9: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<9 x s32>), 0 + ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) + ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; GFX9: $vgpr8 = COPY [[COPY1]](s32) + ; CI-MESA-LABEL: name: test_load_constant_v9s32_align32 + ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 4) + ; CI-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; CI-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI-MESA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI-MESA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 4) + ; CI-MESA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-MESA: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; CI-MESA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI-MESA: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; CI-MESA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 4) + ; CI-MESA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; CI-MESA: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; CI-MESA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; CI-MESA: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; CI-MESA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 4) + ; CI-MESA: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; CI-MESA: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; CI-MESA: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; CI-MESA: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; CI-MESA: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 4) + ; CI-MESA: [[BUILD_VECTOR:%[0-9]+]]:_(<9 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32) + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<9 x s32>), 0 + ; CI-MESA: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) + ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; CI-MESA: $vgpr8 = COPY [[COPY1]](s32) + ; GFX9-MESA-LABEL: name: test_load_constant_v9s32_align32 + ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 4) + ; GFX9-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; GFX9-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9-MESA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9-MESA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 4) + ; GFX9-MESA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-MESA: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; GFX9-MESA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9-MESA: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; GFX9-MESA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 4) + ; GFX9-MESA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; GFX9-MESA: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; GFX9-MESA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; GFX9-MESA: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; GFX9-MESA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 4) + ; GFX9-MESA: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; GFX9-MESA: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; GFX9-MESA: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; GFX9-MESA: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; GFX9-MESA: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 4) + ; GFX9-MESA: [[BUILD_VECTOR:%[0-9]+]]:_(<9 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32) + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<9 x s32>), 0 + ; GFX9-MESA: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; GFX9-MESA: $vgpr8 = COPY [[COPY1]](s32) + %0:_(p4) = COPY $vgpr0_vgpr1 + %1:_(<9 x s32>) = G_LOAD %0 :: (load 36, align 32, addrspace 4) + %2:_(<8 x s32>) = G_EXTRACT %1, 0 + %3:_(s32) = G_EXTRACT %1, 256 + $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %2 + $vgpr8 = COPY %3 +... + +--- +name: test_load_constant_v9s32_align64 +body: | + bb.0: + liveins: $vgpr0_vgpr1 + + ; SI-LABEL: name: test_load_constant_v9s32_align64 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 4) + ; SI: [[EXTRACT:%[0-9]+]]:_(<9 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; SI: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<9 x s32>), 0 + ; SI: [[EXTRACT2:%[0-9]+]]:_(s32) = G_EXTRACT [[EXTRACT]](<9 x s32>), 256 + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; SI: $vgpr8 = COPY [[EXTRACT2]](s32) + ; CI-LABEL: name: test_load_constant_v9s32_align64 + ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 4) + ; CI: [[EXTRACT:%[0-9]+]]:_(<9 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; CI: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<9 x s32>), 0 + ; CI: [[EXTRACT2:%[0-9]+]]:_(s32) = G_EXTRACT [[EXTRACT]](<9 x s32>), 256 + ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; CI: $vgpr8 = COPY [[EXTRACT2]](s32) + ; VI-LABEL: name: test_load_constant_v9s32_align64 + ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; VI: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 4) + ; VI: [[EXTRACT:%[0-9]+]]:_(<9 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; VI: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<9 x s32>), 0 + ; VI: [[EXTRACT2:%[0-9]+]]:_(s32) = G_EXTRACT [[EXTRACT]](<9 x s32>), 256 + ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; VI: $vgpr8 = COPY [[EXTRACT2]](s32) + ; GFX9-LABEL: name: test_load_constant_v9s32_align64 + ; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 4) + ; GFX9: [[EXTRACT:%[0-9]+]]:_(<9 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; GFX9: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<9 x s32>), 0 + ; GFX9: [[EXTRACT2:%[0-9]+]]:_(s32) = G_EXTRACT [[EXTRACT]](<9 x s32>), 256 + ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; GFX9: $vgpr8 = COPY [[EXTRACT2]](s32) + ; CI-MESA-LABEL: name: test_load_constant_v9s32_align64 + ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI-MESA: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 4) + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(<9 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; CI-MESA: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<9 x s32>), 0 + ; CI-MESA: [[EXTRACT2:%[0-9]+]]:_(s32) = G_EXTRACT [[EXTRACT]](<9 x s32>), 256 + ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; CI-MESA: $vgpr8 = COPY [[EXTRACT2]](s32) + ; GFX9-MESA-LABEL: name: test_load_constant_v9s32_align64 + ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 4) + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(<9 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; GFX9-MESA: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<9 x s32>), 0 + ; GFX9-MESA: [[EXTRACT2:%[0-9]+]]:_(s32) = G_EXTRACT [[EXTRACT]](<9 x s32>), 256 + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; GFX9-MESA: $vgpr8 = COPY [[EXTRACT2]](s32) + %0:_(p4) = COPY $vgpr0_vgpr1 + %1:_(<9 x s32>) = G_LOAD %0 :: (load 36, align 64, addrspace 4) + %2:_(<8 x s32>) = G_EXTRACT %1, 0 + %3:_(s32) = G_EXTRACT %1, 256 + $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %2 + $vgpr8 = COPY %3 +... + +--- +name: test_load_constant_v15s32_align64 +body: | + bb.0: + liveins: $vgpr0_vgpr1 + + ; SI-LABEL: name: test_load_constant_v15s32_align64 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 60, align 64, addrspace 4) + ; SI: [[EXTRACT:%[0-9]+]]:_(<15 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; SI: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 0 + ; SI: [[EXTRACT2:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 256 + ; SI: [[EXTRACT3:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 384 + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; SI: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT2]](<4 x s32>) + ; SI: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT3]](<3 x s32>) + ; CI-LABEL: name: test_load_constant_v15s32_align64 + ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 60, align 64, addrspace 4) + ; CI: [[EXTRACT:%[0-9]+]]:_(<15 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; CI: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 0 + ; CI: [[EXTRACT2:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 256 + ; CI: [[EXTRACT3:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 384 + ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; CI: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT2]](<4 x s32>) + ; CI: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT3]](<3 x s32>) + ; VI-LABEL: name: test_load_constant_v15s32_align64 + ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; VI: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 60, align 64, addrspace 4) + ; VI: [[EXTRACT:%[0-9]+]]:_(<15 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; VI: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 0 + ; VI: [[EXTRACT2:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 256 + ; VI: [[EXTRACT3:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 384 + ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; VI: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT2]](<4 x s32>) + ; VI: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT3]](<3 x s32>) + ; GFX9-LABEL: name: test_load_constant_v15s32_align64 + ; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 60, align 64, addrspace 4) + ; GFX9: [[EXTRACT:%[0-9]+]]:_(<15 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; GFX9: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 0 + ; GFX9: [[EXTRACT2:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 256 + ; GFX9: [[EXTRACT3:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 384 + ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; GFX9: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT2]](<4 x s32>) + ; GFX9: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT3]](<3 x s32>) + ; CI-MESA-LABEL: name: test_load_constant_v15s32_align64 + ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI-MESA: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 60, align 64, addrspace 4) + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(<15 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; CI-MESA: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 0 + ; CI-MESA: [[EXTRACT2:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 256 + ; CI-MESA: [[EXTRACT3:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 384 + ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; CI-MESA: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT2]](<4 x s32>) + ; CI-MESA: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT3]](<3 x s32>) + ; GFX9-MESA-LABEL: name: test_load_constant_v15s32_align64 + ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 60, align 64, addrspace 4) + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(<15 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; GFX9-MESA: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 0 + ; GFX9-MESA: [[EXTRACT2:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 256 + ; GFX9-MESA: [[EXTRACT3:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 384 + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; GFX9-MESA: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT2]](<4 x s32>) + ; GFX9-MESA: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT3]](<3 x s32>) + %0:_(p4) = COPY $vgpr0_vgpr1 + %1:_(<15 x s32>) = G_LOAD %0 :: (load 60, align 64, addrspace 4) + %2:_(<8 x s32>) = G_EXTRACT %1, 0 + %3:_(<4 x s32>) = G_EXTRACT %1, 256 + %4:_(<3 x s32>) = G_EXTRACT %1, 384 + $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %2 + $vgpr8_vgpr9_vgpr10_vgpr11 = COPY %3 + $vgpr12_vgpr13_vgpr14 = COPY %4 +... + + +--- +name: test_load_constant_v15s32_align32 +body: | + bb.0: + liveins: $vgpr0_vgpr1 + + ; SI-LABEL: name: test_load_constant_v15s32_align32 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 4) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 4) + ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 4) + ; SI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; SI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 4) + ; SI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 36 + ; SI: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C8]](s64) + ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 4, addrspace 4) + ; SI: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 40 + ; SI: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C9]](s64) + ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 4, align 8, addrspace 4) + ; SI: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 44 + ; SI: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C10]](s64) + ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 4, addrspace 4) + ; SI: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 48 + ; SI: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 4, align 16, addrspace 4) + ; SI: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 52 + ; SI: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C12]](s64) + ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 4, addrspace 4) + ; SI: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 56 + ; SI: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C13]](s64) + ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 4, align 8, addrspace 4) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<15 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32), [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32) + ; SI: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 0 + ; SI: [[EXTRACT1:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 256 + ; SI: [[EXTRACT2:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 384 + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; SI: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT1]](<4 x s32>) + ; SI: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT2]](<3 x s32>) + ; CI-LABEL: name: test_load_constant_v15s32_align32 + ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 4) + ; CI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; CI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; CI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 4) + ; CI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; CI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 4) + ; CI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; CI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; CI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; CI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 4) + ; CI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; CI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 4) + ; CI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; CI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 4) + ; CI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 36 + ; CI: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C8]](s64) + ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 4, addrspace 4) + ; CI: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 40 + ; CI: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C9]](s64) + ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 4, align 8, addrspace 4) + ; CI: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 44 + ; CI: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C10]](s64) + ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 4, addrspace 4) + ; CI: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 48 + ; CI: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; CI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 4, align 16, addrspace 4) + ; CI: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 52 + ; CI: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C12]](s64) + ; CI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 4, addrspace 4) + ; CI: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 56 + ; CI: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C13]](s64) + ; CI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 4, align 8, addrspace 4) + ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<15 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32), [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32) + ; CI: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 0 + ; CI: [[EXTRACT1:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 256 + ; CI: [[EXTRACT2:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 384 + ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; CI: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT1]](<4 x s32>) + ; CI: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT2]](<3 x s32>) + ; VI-LABEL: name: test_load_constant_v15s32_align32 + ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 4) + ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; VI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; VI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 4) + ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; VI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; VI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; VI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 4) + ; VI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; VI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; VI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; VI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 4) + ; VI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; VI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 4) + ; VI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; VI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 4) + ; VI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 36 + ; VI: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C8]](s64) + ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 4, addrspace 4) + ; VI: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 40 + ; VI: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C9]](s64) + ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 4, align 8, addrspace 4) + ; VI: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 44 + ; VI: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C10]](s64) + ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 4, addrspace 4) + ; VI: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 48 + ; VI: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; VI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 4, align 16, addrspace 4) + ; VI: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 52 + ; VI: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C12]](s64) + ; VI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 4, addrspace 4) + ; VI: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 56 + ; VI: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C13]](s64) + ; VI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 4, align 8, addrspace 4) + ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<15 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32), [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32) + ; VI: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 0 + ; VI: [[EXTRACT1:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 256 + ; VI: [[EXTRACT2:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 384 + ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; VI: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT1]](<4 x s32>) + ; VI: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT2]](<3 x s32>) + ; GFX9-LABEL: name: test_load_constant_v15s32_align32 ; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; GFX9: [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) - ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<8 x s32>) - ; CI-MESA-LABEL: name: test_load_constant_v8s32_align32 + ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 4) + ; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 4) + ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 4) + ; GFX9: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 4) + ; GFX9: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 4) + ; GFX9: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 36 + ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C8]](s64) + ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 40 + ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C9]](s64) + ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 4, align 8, addrspace 4) + ; GFX9: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 44 + ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C10]](s64) + ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 48 + ; GFX9: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; GFX9: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 4, align 16, addrspace 4) + ; GFX9: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 52 + ; GFX9: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C12]](s64) + ; GFX9: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 4, addrspace 4) + ; GFX9: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 56 + ; GFX9: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C13]](s64) + ; GFX9: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 4, align 8, addrspace 4) + ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<15 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32), [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32) + ; GFX9: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 0 + ; GFX9: [[EXTRACT1:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 256 + ; GFX9: [[EXTRACT2:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 384 + ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; GFX9: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT1]](<4 x s32>) + ; GFX9: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT2]](<3 x s32>) + ; CI-MESA-LABEL: name: test_load_constant_v15s32_align32 ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; CI-MESA: [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) - ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<8 x s32>) - ; GFX9-MESA-LABEL: name: test_load_constant_v8s32_align32 + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 4) + ; CI-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; CI-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI-MESA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI-MESA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 4) + ; CI-MESA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-MESA: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; CI-MESA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI-MESA: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; CI-MESA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 4) + ; CI-MESA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; CI-MESA: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; CI-MESA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; CI-MESA: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; CI-MESA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 4) + ; CI-MESA: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; CI-MESA: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; CI-MESA: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; CI-MESA: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; CI-MESA: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 4) + ; CI-MESA: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 36 + ; CI-MESA: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C8]](s64) + ; CI-MESA: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 40 + ; CI-MESA: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C9]](s64) + ; CI-MESA: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 4, align 8, addrspace 4) + ; CI-MESA: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 44 + ; CI-MESA: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C10]](s64) + ; CI-MESA: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 48 + ; CI-MESA: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; CI-MESA: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 4, align 16, addrspace 4) + ; CI-MESA: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 52 + ; CI-MESA: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C12]](s64) + ; CI-MESA: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 4, addrspace 4) + ; CI-MESA: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 56 + ; CI-MESA: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C13]](s64) + ; CI-MESA: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 4, align 8, addrspace 4) + ; CI-MESA: [[BUILD_VECTOR:%[0-9]+]]:_(<15 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32), [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32) + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 0 + ; CI-MESA: [[EXTRACT1:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 256 + ; CI-MESA: [[EXTRACT2:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 384 + ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; CI-MESA: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT1]](<4 x s32>) + ; CI-MESA: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT2]](<3 x s32>) + ; GFX9-MESA-LABEL: name: test_load_constant_v15s32_align32 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) - ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<8 x s32>) + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 4) + ; GFX9-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; GFX9-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9-MESA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9-MESA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 4) + ; GFX9-MESA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-MESA: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; GFX9-MESA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9-MESA: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; GFX9-MESA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 4) + ; GFX9-MESA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; GFX9-MESA: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; GFX9-MESA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; GFX9-MESA: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; GFX9-MESA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 4) + ; GFX9-MESA: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; GFX9-MESA: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; GFX9-MESA: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; GFX9-MESA: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; GFX9-MESA: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 4) + ; GFX9-MESA: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 36 + ; GFX9-MESA: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C8]](s64) + ; GFX9-MESA: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 40 + ; GFX9-MESA: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C9]](s64) + ; GFX9-MESA: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 4, align 8, addrspace 4) + ; GFX9-MESA: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 44 + ; GFX9-MESA: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C10]](s64) + ; GFX9-MESA: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 48 + ; GFX9-MESA: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; GFX9-MESA: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 4, align 16, addrspace 4) + ; GFX9-MESA: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 52 + ; GFX9-MESA: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C12]](s64) + ; GFX9-MESA: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 4, addrspace 4) + ; GFX9-MESA: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 56 + ; GFX9-MESA: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C13]](s64) + ; GFX9-MESA: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 4, align 8, addrspace 4) + ; GFX9-MESA: [[BUILD_VECTOR:%[0-9]+]]:_(<15 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32), [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32) + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 0 + ; GFX9-MESA: [[EXTRACT1:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 256 + ; GFX9-MESA: [[EXTRACT2:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 384 + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; GFX9-MESA: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT1]](<4 x s32>) + ; GFX9-MESA: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT2]](<3 x s32>) %0:_(p4) = COPY $vgpr0_vgpr1 - %1:_(<8 x s32>) = G_LOAD %0 :: (load 32, align 32, addrspace 4) - $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1 + %1:_(<15 x s32>) = G_LOAD %0 :: (load 60, align 32, addrspace 4) + %2:_(<8 x s32>) = G_EXTRACT %1, 0 + %3:_(<4 x s32>) = G_EXTRACT %1, 256 + %4:_(<3 x s32>) = G_EXTRACT %1, 384 + $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %2 + $vgpr8_vgpr9_vgpr10_vgpr11 = COPY %3 + $vgpr12_vgpr13_vgpr14 = COPY %4 ... --- @@ -6448,6 +8661,56 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v16s32_align32 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 4) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 4) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 4) + ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 4) + ; SI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; SI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 4) + ; SI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 36 + ; SI: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C8]](s64) + ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 4, addrspace 4) + ; SI: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 40 + ; SI: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C9]](s64) + ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 4, align 8, addrspace 4) + ; SI: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 44 + ; SI: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C10]](s64) + ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 4, addrspace 4) + ; SI: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 48 + ; SI: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 4, align 16, addrspace 4) + ; SI: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 52 + ; SI: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C12]](s64) + ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 4, addrspace 4) + ; SI: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 56 + ; SI: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C13]](s64) + ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 4, align 8, addrspace 4) + ; SI: [[C14:%[0-9]+]]:_(s64) = G_CONSTANT i64 60 + ; SI: [[PTR_ADD14:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C14]](s64) + ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p4) :: (load 4, addrspace 4) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32), [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32), [[LOAD15]](s32) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[BUILD_VECTOR]](<16 x s32>) ; CI-LABEL: name: test_load_constant_v16s32_align32 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 4) @@ -6709,6 +8972,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2s64_align16 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p4) :: (load 16, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<2 x s64>) ; CI-LABEL: name: test_load_constant_v2s64_align16 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p4) :: (load 16, addrspace 4) @@ -6740,6 +9007,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2s64_align8 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p4) :: (load 16, align 8, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<2 x s64>) ; CI-LABEL: name: test_load_constant_v2s64_align8 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p4) :: (load 16, align 8, addrspace 4) @@ -6771,6 +9042,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2s64_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p4) :: (load 16, align 4, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<2 x s64>) ; CI-LABEL: name: test_load_constant_v2s64_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p4) :: (load 16, align 4, addrspace 4) @@ -6802,6 +9077,57 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2s64_align2 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 2, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 2, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 2, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] + ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) + ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] + ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 2, addrspace 4) + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD3]], [[C]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 2, addrspace 4) + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 2, addrspace 4) + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 2, addrspace 4) + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] + ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] + ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) + ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] + ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) + ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] + ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C4]](s32) + ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] + ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR2]](s32), [[OR3]](s32) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) ; CI-LABEL: name: test_load_constant_v2s64_align2 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 4) @@ -7068,6 +9394,134 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2s64_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 1, addrspace 4) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 5 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 1, addrspace 4) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 1, addrspace 4) + ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 7 + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 1, addrspace 4) + ; SI: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] + ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C9]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C9]] + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) + ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] + ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) + ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] + ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) + ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C9]] + ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C8]](s32) + ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) + ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] + ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) + ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) + ; SI: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C10]](s32) + ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] + ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) + ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) + ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C10]](s32) + ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] + ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) + ; SI: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C]](s64) + ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s64) + ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s64) + ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C3]](s64) + ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C4]](s64) + ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C5]](s64) + ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD14:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C6]](s64) + ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p4) :: (load 1, addrspace 4) + ; SI: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD8]](s32) + ; SI: [[AND8:%[0-9]+]]:_(s16) = G_AND [[TRUNC8]], [[C7]] + ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) + ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C9]] + ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[COPY8]](s32) + ; SI: [[TRUNC9:%[0-9]+]]:_(s16) = G_TRUNC [[SHL6]](s32) + ; SI: [[OR6:%[0-9]+]]:_(s16) = G_OR [[AND8]], [[TRUNC9]] + ; SI: [[TRUNC10:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD10]](s32) + ; SI: [[AND10:%[0-9]+]]:_(s16) = G_AND [[TRUNC10]], [[C7]] + ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) + ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C9]] + ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[COPY10]](s32) + ; SI: [[TRUNC11:%[0-9]+]]:_(s16) = G_TRUNC [[SHL7]](s32) + ; SI: [[OR7:%[0-9]+]]:_(s16) = G_OR [[AND10]], [[TRUNC11]] + ; SI: [[TRUNC12:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD12]](s32) + ; SI: [[AND12:%[0-9]+]]:_(s16) = G_AND [[TRUNC12]], [[C7]] + ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) + ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C9]] + ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[COPY12]](s32) + ; SI: [[TRUNC13:%[0-9]+]]:_(s16) = G_TRUNC [[SHL8]](s32) + ; SI: [[OR8:%[0-9]+]]:_(s16) = G_OR [[AND12]], [[TRUNC13]] + ; SI: [[TRUNC14:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD14]](s32) + ; SI: [[AND14:%[0-9]+]]:_(s16) = G_AND [[TRUNC14]], [[C7]] + ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) + ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C9]] + ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[COPY14]](s32) + ; SI: [[TRUNC15:%[0-9]+]]:_(s16) = G_TRUNC [[SHL9]](s32) + ; SI: [[OR9:%[0-9]+]]:_(s16) = G_OR [[AND14]], [[TRUNC15]] + ; SI: [[ZEXT4:%[0-9]+]]:_(s32) = G_ZEXT [[OR6]](s16) + ; SI: [[ZEXT5:%[0-9]+]]:_(s32) = G_ZEXT [[OR7]](s16) + ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[ZEXT5]], [[C10]](s32) + ; SI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[ZEXT4]], [[SHL10]] + ; SI: [[ZEXT6:%[0-9]+]]:_(s32) = G_ZEXT [[OR8]](s16) + ; SI: [[ZEXT7:%[0-9]+]]:_(s32) = G_ZEXT [[OR9]](s16) + ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[ZEXT7]], [[C10]](s32) + ; SI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[ZEXT6]], [[SHL11]] + ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR10]](s32), [[OR11]](s32) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) ; CI-LABEL: name: test_load_constant_v2s64_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -7671,35 +10125,47 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v3s64_align32 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<4 x s64>) = G_LOAD [[COPY]](p4) :: (load 24, align 32, addrspace 4) + ; SI: [[EXTRACT:%[0-9]+]]:_(<3 x s64>) = G_EXTRACT [[LOAD]](<4 x s64>), 0 + ; SI: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF + ; SI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s64>), 0 + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; CI-LABEL: name: test_load_constant_v3s64_align32 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; CI: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p4) :: (load 24, align 32, addrspace 4) + ; CI: [[LOAD:%[0-9]+]]:_(<4 x s64>) = G_LOAD [[COPY]](p4) :: (load 24, align 32, addrspace 4) + ; CI: [[EXTRACT:%[0-9]+]]:_(<3 x s64>) = G_EXTRACT [[LOAD]](<4 x s64>), 0 ; CI: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; CI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; CI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s64>), 0 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; VI-LABEL: name: test_load_constant_v3s64_align32 ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; VI: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p4) :: (load 24, align 32, addrspace 4) + ; VI: [[LOAD:%[0-9]+]]:_(<4 x s64>) = G_LOAD [[COPY]](p4) :: (load 24, align 32, addrspace 4) + ; VI: [[EXTRACT:%[0-9]+]]:_(<3 x s64>) = G_EXTRACT [[LOAD]](<4 x s64>), 0 ; VI: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; VI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; VI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s64>), 0 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; GFX9-LABEL: name: test_load_constant_v3s64_align32 ; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; GFX9: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p4) :: (load 24, align 32, addrspace 4) + ; GFX9: [[LOAD:%[0-9]+]]:_(<4 x s64>) = G_LOAD [[COPY]](p4) :: (load 24, align 32, addrspace 4) + ; GFX9: [[EXTRACT:%[0-9]+]]:_(<3 x s64>) = G_EXTRACT [[LOAD]](<4 x s64>), 0 ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s64>), 0 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; CI-MESA-LABEL: name: test_load_constant_v3s64_align32 ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; CI-MESA: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p4) :: (load 24, align 32, addrspace 4) + ; CI-MESA: [[LOAD:%[0-9]+]]:_(<4 x s64>) = G_LOAD [[COPY]](p4) :: (load 24, align 32, addrspace 4) + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(<3 x s64>) = G_EXTRACT [[LOAD]](<4 x s64>), 0 ; CI-MESA: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; CI-MESA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; CI-MESA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s64>), 0 ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; GFX9-MESA-LABEL: name: test_load_constant_v3s64_align32 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p4) :: (load 24, align 32, addrspace 4) + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<4 x s64>) = G_LOAD [[COPY]](p4) :: (load 24, align 32, addrspace 4) + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(<3 x s64>) = G_EXTRACT [[LOAD]](<4 x s64>), 0 ; GFX9-MESA: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s64>), 0 ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) %0:_(p4) = COPY $vgpr0_vgpr1 %1:_(<3 x s64>) = G_LOAD %0 :: (load 24, align 32, addrspace 4) @@ -7714,35 +10180,83 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v3s64_align8 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p4) :: (load 8, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p4) :: (load 8, addrspace 4) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64) + ; SI: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF + ; SI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; CI-LABEL: name: test_load_constant_v3s64_align8 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; CI: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p4) :: (load 24, align 8, addrspace 4) + ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) + ; CI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p4) :: (load 8, addrspace 4) + ; CI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p4) :: (load 8, addrspace 4) + ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64) ; CI: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; CI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; CI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; VI-LABEL: name: test_load_constant_v3s64_align8 ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; VI: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p4) :: (load 24, align 8, addrspace 4) + ; VI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) + ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; VI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; VI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p4) :: (load 8, addrspace 4) + ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; VI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; VI: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p4) :: (load 8, addrspace 4) + ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64) ; VI: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; VI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; VI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; GFX9-LABEL: name: test_load_constant_v3s64_align8 ; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; GFX9: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p4) :: (load 24, align 8, addrspace 4) + ; GFX9: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) + ; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p4) :: (load 8, addrspace 4) + ; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p4) :: (load 8, addrspace 4) + ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64) ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; CI-MESA-LABEL: name: test_load_constant_v3s64_align8 ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; CI-MESA: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p4) :: (load 24, align 8, addrspace 4) + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) + ; CI-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-MESA: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p4) :: (load 8, addrspace 4) + ; CI-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI-MESA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI-MESA: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p4) :: (load 8, addrspace 4) + ; CI-MESA: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64) ; CI-MESA: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; CI-MESA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; CI-MESA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; GFX9-MESA-LABEL: name: test_load_constant_v3s64_align8 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p4) :: (load 24, align 8, addrspace 4) + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) + ; GFX9-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-MESA: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p4) :: (load 8, addrspace 4) + ; GFX9-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9-MESA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9-MESA: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p4) :: (load 8, addrspace 4) + ; GFX9-MESA: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64) ; GFX9-MESA: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) %0:_(p4) = COPY $vgpr0_vgpr1 %1:_(<3 x s64>) = G_LOAD %0 :: (load 24, align 8, addrspace 4) @@ -7757,6 +10271,194 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v3s64_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 1, addrspace 4) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 5 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 1, addrspace 4) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 1, addrspace 4) + ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 7 + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 1, addrspace 4) + ; SI: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] + ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C9]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C9]] + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) + ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] + ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) + ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] + ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) + ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C9]] + ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C8]](s32) + ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) + ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] + ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) + ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) + ; SI: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C10]](s32) + ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] + ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) + ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) + ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C10]](s32) + ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] + ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) + ; SI: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C]](s64) + ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s64) + ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s64) + ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C3]](s64) + ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C4]](s64) + ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C5]](s64) + ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD14:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C6]](s64) + ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p4) :: (load 1, addrspace 4) + ; SI: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD8]](s32) + ; SI: [[AND8:%[0-9]+]]:_(s16) = G_AND [[TRUNC8]], [[C7]] + ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) + ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C9]] + ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[COPY8]](s32) + ; SI: [[TRUNC9:%[0-9]+]]:_(s16) = G_TRUNC [[SHL6]](s32) + ; SI: [[OR6:%[0-9]+]]:_(s16) = G_OR [[AND8]], [[TRUNC9]] + ; SI: [[TRUNC10:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD10]](s32) + ; SI: [[AND10:%[0-9]+]]:_(s16) = G_AND [[TRUNC10]], [[C7]] + ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) + ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C9]] + ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[COPY10]](s32) + ; SI: [[TRUNC11:%[0-9]+]]:_(s16) = G_TRUNC [[SHL7]](s32) + ; SI: [[OR7:%[0-9]+]]:_(s16) = G_OR [[AND10]], [[TRUNC11]] + ; SI: [[TRUNC12:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD12]](s32) + ; SI: [[AND12:%[0-9]+]]:_(s16) = G_AND [[TRUNC12]], [[C7]] + ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) + ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C9]] + ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[COPY12]](s32) + ; SI: [[TRUNC13:%[0-9]+]]:_(s16) = G_TRUNC [[SHL8]](s32) + ; SI: [[OR8:%[0-9]+]]:_(s16) = G_OR [[AND12]], [[TRUNC13]] + ; SI: [[TRUNC14:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD14]](s32) + ; SI: [[AND14:%[0-9]+]]:_(s16) = G_AND [[TRUNC14]], [[C7]] + ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) + ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C9]] + ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[COPY14]](s32) + ; SI: [[TRUNC15:%[0-9]+]]:_(s16) = G_TRUNC [[SHL9]](s32) + ; SI: [[OR9:%[0-9]+]]:_(s16) = G_OR [[AND14]], [[TRUNC15]] + ; SI: [[ZEXT4:%[0-9]+]]:_(s32) = G_ZEXT [[OR6]](s16) + ; SI: [[ZEXT5:%[0-9]+]]:_(s32) = G_ZEXT [[OR7]](s16) + ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[ZEXT5]], [[C10]](s32) + ; SI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[ZEXT4]], [[SHL10]] + ; SI: [[ZEXT6:%[0-9]+]]:_(s32) = G_ZEXT [[OR8]](s16) + ; SI: [[ZEXT7:%[0-9]+]]:_(s32) = G_ZEXT [[OR9]](s16) + ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[ZEXT7]], [[C10]](s32) + ; SI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[ZEXT6]], [[SHL11]] + ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR10]](s32), [[OR11]](s32) + ; SI: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; SI: [[PTR_ADD15:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C12]](s64) + ; SI: [[LOAD16:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD15]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD16:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD15]], [[C]](s64) + ; SI: [[LOAD17:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD16]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD17:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD15]], [[C1]](s64) + ; SI: [[LOAD18:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD17]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD18:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD15]], [[C2]](s64) + ; SI: [[LOAD19:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD18]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD19:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD15]], [[C3]](s64) + ; SI: [[LOAD20:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD19]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD20:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD15]], [[C4]](s64) + ; SI: [[LOAD21:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD20]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD21:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD15]], [[C5]](s64) + ; SI: [[LOAD22:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD21]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD22:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD15]], [[C6]](s64) + ; SI: [[LOAD23:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD22]](p4) :: (load 1, addrspace 4) + ; SI: [[TRUNC16:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD16]](s32) + ; SI: [[AND16:%[0-9]+]]:_(s16) = G_AND [[TRUNC16]], [[C7]] + ; SI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY17:%[0-9]+]]:_(s32) = COPY [[LOAD17]](s32) + ; SI: [[AND17:%[0-9]+]]:_(s32) = G_AND [[COPY17]], [[C9]] + ; SI: [[SHL12:%[0-9]+]]:_(s32) = G_SHL [[AND17]], [[COPY16]](s32) + ; SI: [[TRUNC17:%[0-9]+]]:_(s16) = G_TRUNC [[SHL12]](s32) + ; SI: [[OR12:%[0-9]+]]:_(s16) = G_OR [[AND16]], [[TRUNC17]] + ; SI: [[TRUNC18:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD18]](s32) + ; SI: [[AND18:%[0-9]+]]:_(s16) = G_AND [[TRUNC18]], [[C7]] + ; SI: [[COPY18:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY19:%[0-9]+]]:_(s32) = COPY [[LOAD19]](s32) + ; SI: [[AND19:%[0-9]+]]:_(s32) = G_AND [[COPY19]], [[C9]] + ; SI: [[SHL13:%[0-9]+]]:_(s32) = G_SHL [[AND19]], [[COPY18]](s32) + ; SI: [[TRUNC19:%[0-9]+]]:_(s16) = G_TRUNC [[SHL13]](s32) + ; SI: [[OR13:%[0-9]+]]:_(s16) = G_OR [[AND18]], [[TRUNC19]] + ; SI: [[TRUNC20:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD20]](s32) + ; SI: [[AND20:%[0-9]+]]:_(s16) = G_AND [[TRUNC20]], [[C7]] + ; SI: [[COPY20:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY21:%[0-9]+]]:_(s32) = COPY [[LOAD21]](s32) + ; SI: [[AND21:%[0-9]+]]:_(s32) = G_AND [[COPY21]], [[C9]] + ; SI: [[SHL14:%[0-9]+]]:_(s32) = G_SHL [[AND21]], [[COPY20]](s32) + ; SI: [[TRUNC21:%[0-9]+]]:_(s16) = G_TRUNC [[SHL14]](s32) + ; SI: [[OR14:%[0-9]+]]:_(s16) = G_OR [[AND20]], [[TRUNC21]] + ; SI: [[TRUNC22:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD22]](s32) + ; SI: [[AND22:%[0-9]+]]:_(s16) = G_AND [[TRUNC22]], [[C7]] + ; SI: [[COPY22:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY23:%[0-9]+]]:_(s32) = COPY [[LOAD23]](s32) + ; SI: [[AND23:%[0-9]+]]:_(s32) = G_AND [[COPY23]], [[C9]] + ; SI: [[SHL15:%[0-9]+]]:_(s32) = G_SHL [[AND23]], [[COPY22]](s32) + ; SI: [[TRUNC23:%[0-9]+]]:_(s16) = G_TRUNC [[SHL15]](s32) + ; SI: [[OR15:%[0-9]+]]:_(s16) = G_OR [[AND22]], [[TRUNC23]] + ; SI: [[ZEXT8:%[0-9]+]]:_(s32) = G_ZEXT [[OR12]](s16) + ; SI: [[ZEXT9:%[0-9]+]]:_(s32) = G_ZEXT [[OR13]](s16) + ; SI: [[SHL16:%[0-9]+]]:_(s32) = G_SHL [[ZEXT9]], [[C10]](s32) + ; SI: [[OR16:%[0-9]+]]:_(s32) = G_OR [[ZEXT8]], [[SHL16]] + ; SI: [[ZEXT10:%[0-9]+]]:_(s32) = G_ZEXT [[OR14]](s16) + ; SI: [[ZEXT11:%[0-9]+]]:_(s32) = G_ZEXT [[OR15]](s16) + ; SI: [[SHL17:%[0-9]+]]:_(s32) = G_SHL [[ZEXT11]], [[C10]](s32) + ; SI: [[OR17:%[0-9]+]]:_(s32) = G_OR [[ZEXT10]], [[SHL17]] + ; SI: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR16]](s32), [[OR17]](s32) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64) + ; SI: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF + ; SI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; CI-LABEL: name: test_load_constant_v3s64_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -8638,6 +11340,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v4s64_align32 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<4 x s64>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<4 x s64>) ; CI-LABEL: name: test_load_constant_v4s64_align32 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<4 x s64>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) @@ -8669,6 +11375,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v4s64_align8 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<4 x s64>) = G_LOAD [[COPY]](p4) :: (load 32, align 8, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<4 x s64>) ; CI-LABEL: name: test_load_constant_v4s64_align8 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<4 x s64>) = G_LOAD [[COPY]](p4) :: (load 32, align 8, addrspace 4) @@ -8700,6 +11410,250 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v4s64_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 1, addrspace 4) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 5 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 1, addrspace 4) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 1, addrspace 4) + ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 7 + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 1, addrspace 4) + ; SI: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] + ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C9]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C9]] + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) + ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] + ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) + ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] + ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) + ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C9]] + ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C8]](s32) + ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) + ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] + ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) + ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) + ; SI: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C10]](s32) + ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] + ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) + ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) + ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C10]](s32) + ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] + ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) + ; SI: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C]](s64) + ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s64) + ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s64) + ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C3]](s64) + ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C4]](s64) + ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C5]](s64) + ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD14:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C6]](s64) + ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p4) :: (load 1, addrspace 4) + ; SI: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD8]](s32) + ; SI: [[AND8:%[0-9]+]]:_(s16) = G_AND [[TRUNC8]], [[C7]] + ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) + ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C9]] + ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[COPY8]](s32) + ; SI: [[TRUNC9:%[0-9]+]]:_(s16) = G_TRUNC [[SHL6]](s32) + ; SI: [[OR6:%[0-9]+]]:_(s16) = G_OR [[AND8]], [[TRUNC9]] + ; SI: [[TRUNC10:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD10]](s32) + ; SI: [[AND10:%[0-9]+]]:_(s16) = G_AND [[TRUNC10]], [[C7]] + ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) + ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C9]] + ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[COPY10]](s32) + ; SI: [[TRUNC11:%[0-9]+]]:_(s16) = G_TRUNC [[SHL7]](s32) + ; SI: [[OR7:%[0-9]+]]:_(s16) = G_OR [[AND10]], [[TRUNC11]] + ; SI: [[TRUNC12:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD12]](s32) + ; SI: [[AND12:%[0-9]+]]:_(s16) = G_AND [[TRUNC12]], [[C7]] + ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) + ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C9]] + ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[COPY12]](s32) + ; SI: [[TRUNC13:%[0-9]+]]:_(s16) = G_TRUNC [[SHL8]](s32) + ; SI: [[OR8:%[0-9]+]]:_(s16) = G_OR [[AND12]], [[TRUNC13]] + ; SI: [[TRUNC14:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD14]](s32) + ; SI: [[AND14:%[0-9]+]]:_(s16) = G_AND [[TRUNC14]], [[C7]] + ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) + ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C9]] + ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[COPY14]](s32) + ; SI: [[TRUNC15:%[0-9]+]]:_(s16) = G_TRUNC [[SHL9]](s32) + ; SI: [[OR9:%[0-9]+]]:_(s16) = G_OR [[AND14]], [[TRUNC15]] + ; SI: [[ZEXT4:%[0-9]+]]:_(s32) = G_ZEXT [[OR6]](s16) + ; SI: [[ZEXT5:%[0-9]+]]:_(s32) = G_ZEXT [[OR7]](s16) + ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[ZEXT5]], [[C10]](s32) + ; SI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[ZEXT4]], [[SHL10]] + ; SI: [[ZEXT6:%[0-9]+]]:_(s32) = G_ZEXT [[OR8]](s16) + ; SI: [[ZEXT7:%[0-9]+]]:_(s32) = G_ZEXT [[OR9]](s16) + ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[ZEXT7]], [[C10]](s32) + ; SI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[ZEXT6]], [[SHL11]] + ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR10]](s32), [[OR11]](s32) + ; SI: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; SI: [[PTR_ADD15:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C12]](s64) + ; SI: [[LOAD16:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD15]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD16:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD15]], [[C]](s64) + ; SI: [[LOAD17:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD16]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD17:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD15]], [[C1]](s64) + ; SI: [[LOAD18:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD17]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD18:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD15]], [[C2]](s64) + ; SI: [[LOAD19:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD18]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD19:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD15]], [[C3]](s64) + ; SI: [[LOAD20:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD19]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD20:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD15]], [[C4]](s64) + ; SI: [[LOAD21:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD20]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD21:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD15]], [[C5]](s64) + ; SI: [[LOAD22:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD21]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD22:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD15]], [[C6]](s64) + ; SI: [[LOAD23:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD22]](p4) :: (load 1, addrspace 4) + ; SI: [[TRUNC16:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD16]](s32) + ; SI: [[AND16:%[0-9]+]]:_(s16) = G_AND [[TRUNC16]], [[C7]] + ; SI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY17:%[0-9]+]]:_(s32) = COPY [[LOAD17]](s32) + ; SI: [[AND17:%[0-9]+]]:_(s32) = G_AND [[COPY17]], [[C9]] + ; SI: [[SHL12:%[0-9]+]]:_(s32) = G_SHL [[AND17]], [[COPY16]](s32) + ; SI: [[TRUNC17:%[0-9]+]]:_(s16) = G_TRUNC [[SHL12]](s32) + ; SI: [[OR12:%[0-9]+]]:_(s16) = G_OR [[AND16]], [[TRUNC17]] + ; SI: [[TRUNC18:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD18]](s32) + ; SI: [[AND18:%[0-9]+]]:_(s16) = G_AND [[TRUNC18]], [[C7]] + ; SI: [[COPY18:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY19:%[0-9]+]]:_(s32) = COPY [[LOAD19]](s32) + ; SI: [[AND19:%[0-9]+]]:_(s32) = G_AND [[COPY19]], [[C9]] + ; SI: [[SHL13:%[0-9]+]]:_(s32) = G_SHL [[AND19]], [[COPY18]](s32) + ; SI: [[TRUNC19:%[0-9]+]]:_(s16) = G_TRUNC [[SHL13]](s32) + ; SI: [[OR13:%[0-9]+]]:_(s16) = G_OR [[AND18]], [[TRUNC19]] + ; SI: [[TRUNC20:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD20]](s32) + ; SI: [[AND20:%[0-9]+]]:_(s16) = G_AND [[TRUNC20]], [[C7]] + ; SI: [[COPY20:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY21:%[0-9]+]]:_(s32) = COPY [[LOAD21]](s32) + ; SI: [[AND21:%[0-9]+]]:_(s32) = G_AND [[COPY21]], [[C9]] + ; SI: [[SHL14:%[0-9]+]]:_(s32) = G_SHL [[AND21]], [[COPY20]](s32) + ; SI: [[TRUNC21:%[0-9]+]]:_(s16) = G_TRUNC [[SHL14]](s32) + ; SI: [[OR14:%[0-9]+]]:_(s16) = G_OR [[AND20]], [[TRUNC21]] + ; SI: [[TRUNC22:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD22]](s32) + ; SI: [[AND22:%[0-9]+]]:_(s16) = G_AND [[TRUNC22]], [[C7]] + ; SI: [[COPY22:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY23:%[0-9]+]]:_(s32) = COPY [[LOAD23]](s32) + ; SI: [[AND23:%[0-9]+]]:_(s32) = G_AND [[COPY23]], [[C9]] + ; SI: [[SHL15:%[0-9]+]]:_(s32) = G_SHL [[AND23]], [[COPY22]](s32) + ; SI: [[TRUNC23:%[0-9]+]]:_(s16) = G_TRUNC [[SHL15]](s32) + ; SI: [[OR15:%[0-9]+]]:_(s16) = G_OR [[AND22]], [[TRUNC23]] + ; SI: [[ZEXT8:%[0-9]+]]:_(s32) = G_ZEXT [[OR12]](s16) + ; SI: [[ZEXT9:%[0-9]+]]:_(s32) = G_ZEXT [[OR13]](s16) + ; SI: [[SHL16:%[0-9]+]]:_(s32) = G_SHL [[ZEXT9]], [[C10]](s32) + ; SI: [[OR16:%[0-9]+]]:_(s32) = G_OR [[ZEXT8]], [[SHL16]] + ; SI: [[ZEXT10:%[0-9]+]]:_(s32) = G_ZEXT [[OR14]](s16) + ; SI: [[ZEXT11:%[0-9]+]]:_(s32) = G_ZEXT [[OR15]](s16) + ; SI: [[SHL17:%[0-9]+]]:_(s32) = G_SHL [[ZEXT11]], [[C10]](s32) + ; SI: [[OR17:%[0-9]+]]:_(s32) = G_OR [[ZEXT10]], [[SHL17]] + ; SI: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR16]](s32), [[OR17]](s32) + ; SI: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; SI: [[PTR_ADD23:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C13]](s64) + ; SI: [[LOAD24:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD23]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD24:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD23]], [[C]](s64) + ; SI: [[LOAD25:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD24]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD25:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD23]], [[C1]](s64) + ; SI: [[LOAD26:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD25]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD26:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD23]], [[C2]](s64) + ; SI: [[LOAD27:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD26]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD27:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD23]], [[C3]](s64) + ; SI: [[LOAD28:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD27]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD28:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD23]], [[C4]](s64) + ; SI: [[LOAD29:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD28]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD29:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD23]], [[C5]](s64) + ; SI: [[LOAD30:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD29]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD30:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD23]], [[C6]](s64) + ; SI: [[LOAD31:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD30]](p4) :: (load 1, addrspace 4) + ; SI: [[TRUNC24:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD24]](s32) + ; SI: [[AND24:%[0-9]+]]:_(s16) = G_AND [[TRUNC24]], [[C7]] + ; SI: [[COPY24:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY25:%[0-9]+]]:_(s32) = COPY [[LOAD25]](s32) + ; SI: [[AND25:%[0-9]+]]:_(s32) = G_AND [[COPY25]], [[C9]] + ; SI: [[SHL18:%[0-9]+]]:_(s32) = G_SHL [[AND25]], [[COPY24]](s32) + ; SI: [[TRUNC25:%[0-9]+]]:_(s16) = G_TRUNC [[SHL18]](s32) + ; SI: [[OR18:%[0-9]+]]:_(s16) = G_OR [[AND24]], [[TRUNC25]] + ; SI: [[TRUNC26:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD26]](s32) + ; SI: [[AND26:%[0-9]+]]:_(s16) = G_AND [[TRUNC26]], [[C7]] + ; SI: [[COPY26:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY27:%[0-9]+]]:_(s32) = COPY [[LOAD27]](s32) + ; SI: [[AND27:%[0-9]+]]:_(s32) = G_AND [[COPY27]], [[C9]] + ; SI: [[SHL19:%[0-9]+]]:_(s32) = G_SHL [[AND27]], [[COPY26]](s32) + ; SI: [[TRUNC27:%[0-9]+]]:_(s16) = G_TRUNC [[SHL19]](s32) + ; SI: [[OR19:%[0-9]+]]:_(s16) = G_OR [[AND26]], [[TRUNC27]] + ; SI: [[TRUNC28:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD28]](s32) + ; SI: [[AND28:%[0-9]+]]:_(s16) = G_AND [[TRUNC28]], [[C7]] + ; SI: [[COPY28:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY29:%[0-9]+]]:_(s32) = COPY [[LOAD29]](s32) + ; SI: [[AND29:%[0-9]+]]:_(s32) = G_AND [[COPY29]], [[C9]] + ; SI: [[SHL20:%[0-9]+]]:_(s32) = G_SHL [[AND29]], [[COPY28]](s32) + ; SI: [[TRUNC29:%[0-9]+]]:_(s16) = G_TRUNC [[SHL20]](s32) + ; SI: [[OR20:%[0-9]+]]:_(s16) = G_OR [[AND28]], [[TRUNC29]] + ; SI: [[TRUNC30:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD30]](s32) + ; SI: [[AND30:%[0-9]+]]:_(s16) = G_AND [[TRUNC30]], [[C7]] + ; SI: [[COPY30:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY31:%[0-9]+]]:_(s32) = COPY [[LOAD31]](s32) + ; SI: [[AND31:%[0-9]+]]:_(s32) = G_AND [[COPY31]], [[C9]] + ; SI: [[SHL21:%[0-9]+]]:_(s32) = G_SHL [[AND31]], [[COPY30]](s32) + ; SI: [[TRUNC31:%[0-9]+]]:_(s16) = G_TRUNC [[SHL21]](s32) + ; SI: [[OR21:%[0-9]+]]:_(s16) = G_OR [[AND30]], [[TRUNC31]] + ; SI: [[ZEXT12:%[0-9]+]]:_(s32) = G_ZEXT [[OR18]](s16) + ; SI: [[ZEXT13:%[0-9]+]]:_(s32) = G_ZEXT [[OR19]](s16) + ; SI: [[SHL22:%[0-9]+]]:_(s32) = G_SHL [[ZEXT13]], [[C10]](s32) + ; SI: [[OR22:%[0-9]+]]:_(s32) = G_OR [[ZEXT12]], [[SHL22]] + ; SI: [[ZEXT14:%[0-9]+]]:_(s32) = G_ZEXT [[OR20]](s16) + ; SI: [[ZEXT15:%[0-9]+]]:_(s32) = G_ZEXT [[OR21]](s16) + ; SI: [[SHL23:%[0-9]+]]:_(s32) = G_SHL [[ZEXT15]], [[C10]](s32) + ; SI: [[OR23:%[0-9]+]]:_(s32) = G_OR [[ZEXT14]], [[SHL23]] + ; SI: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR22]](s32), [[OR23]](s32) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64), [[MV3]](s64) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x s64>) ; CI-LABEL: name: test_load_constant_v4s64_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -9835,6 +12789,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2s128_align32 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<2 x s128>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<2 x s128>) ; CI-LABEL: name: test_load_constant_v2s128_align32 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s128>) = G_LOAD [[COPY]](p4) :: (load 32, addrspace 4) @@ -9866,6 +12824,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2p1_align16 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<2 x p1>) = G_LOAD [[COPY]](p4) :: (load 16, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<2 x p1>) ; CI-LABEL: name: test_load_constant_v2p1_align16 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<2 x p1>) = G_LOAD [[COPY]](p4) :: (load 16, addrspace 4) @@ -9897,6 +12859,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2p1_align8 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<2 x p1>) = G_LOAD [[COPY]](p4) :: (load 16, align 8, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<2 x p1>) ; CI-LABEL: name: test_load_constant_v2p1_align8 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<2 x p1>) = G_LOAD [[COPY]](p4) :: (load 16, align 8, addrspace 4) @@ -9928,6 +12894,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2p1_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<2 x p1>) = G_LOAD [[COPY]](p4) :: (load 16, align 4, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<2 x p1>) ; CI-LABEL: name: test_load_constant_v2p1_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<2 x p1>) = G_LOAD [[COPY]](p4) :: (load 16, align 4, addrspace 4) @@ -9959,6 +12929,134 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2p1_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 1, addrspace 4) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 5 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 1, addrspace 4) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 1, addrspace 4) + ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 7 + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 1, addrspace 4) + ; SI: [[C7:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C7]] + ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C9]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C7]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C7]] + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C9]] + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) + ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] + ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) + ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C7]] + ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) + ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C9]] + ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C8]](s32) + ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) + ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] + ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) + ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) + ; SI: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C10]](s32) + ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]] + ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) + ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) + ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C10]](s32) + ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] + ; SI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32) + ; SI: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C]](s64) + ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s64) + ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s64) + ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C3]](s64) + ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C4]](s64) + ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C5]](s64) + ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD14:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD7]], [[C6]](s64) + ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p4) :: (load 1, addrspace 4) + ; SI: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD8]](s32) + ; SI: [[AND8:%[0-9]+]]:_(s16) = G_AND [[TRUNC8]], [[C7]] + ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) + ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C9]] + ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[COPY8]](s32) + ; SI: [[TRUNC9:%[0-9]+]]:_(s16) = G_TRUNC [[SHL6]](s32) + ; SI: [[OR6:%[0-9]+]]:_(s16) = G_OR [[AND8]], [[TRUNC9]] + ; SI: [[TRUNC10:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD10]](s32) + ; SI: [[AND10:%[0-9]+]]:_(s16) = G_AND [[TRUNC10]], [[C7]] + ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) + ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C9]] + ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[COPY10]](s32) + ; SI: [[TRUNC11:%[0-9]+]]:_(s16) = G_TRUNC [[SHL7]](s32) + ; SI: [[OR7:%[0-9]+]]:_(s16) = G_OR [[AND10]], [[TRUNC11]] + ; SI: [[TRUNC12:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD12]](s32) + ; SI: [[AND12:%[0-9]+]]:_(s16) = G_AND [[TRUNC12]], [[C7]] + ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) + ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C9]] + ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[COPY12]](s32) + ; SI: [[TRUNC13:%[0-9]+]]:_(s16) = G_TRUNC [[SHL8]](s32) + ; SI: [[OR8:%[0-9]+]]:_(s16) = G_OR [[AND12]], [[TRUNC13]] + ; SI: [[TRUNC14:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD14]](s32) + ; SI: [[AND14:%[0-9]+]]:_(s16) = G_AND [[TRUNC14]], [[C7]] + ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[C8]](s32) + ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) + ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C9]] + ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[COPY14]](s32) + ; SI: [[TRUNC15:%[0-9]+]]:_(s16) = G_TRUNC [[SHL9]](s32) + ; SI: [[OR9:%[0-9]+]]:_(s16) = G_OR [[AND14]], [[TRUNC15]] + ; SI: [[ZEXT4:%[0-9]+]]:_(s32) = G_ZEXT [[OR6]](s16) + ; SI: [[ZEXT5:%[0-9]+]]:_(s32) = G_ZEXT [[OR7]](s16) + ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[ZEXT5]], [[C10]](s32) + ; SI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[ZEXT4]], [[SHL10]] + ; SI: [[ZEXT6:%[0-9]+]]:_(s32) = G_ZEXT [[OR8]](s16) + ; SI: [[ZEXT7:%[0-9]+]]:_(s32) = G_ZEXT [[OR9]](s16) + ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[ZEXT7]], [[C10]](s32) + ; SI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[ZEXT6]], [[SHL11]] + ; SI: [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR10]](s32), [[OR11]](s32) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p1>) ; CI-LABEL: name: test_load_constant_v2p1_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -10562,6 +13660,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2p3_align8 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<2 x p3>) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x p3>) ; CI-LABEL: name: test_load_constant_v2p3_align8 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<2 x p3>) = G_LOAD [[COPY]](p4) :: (load 8, addrspace 4) @@ -10593,6 +13695,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2p3_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<2 x p3>) = G_LOAD [[COPY]](p4) :: (load 8, align 4, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x p3>) ; CI-LABEL: name: test_load_constant_v2p3_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<2 x p3>) = G_LOAD [[COPY]](p4) :: (load 8, align 4, addrspace 4) @@ -10624,6 +13730,74 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_v2p3_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 4) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 4) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 4) + ; SI: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]] + ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C4]](s32) + ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C5]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C3]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C5]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) + ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) + ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C6]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] + ; SI: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR2]](s32) + ; SI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD3]], [[C]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 1, addrspace 4) + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 1, addrspace 4) + ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C3]] + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C4]](s32) + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C5]] + ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY4]](s32) + ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) + ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] + ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) + ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C3]] + ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[C4]](s32) + ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) + ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C5]] + ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[COPY6]](s32) + ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL4]](s32) + ; SI: [[OR4:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] + ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) + ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR4]](s16) + ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C6]](s32) + ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] + ; SI: [[INTTOPTR1:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR5]](s32) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p3>) = G_BUILD_VECTOR [[INTTOPTR]](p3), [[INTTOPTR1]](p3) + ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x p3>) ; CI-LABEL: name: test_load_constant_v2p3_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 4) @@ -10951,6 +14125,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_ext_load_constant_s32_from_1_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, align 4, addrspace 4) + ; SI: $vgpr0 = COPY [[LOAD]](s32) ; CI-LABEL: name: test_ext_load_constant_s32_from_1_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, align 4, addrspace 4) @@ -10982,6 +14160,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_ext_load_constant_s32_from_2_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, align 4, addrspace 4) + ; SI: $vgpr0 = COPY [[LOAD]](s32) ; CI-LABEL: name: test_ext_load_constant_s32_from_2_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, align 4, addrspace 4) @@ -11014,6 +14196,10 @@ liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_ext_load_constant_s64_from_1_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 1, align 4, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) ; CI-LABEL: name: test_ext_load_constant_s64_from_1_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 1, align 4, addrspace 4) @@ -11045,6 +14231,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_ext_load_constant_s64_from_2_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 2, align 4, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) ; CI-LABEL: name: test_ext_load_constant_s64_from_2_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 2, align 4, addrspace 4) @@ -11076,6 +14266,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_ext_load_constant_s64_from_4_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) ; CI-LABEL: name: test_ext_load_constant_s64_from_4_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) @@ -11107,6 +14301,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_ext_load_constant_s128_from_4_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](s128) ; CI-LABEL: name: test_ext_load_constant_s128_from_4_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 4) @@ -11138,6 +14336,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_ext_load_constant_s64_from_2_align2 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 2, align 4, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) ; CI-LABEL: name: test_ext_load_constant_s64_from_2_align2 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 2, align 4, addrspace 4) @@ -11169,6 +14371,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_ext_load_constant_s64_from_1_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 1, align 4, addrspace 4) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) ; CI-LABEL: name: test_ext_load_constant_s64_from_1_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p4) :: (load 1, align 4, addrspace 4) @@ -11200,6 +14406,72 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_extload_constant_v2s32_from_4_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 1) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 1) + ; SI: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]] + ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C4]](s32) + ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C5]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C3]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C5]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C4]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) + ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) + ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C6]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] + ; SI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 1, addrspace 1) + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD3]], [[C]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 1, addrspace 1) + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 1, addrspace 1) + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 1, addrspace 1) + ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C3]] + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C4]](s32) + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C5]] + ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY4]](s32) + ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) + ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] + ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) + ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C3]] + ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[C4]](s32) + ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) + ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C5]] + ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[COPY6]](s32) + ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL4]](s32) + ; SI: [[OR4:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] + ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) + ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR4]](s16) + ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C6]](s32) + ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) + ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) ; CI-LABEL: name: test_extload_constant_v2s32_from_4_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 1) @@ -11517,6 +14789,33 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_extload_constant_v2s32_from_4_align2 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 2, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] + ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) + ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 2, addrspace 1) + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD1]], [[C]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 2, addrspace 1) + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32) + ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) ; CI-LABEL: name: test_extload_constant_v2s32_from_4_align2 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 1) @@ -11663,6 +14962,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_extload_constant_v2s32_from_4_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 1) + ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) ; CI-LABEL: name: test_extload_constant_v2s32_from_4_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 1) @@ -11694,6 +14997,17 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_extload_constant_v3s32_from_6_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 1) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) + ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) ; CI-LABEL: name: test_extload_constant_v3s32_from_6_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 1) @@ -11760,6 +15074,20 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_extload_constant_v4s32_from_8_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 1) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 1) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) ; CI-LABEL: name: test_extload_constant_v4s32_from_8_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 1) @@ -11841,6 +15169,196 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_extload_constant_v2s96_from_24_align1 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 1, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 1, addrspace 1) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 3 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 1, addrspace 1) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 1, addrspace 1) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 5 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 1, addrspace 1) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 1, addrspace 1) + ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 7 + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 1, addrspace 1) + ; SI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 1, addrspace 1) + ; SI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 9 + ; SI: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C8]](s64) + ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 1, addrspace 1) + ; SI: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 10 + ; SI: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C9]](s64) + ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 1, addrspace 1) + ; SI: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 11 + ; SI: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C10]](s64) + ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 1, addrspace 1) + ; SI: [[C11:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C11]] + ; SI: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C12]](s32) + ; SI: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C13]] + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) + ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] + ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C11]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C12]](s32) + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C13]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY3]](s32) + ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] + ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C11]] + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C12]](s32) + ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C13]] + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY5]](s32) + ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL2]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] + ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) + ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C11]] + ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[C12]](s32) + ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) + ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C13]] + ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[COPY7]](s32) + ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) + ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] + ; SI: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD8]](s32) + ; SI: [[AND8:%[0-9]+]]:_(s16) = G_AND [[TRUNC8]], [[C11]] + ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[C12]](s32) + ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) + ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C13]] + ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[COPY9]](s32) + ; SI: [[TRUNC9:%[0-9]+]]:_(s16) = G_TRUNC [[SHL4]](s32) + ; SI: [[OR4:%[0-9]+]]:_(s16) = G_OR [[AND8]], [[TRUNC9]] + ; SI: [[TRUNC10:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD10]](s32) + ; SI: [[AND10:%[0-9]+]]:_(s16) = G_AND [[TRUNC10]], [[C11]] + ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) + ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C13]] + ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C12]](s32) + ; SI: [[TRUNC11:%[0-9]+]]:_(s16) = G_TRUNC [[SHL5]](s32) + ; SI: [[OR5:%[0-9]+]]:_(s16) = G_OR [[AND10]], [[TRUNC11]] + ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) + ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) + ; SI: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C14]](s32) + ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL6]] + ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) + ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) + ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C14]](s32) + ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL7]] + ; SI: [[ZEXT4:%[0-9]+]]:_(s32) = G_ZEXT [[OR4]](s16) + ; SI: [[ZEXT5:%[0-9]+]]:_(s32) = G_ZEXT [[OR5]](s16) + ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[ZEXT5]], [[C14]](s32) + ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[ZEXT4]], [[SHL8]] + ; SI: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[OR6]](s32), [[OR7]](s32), [[OR8]](s32) + ; SI: [[C15:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C15]](s64) + ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 1, addrspace 1) + ; SI: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD11]], [[C]](s64) + ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 1, addrspace 1) + ; SI: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s64) + ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 1, addrspace 1) + ; SI: [[PTR_ADD14:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s64) + ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p4) :: (load 1, addrspace 1) + ; SI: [[PTR_ADD15:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD11]], [[C3]](s64) + ; SI: [[LOAD16:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD15]](p4) :: (load 1, addrspace 1) + ; SI: [[PTR_ADD16:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD11]], [[C4]](s64) + ; SI: [[LOAD17:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD16]](p4) :: (load 1, addrspace 1) + ; SI: [[PTR_ADD17:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD11]], [[C5]](s64) + ; SI: [[LOAD18:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD17]](p4) :: (load 1, addrspace 1) + ; SI: [[PTR_ADD18:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD11]], [[C6]](s64) + ; SI: [[LOAD19:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD18]](p4) :: (load 1, addrspace 1) + ; SI: [[PTR_ADD19:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD11]], [[C7]](s64) + ; SI: [[LOAD20:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD19]](p4) :: (load 1, addrspace 1) + ; SI: [[PTR_ADD20:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD11]], [[C8]](s64) + ; SI: [[LOAD21:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD20]](p4) :: (load 1, addrspace 1) + ; SI: [[PTR_ADD21:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD11]], [[C9]](s64) + ; SI: [[LOAD22:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD21]](p4) :: (load 1, addrspace 1) + ; SI: [[PTR_ADD22:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD11]], [[C10]](s64) + ; SI: [[LOAD23:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD22]](p4) :: (load 1, addrspace 1) + ; SI: [[TRUNC12:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD12]](s32) + ; SI: [[AND12:%[0-9]+]]:_(s16) = G_AND [[TRUNC12]], [[C11]] + ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[C12]](s32) + ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) + ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C13]] + ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[COPY12]](s32) + ; SI: [[TRUNC13:%[0-9]+]]:_(s16) = G_TRUNC [[SHL9]](s32) + ; SI: [[OR9:%[0-9]+]]:_(s16) = G_OR [[AND12]], [[TRUNC13]] + ; SI: [[TRUNC14:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD14]](s32) + ; SI: [[AND14:%[0-9]+]]:_(s16) = G_AND [[TRUNC14]], [[C11]] + ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[C12]](s32) + ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) + ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C13]] + ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[COPY14]](s32) + ; SI: [[TRUNC15:%[0-9]+]]:_(s16) = G_TRUNC [[SHL10]](s32) + ; SI: [[OR10:%[0-9]+]]:_(s16) = G_OR [[AND14]], [[TRUNC15]] + ; SI: [[TRUNC16:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD16]](s32) + ; SI: [[AND16:%[0-9]+]]:_(s16) = G_AND [[TRUNC16]], [[C11]] + ; SI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[C12]](s32) + ; SI: [[COPY17:%[0-9]+]]:_(s32) = COPY [[LOAD17]](s32) + ; SI: [[AND17:%[0-9]+]]:_(s32) = G_AND [[COPY17]], [[C13]] + ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND17]], [[COPY16]](s32) + ; SI: [[TRUNC17:%[0-9]+]]:_(s16) = G_TRUNC [[SHL11]](s32) + ; SI: [[OR11:%[0-9]+]]:_(s16) = G_OR [[AND16]], [[TRUNC17]] + ; SI: [[TRUNC18:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD18]](s32) + ; SI: [[AND18:%[0-9]+]]:_(s16) = G_AND [[TRUNC18]], [[C11]] + ; SI: [[COPY18:%[0-9]+]]:_(s32) = COPY [[C12]](s32) + ; SI: [[COPY19:%[0-9]+]]:_(s32) = COPY [[LOAD19]](s32) + ; SI: [[AND19:%[0-9]+]]:_(s32) = G_AND [[COPY19]], [[C13]] + ; SI: [[SHL12:%[0-9]+]]:_(s32) = G_SHL [[AND19]], [[COPY18]](s32) + ; SI: [[TRUNC19:%[0-9]+]]:_(s16) = G_TRUNC [[SHL12]](s32) + ; SI: [[OR12:%[0-9]+]]:_(s16) = G_OR [[AND18]], [[TRUNC19]] + ; SI: [[TRUNC20:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD20]](s32) + ; SI: [[AND20:%[0-9]+]]:_(s16) = G_AND [[TRUNC20]], [[C11]] + ; SI: [[COPY20:%[0-9]+]]:_(s32) = COPY [[C12]](s32) + ; SI: [[COPY21:%[0-9]+]]:_(s32) = COPY [[LOAD21]](s32) + ; SI: [[AND21:%[0-9]+]]:_(s32) = G_AND [[COPY21]], [[C13]] + ; SI: [[SHL13:%[0-9]+]]:_(s32) = G_SHL [[AND21]], [[COPY20]](s32) + ; SI: [[TRUNC21:%[0-9]+]]:_(s16) = G_TRUNC [[SHL13]](s32) + ; SI: [[OR13:%[0-9]+]]:_(s16) = G_OR [[AND20]], [[TRUNC21]] + ; SI: [[TRUNC22:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD22]](s32) + ; SI: [[AND22:%[0-9]+]]:_(s16) = G_AND [[TRUNC22]], [[C11]] + ; SI: [[COPY22:%[0-9]+]]:_(s32) = COPY [[C12]](s32) + ; SI: [[COPY23:%[0-9]+]]:_(s32) = COPY [[LOAD23]](s32) + ; SI: [[AND23:%[0-9]+]]:_(s32) = G_AND [[COPY23]], [[C13]] + ; SI: [[SHL14:%[0-9]+]]:_(s32) = G_SHL [[AND23]], [[COPY22]](s32) + ; SI: [[TRUNC23:%[0-9]+]]:_(s16) = G_TRUNC [[SHL14]](s32) + ; SI: [[OR14:%[0-9]+]]:_(s16) = G_OR [[AND22]], [[TRUNC23]] + ; SI: [[ZEXT6:%[0-9]+]]:_(s32) = G_ZEXT [[OR9]](s16) + ; SI: [[ZEXT7:%[0-9]+]]:_(s32) = G_ZEXT [[OR10]](s16) + ; SI: [[SHL15:%[0-9]+]]:_(s32) = G_SHL [[ZEXT7]], [[C14]](s32) + ; SI: [[OR15:%[0-9]+]]:_(s32) = G_OR [[ZEXT6]], [[SHL15]] + ; SI: [[ZEXT8:%[0-9]+]]:_(s32) = G_ZEXT [[OR11]](s16) + ; SI: [[ZEXT9:%[0-9]+]]:_(s32) = G_ZEXT [[OR12]](s16) + ; SI: [[SHL16:%[0-9]+]]:_(s32) = G_SHL [[ZEXT9]], [[C14]](s32) + ; SI: [[OR16:%[0-9]+]]:_(s32) = G_OR [[ZEXT8]], [[SHL16]] + ; SI: [[ZEXT10:%[0-9]+]]:_(s32) = G_ZEXT [[OR13]](s16) + ; SI: [[ZEXT11:%[0-9]+]]:_(s32) = G_ZEXT [[OR14]](s16) + ; SI: [[SHL17:%[0-9]+]]:_(s32) = G_SHL [[ZEXT11]], [[C14]](s32) + ; SI: [[OR17:%[0-9]+]]:_(s32) = G_OR [[ZEXT10]], [[SHL17]] + ; SI: [[MV1:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[OR15]](s32), [[OR16]](s32), [[OR17]](s32) + ; SI: [[COPY24:%[0-9]+]]:_(s96) = COPY [[MV]](s96) + ; SI: [[COPY25:%[0-9]+]]:_(s96) = COPY [[MV1]](s96) + ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY24]](s96) + ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY25]](s96) ; CI-LABEL: name: test_extload_constant_v2s96_from_24_align1 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 1, addrspace 1) @@ -12733,6 +16251,81 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_extload_constant_v2s96_from_24_align2 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 2, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 2, addrspace 1) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 6 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 2, addrspace 1) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 2, addrspace 1) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 10 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 2, addrspace 1) + ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) + ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C5]] + ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C5]] + ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C6]](s32) + ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] + ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) + ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C5]] + ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C5]] + ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] + ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C5]] + ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C5]] + ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C6]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] + ; SI: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32), [[OR2]](s32) + ; SI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 2, addrspace 1) + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD5]], [[C]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 2, addrspace 1) + ; SI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD5]], [[C1]](s64) + ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 2, addrspace 1) + ; SI: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD5]], [[C2]](s64) + ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 2, addrspace 1) + ; SI: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD5]], [[C3]](s64) + ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 2, addrspace 1) + ; SI: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD5]], [[C4]](s64) + ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 2, addrspace 1) + ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) + ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C5]] + ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) + ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C5]] + ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) + ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] + ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) + ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C5]] + ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) + ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C5]] + ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C6]](s32) + ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL4]] + ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) + ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C5]] + ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) + ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C5]] + ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) + ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[AND10]], [[SHL5]] + ; SI: [[MV1:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[OR3]](s32), [[OR4]](s32), [[OR5]](s32) + ; SI: [[COPY13:%[0-9]+]]:_(s96) = COPY [[MV]](s96) + ; SI: [[COPY14:%[0-9]+]]:_(s96) = COPY [[MV1]](s96) + ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY13]](s96) + ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY14]](s96) ; CI-LABEL: name: test_extload_constant_v2s96_from_24_align2 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 2, addrspace 1) @@ -13122,41 +16715,78 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_extload_constant_v2s96_from_24_align4 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 1) + ; SI: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 1) + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD2]], [[C]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, addrspace 1) + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD2]], [[C1]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 1) + ; SI: [[MV1:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32) + ; SI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[MV]](s96) + ; SI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[MV1]](s96) + ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; CI-LABEL: name: test_extload_constant_v2s96_from_24_align4 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; CI: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p4) :: (load 24, align 4, addrspace 1) - ; CI: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; CI: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; CI: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; CI: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 1) + ; CI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p4) :: (load 12, align 4, addrspace 1) + ; CI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; CI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; CI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; VI-LABEL: name: test_extload_constant_v2s96_from_24_align4 ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; VI: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p4) :: (load 24, align 4, addrspace 1) - ; VI: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; VI: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; VI: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 1) + ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; VI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; VI: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p4) :: (load 12, align 4, addrspace 1) + ; VI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; VI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; GFX9-LABEL: name: test_extload_constant_v2s96_from_24_align4 ; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p4) :: (load 24, align 4, addrspace 1) - ; GFX9: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; GFX9: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; GFX9: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; GFX9: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 1) + ; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p4) :: (load 12, align 4, addrspace 1) + ; GFX9: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; GFX9: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; GFX9: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; CI-MESA-LABEL: name: test_extload_constant_v2s96_from_24_align4 ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; CI-MESA: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p4) :: (load 24, align 4, addrspace 1) - ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; CI-MESA: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; CI-MESA: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; CI-MESA: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 1) + ; CI-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-MESA: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p4) :: (load 12, align 4, addrspace 1) + ; CI-MESA: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; CI-MESA: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; CI-MESA: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; CI-MESA: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; GFX9-MESA-LABEL: name: test_extload_constant_v2s96_from_24_align4 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p4) :: (load 24, align 4, addrspace 1) - ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; GFX9-MESA: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; GFX9-MESA: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; GFX9-MESA: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 4, addrspace 1) + ; GFX9-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-MESA: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p4) :: (load 12, align 4, addrspace 1) + ; GFX9-MESA: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; GFX9-MESA: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; GFX9-MESA: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) %0:_(p4) = COPY $vgpr0_vgpr1 %1:_(<2 x s96>) = G_LOAD %0 :: (load 24, align 4, addrspace 1) %2:_(s96) = G_EXTRACT %1, 0 @@ -13171,41 +16801,74 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_extload_constant_v2s96_from_24_align16 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p4) :: (load 12, align 16, addrspace 1) + ; SI: [[TRUNC:%[0-9]+]]:_(s96) = G_TRUNC [[LOAD]](s128) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, addrspace 1) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 1) + ; SI: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) + ; SI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[TRUNC]](s96) + ; SI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[MV]](s96) + ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; CI-LABEL: name: test_extload_constant_v2s96_from_24_align16 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; CI: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p4) :: (load 24, align 16, addrspace 1) - ; CI: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; CI: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; CI: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; CI: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 16, addrspace 1) + ; CI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p4) :: (load 12, align 4, addrspace 1) + ; CI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; CI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; CI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; VI-LABEL: name: test_extload_constant_v2s96_from_24_align16 ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; VI: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p4) :: (load 24, align 16, addrspace 1) - ; VI: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; VI: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; VI: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 16, addrspace 1) + ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; VI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; VI: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p4) :: (load 12, align 4, addrspace 1) + ; VI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; VI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; GFX9-LABEL: name: test_extload_constant_v2s96_from_24_align16 ; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p4) :: (load 24, align 16, addrspace 1) - ; GFX9: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; GFX9: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; GFX9: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; GFX9: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 16, addrspace 1) + ; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p4) :: (load 12, align 4, addrspace 1) + ; GFX9: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; GFX9: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; GFX9: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; CI-MESA-LABEL: name: test_extload_constant_v2s96_from_24_align16 ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; CI-MESA: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p4) :: (load 24, align 16, addrspace 1) - ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; CI-MESA: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; CI-MESA: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; CI-MESA: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 16, addrspace 1) + ; CI-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-MESA: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p4) :: (load 12, align 4, addrspace 1) + ; CI-MESA: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; CI-MESA: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; CI-MESA: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; CI-MESA: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; GFX9-MESA-LABEL: name: test_extload_constant_v2s96_from_24_align16 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 - ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p4) :: (load 24, align 16, addrspace 1) - ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; GFX9-MESA: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; GFX9-MESA: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; GFX9-MESA: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p4) :: (load 12, align 16, addrspace 1) + ; GFX9-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-MESA: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p4) :: (load 12, align 4, addrspace 1) + ; GFX9-MESA: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; GFX9-MESA: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; GFX9-MESA: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) %0:_(p4) = COPY $vgpr0_vgpr1 %1:_(<2 x s96>) = G_LOAD %0 :: (load 24, align 16, addrspace 1) %2:_(s96) = G_EXTRACT %1, 0 @@ -13220,6 +16883,10 @@ bb.0: liveins: $vgpr0_vgpr1 + ; SI-LABEL: name: test_load_constant_s512_align32 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s512) = G_LOAD [[COPY]](p4) :: (load 16, align 32, addrspace 4) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[LOAD]](s512) ; CI-LABEL: name: test_load_constant_s512_align32 ; CI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 ; CI: [[LOAD:%[0-9]+]]:_(s512) = G_LOAD [[COPY]](p4) :: (load 16, align 32, addrspace 4) Index: llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir =================================================================== --- llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir +++ llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir @@ -5133,33 +5133,38 @@ ; CI-LABEL: name: test_load_flat_v3s16_align8 ; CI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1 - ; CI: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p0) :: (load 6, align 8) + ; CI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load 6, align 8) + ; CI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; CI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; CI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; CI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; CI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; VI-LABEL: name: test_load_flat_v3s16_align8 ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1 - ; VI: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p0) :: (load 6, align 8) + ; VI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load 6, align 8) + ; VI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; VI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; VI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; GFX9-LABEL: name: test_load_flat_v3s16_align8 ; GFX9: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1 - ; GFX9: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p0) :: (load 6, align 8) + ; GFX9: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load 6, align 8) + ; GFX9: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; GFX9: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; CI-MESA-LABEL: name: test_load_flat_v3s16_align8 ; CI-MESA: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1 - ; CI-MESA: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p0) :: (load 6, align 8) + ; CI-MESA: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load 6, align 8) + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; CI-MESA: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; CI-MESA: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; CI-MESA: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; CI-MESA: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; GFX9-MESA-LABEL: name: test_load_flat_v3s16_align8 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1 - ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p0) :: (load 6, align 8) + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load 6, align 8) + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; GFX9-MESA: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; GFX9-MESA: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) %0:_(p0) = COPY $vgpr0_vgpr1 %1:_(<3 x s16>) = G_LOAD %0 :: (load 6, align 8, addrspace 0) Index: llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir =================================================================== --- llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir +++ llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir @@ -1908,34 +1908,106 @@ ; CI: S_NOP 0, implicit [[TRUNC]](s160) ; SI-LABEL: name: test_load_global_s160_align4 ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; SI: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 20, align 4, addrspace 1) - ; SI: [[TRUNC:%[0-9]+]]:_(s160) = G_TRUNC [[LOAD]](s256) - ; SI: S_NOP 0, implicit [[TRUNC]](s160) + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p1) :: (load 4, addrspace 1) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p1) :: (load 4, addrspace 1) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p1) :: (load 4, addrspace 1) + ; SI: [[MV:%[0-9]+]]:_(s160) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32) + ; SI: S_NOP 0, implicit [[MV]](s160) ; CI-HSA-LABEL: name: test_load_global_s160_align4 ; CI-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-HSA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 20, align 4, addrspace 1) - ; CI-HSA: [[TRUNC:%[0-9]+]]:_(s160) = G_TRUNC [[LOAD]](s256) - ; CI-HSA: S_NOP 0, implicit [[TRUNC]](s160) + ; CI-HSA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) + ; CI-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; CI-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-HSA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, addrspace 1) + ; CI-HSA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI-HSA: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI-HSA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p1) :: (load 4, addrspace 1) + ; CI-HSA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-HSA: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; CI-HSA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p1) :: (load 4, addrspace 1) + ; CI-HSA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI-HSA: [[PTR_ADD3:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; CI-HSA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p1) :: (load 4, addrspace 1) + ; CI-HSA: [[MV:%[0-9]+]]:_(s160) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32) + ; CI-HSA: S_NOP 0, implicit [[MV]](s160) ; CI-MESA-LABEL: name: test_load_global_s160_align4 ; CI-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-MESA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 20, align 4, addrspace 1) - ; CI-MESA: [[TRUNC:%[0-9]+]]:_(s160) = G_TRUNC [[LOAD]](s256) - ; CI-MESA: S_NOP 0, implicit [[TRUNC]](s160) + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) + ; CI-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; CI-MESA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, addrspace 1) + ; CI-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI-MESA: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI-MESA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p1) :: (load 4, addrspace 1) + ; CI-MESA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-MESA: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; CI-MESA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p1) :: (load 4, addrspace 1) + ; CI-MESA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI-MESA: [[PTR_ADD3:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; CI-MESA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p1) :: (load 4, addrspace 1) + ; CI-MESA: [[MV:%[0-9]+]]:_(s160) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32) + ; CI-MESA: S_NOP 0, implicit [[MV]](s160) ; VI-LABEL: name: test_load_global_s160_align4 ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; VI: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 20, align 4, addrspace 1) - ; VI: [[TRUNC:%[0-9]+]]:_(s160) = G_TRUNC [[LOAD]](s256) - ; VI: S_NOP 0, implicit [[TRUNC]](s160) + ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) + ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; VI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, addrspace 1) + ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; VI: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p1) :: (load 4, addrspace 1) + ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; VI: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p1) :: (load 4, addrspace 1) + ; VI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; VI: [[PTR_ADD3:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p1) :: (load 4, addrspace 1) + ; VI: [[MV:%[0-9]+]]:_(s160) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32) + ; VI: S_NOP 0, implicit [[MV]](s160) ; GFX9-HSA-LABEL: name: test_load_global_s160_align4 ; GFX9-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 20, align 4, addrspace 1) - ; GFX9-HSA: [[TRUNC:%[0-9]+]]:_(s160) = G_TRUNC [[LOAD]](s256) - ; GFX9-HSA: S_NOP 0, implicit [[TRUNC]](s160) + ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; GFX9-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-HSA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9-HSA: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9-HSA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p1) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-HSA: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; GFX9-HSA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p1) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9-HSA: [[PTR_ADD3:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; GFX9-HSA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p1) :: (load 4, addrspace 1) + ; GFX9-HSA: [[MV:%[0-9]+]]:_(s160) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32) + ; GFX9-HSA: S_NOP 0, implicit [[MV]](s160) ; GFX9-MESA-LABEL: name: test_load_global_s160_align4 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 20, align 4, addrspace 1) - ; GFX9-MESA: [[TRUNC:%[0-9]+]]:_(s160) = G_TRUNC [[LOAD]](s256) - ; GFX9-MESA: S_NOP 0, implicit [[TRUNC]](s160) + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; GFX9-MESA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9-MESA: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9-MESA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p1) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-MESA: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; GFX9-MESA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p1) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9-MESA: [[PTR_ADD3:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; GFX9-MESA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p1) :: (load 4, addrspace 1) + ; GFX9-MESA: [[MV:%[0-9]+]]:_(s160) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32) + ; GFX9-MESA: S_NOP 0, implicit [[MV]](s160) %0:_(p1) = COPY $vgpr0_vgpr1 %1:_(s160) = G_LOAD %0 :: (load 20, align 4, addrspace 1) S_NOP 0, implicit %1 @@ -1949,45 +2021,153 @@ ; SI-LABEL: name: test_load_global_s224_align4 ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; SI: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 28, align 4, addrspace 1) - ; SI: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[LOAD]](s256) + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p1) :: (load 4, addrspace 1) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p1) :: (load 4, addrspace 1) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p1) :: (load 4, addrspace 1) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p1) :: (load 4, addrspace 1) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p1) :: (load 4, addrspace 1) + ; SI: [[MV:%[0-9]+]]:_(s224) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32) ; SI: [[DEF:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF - ; SI: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[TRUNC]](s224), 0 + ; SI: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[MV]](s224), 0 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](s256) ; CI-HSA-LABEL: name: test_load_global_s224_align4 ; CI-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-HSA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 28, align 4, addrspace 1) - ; CI-HSA: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[LOAD]](s256) + ; CI-HSA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) + ; CI-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; CI-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-HSA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, addrspace 1) + ; CI-HSA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI-HSA: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI-HSA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p1) :: (load 4, addrspace 1) + ; CI-HSA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-HSA: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; CI-HSA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p1) :: (load 4, addrspace 1) + ; CI-HSA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI-HSA: [[PTR_ADD3:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; CI-HSA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p1) :: (load 4, addrspace 1) + ; CI-HSA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; CI-HSA: [[PTR_ADD4:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; CI-HSA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p1) :: (load 4, addrspace 1) + ; CI-HSA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; CI-HSA: [[PTR_ADD5:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; CI-HSA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p1) :: (load 4, addrspace 1) + ; CI-HSA: [[MV:%[0-9]+]]:_(s224) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32) ; CI-HSA: [[DEF:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF - ; CI-HSA: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[TRUNC]](s224), 0 + ; CI-HSA: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[MV]](s224), 0 ; CI-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](s256) ; CI-MESA-LABEL: name: test_load_global_s224_align4 ; CI-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-MESA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 28, align 4, addrspace 1) - ; CI-MESA: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[LOAD]](s256) + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) + ; CI-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; CI-MESA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, addrspace 1) + ; CI-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI-MESA: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI-MESA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p1) :: (load 4, addrspace 1) + ; CI-MESA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-MESA: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; CI-MESA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p1) :: (load 4, addrspace 1) + ; CI-MESA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI-MESA: [[PTR_ADD3:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; CI-MESA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p1) :: (load 4, addrspace 1) + ; CI-MESA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; CI-MESA: [[PTR_ADD4:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; CI-MESA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p1) :: (load 4, addrspace 1) + ; CI-MESA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; CI-MESA: [[PTR_ADD5:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; CI-MESA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p1) :: (load 4, addrspace 1) + ; CI-MESA: [[MV:%[0-9]+]]:_(s224) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32) ; CI-MESA: [[DEF:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF - ; CI-MESA: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[TRUNC]](s224), 0 + ; CI-MESA: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[MV]](s224), 0 ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](s256) ; VI-LABEL: name: test_load_global_s224_align4 ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; VI: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 28, align 4, addrspace 1) - ; VI: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[LOAD]](s256) + ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) + ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; VI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, addrspace 1) + ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; VI: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p1) :: (load 4, addrspace 1) + ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; VI: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p1) :: (load 4, addrspace 1) + ; VI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; VI: [[PTR_ADD3:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p1) :: (load 4, addrspace 1) + ; VI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; VI: [[PTR_ADD4:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p1) :: (load 4, addrspace 1) + ; VI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; VI: [[PTR_ADD5:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p1) :: (load 4, addrspace 1) + ; VI: [[MV:%[0-9]+]]:_(s224) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32) ; VI: [[DEF:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF - ; VI: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[TRUNC]](s224), 0 + ; VI: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[MV]](s224), 0 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](s256) ; GFX9-HSA-LABEL: name: test_load_global_s224_align4 ; GFX9-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 28, align 4, addrspace 1) - ; GFX9-HSA: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[LOAD]](s256) + ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; GFX9-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-HSA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9-HSA: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9-HSA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p1) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-HSA: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; GFX9-HSA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p1) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9-HSA: [[PTR_ADD3:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; GFX9-HSA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p1) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; GFX9-HSA: [[PTR_ADD4:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; GFX9-HSA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p1) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; GFX9-HSA: [[PTR_ADD5:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; GFX9-HSA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p1) :: (load 4, addrspace 1) + ; GFX9-HSA: [[MV:%[0-9]+]]:_(s224) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32) ; GFX9-HSA: [[DEF:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF - ; GFX9-HSA: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[TRUNC]](s224), 0 + ; GFX9-HSA: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[MV]](s224), 0 ; GFX9-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](s256) ; GFX9-MESA-LABEL: name: test_load_global_s224_align4 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 28, align 4, addrspace 1) - ; GFX9-MESA: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[LOAD]](s256) + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; GFX9-MESA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9-MESA: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9-MESA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p1) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-MESA: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; GFX9-MESA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p1) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9-MESA: [[PTR_ADD3:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; GFX9-MESA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p1) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; GFX9-MESA: [[PTR_ADD4:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; GFX9-MESA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p1) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; GFX9-MESA: [[PTR_ADD5:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; GFX9-MESA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p1) :: (load 4, addrspace 1) + ; GFX9-MESA: [[MV:%[0-9]+]]:_(s224) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32) ; GFX9-MESA: [[DEF:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF - ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[TRUNC]](s224), 0 + ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(s256) = G_INSERT [[DEF]], [[MV]](s224), 0 ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](s256) %0:_(p1) = COPY $vgpr0_vgpr1 %1:_(s224) = G_LOAD %0 :: (load 28, align 4, addrspace 1) @@ -1997,6 +2177,160 @@ ... +--- +name: test_load_global_s288_align32 +body: | + bb.0: + liveins: $vgpr0_vgpr1 + + ; SI-LABEL: name: test_load_global_s288_align32 + ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 32, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, align 32, addrspace 1) + ; SI: [[DEF:%[0-9]+]]:_(s288) = G_IMPLICIT_DEF + ; SI: [[INSERT:%[0-9]+]]:_(s288) = G_INSERT [[DEF]], [[LOAD]](s256), 0 + ; SI: [[INSERT1:%[0-9]+]]:_(s288) = G_INSERT [[INSERT]], [[LOAD1]](s32), 256 + ; SI: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[INSERT1]](s288), 0 + ; SI: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[INSERT1]](s288), 256 + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; SI: $vgpr8 = COPY [[EXTRACT1]](s32) + ; CI-HSA-LABEL: name: test_load_global_s288_align32 + ; CI-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; CI-HSA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 32, addrspace 1) + ; CI-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; CI-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-HSA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, align 32, addrspace 1) + ; CI-HSA: [[DEF:%[0-9]+]]:_(s288) = G_IMPLICIT_DEF + ; CI-HSA: [[INSERT:%[0-9]+]]:_(s288) = G_INSERT [[DEF]], [[LOAD]](s256), 0 + ; CI-HSA: [[INSERT1:%[0-9]+]]:_(s288) = G_INSERT [[INSERT]], [[LOAD1]](s32), 256 + ; CI-HSA: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[INSERT1]](s288), 0 + ; CI-HSA: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[INSERT1]](s288), 256 + ; CI-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; CI-HSA: $vgpr8 = COPY [[EXTRACT1]](s32) + ; CI-MESA-LABEL: name: test_load_global_s288_align32 + ; CI-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 32, addrspace 1) + ; CI-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; CI-MESA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, align 32, addrspace 1) + ; CI-MESA: [[DEF:%[0-9]+]]:_(s288) = G_IMPLICIT_DEF + ; CI-MESA: [[INSERT:%[0-9]+]]:_(s288) = G_INSERT [[DEF]], [[LOAD]](s256), 0 + ; CI-MESA: [[INSERT1:%[0-9]+]]:_(s288) = G_INSERT [[INSERT]], [[LOAD1]](s32), 256 + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[INSERT1]](s288), 0 + ; CI-MESA: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[INSERT1]](s288), 256 + ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; CI-MESA: $vgpr8 = COPY [[EXTRACT1]](s32) + ; VI-LABEL: name: test_load_global_s288_align32 + ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; VI: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 32, addrspace 1) + ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; VI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, align 32, addrspace 1) + ; VI: [[DEF:%[0-9]+]]:_(s288) = G_IMPLICIT_DEF + ; VI: [[INSERT:%[0-9]+]]:_(s288) = G_INSERT [[DEF]], [[LOAD]](s256), 0 + ; VI: [[INSERT1:%[0-9]+]]:_(s288) = G_INSERT [[INSERT]], [[LOAD1]](s32), 256 + ; VI: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[INSERT1]](s288), 0 + ; VI: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[INSERT1]](s288), 256 + ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; VI: $vgpr8 = COPY [[EXTRACT1]](s32) + ; GFX9-HSA-LABEL: name: test_load_global_s288_align32 + ; GFX9-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 32, addrspace 1) + ; GFX9-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; GFX9-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-HSA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, align 32, addrspace 1) + ; GFX9-HSA: [[DEF:%[0-9]+]]:_(s288) = G_IMPLICIT_DEF + ; GFX9-HSA: [[INSERT:%[0-9]+]]:_(s288) = G_INSERT [[DEF]], [[LOAD]](s256), 0 + ; GFX9-HSA: [[INSERT1:%[0-9]+]]:_(s288) = G_INSERT [[INSERT]], [[LOAD1]](s32), 256 + ; GFX9-HSA: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[INSERT1]](s288), 0 + ; GFX9-HSA: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[INSERT1]](s288), 256 + ; GFX9-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; GFX9-HSA: $vgpr8 = COPY [[EXTRACT1]](s32) + ; GFX9-MESA-LABEL: name: test_load_global_s288_align32 + ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p1) :: (load 32, addrspace 1) + ; GFX9-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; GFX9-MESA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, align 32, addrspace 1) + ; GFX9-MESA: [[DEF:%[0-9]+]]:_(s288) = G_IMPLICIT_DEF + ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(s288) = G_INSERT [[DEF]], [[LOAD]](s256), 0 + ; GFX9-MESA: [[INSERT1:%[0-9]+]]:_(s288) = G_INSERT [[INSERT]], [[LOAD1]](s32), 256 + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[INSERT1]](s288), 0 + ; GFX9-MESA: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[INSERT1]](s288), 256 + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; GFX9-MESA: $vgpr8 = COPY [[EXTRACT1]](s32) + %0:_(p1) = COPY $vgpr0_vgpr1 + %1:_(s288) = G_LOAD %0 :: (load 36, align 32, addrspace 1) + %2:_(s256) = G_EXTRACT %1, 0 + %3:_(s32) = G_EXTRACT %1, 256 + $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %2 + $vgpr8 = COPY %3 +... + +--- +name: test_load_global_s288_align64 +body: | + bb.0: + liveins: $vgpr0_vgpr1 + + ; SI-LABEL: name: test_load_global_s288_align64 + ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s512) = G_LOAD [[COPY]](p1) :: (load 36, align 64, addrspace 1) + ; SI: [[TRUNC:%[0-9]+]]:_(s288) = G_TRUNC [[LOAD]](s512) + ; SI: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[TRUNC]](s288), 0 + ; SI: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[TRUNC]](s288), 256 + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; SI: $vgpr8 = COPY [[EXTRACT1]](s32) + ; CI-HSA-LABEL: name: test_load_global_s288_align64 + ; CI-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; CI-HSA: [[LOAD:%[0-9]+]]:_(s512) = G_LOAD [[COPY]](p1) :: (load 36, align 64, addrspace 1) + ; CI-HSA: [[TRUNC:%[0-9]+]]:_(s288) = G_TRUNC [[LOAD]](s512) + ; CI-HSA: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[TRUNC]](s288), 0 + ; CI-HSA: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[TRUNC]](s288), 256 + ; CI-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; CI-HSA: $vgpr8 = COPY [[EXTRACT1]](s32) + ; CI-MESA-LABEL: name: test_load_global_s288_align64 + ; CI-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s512) = G_LOAD [[COPY]](p1) :: (load 36, align 64, addrspace 1) + ; CI-MESA: [[TRUNC:%[0-9]+]]:_(s288) = G_TRUNC [[LOAD]](s512) + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[TRUNC]](s288), 0 + ; CI-MESA: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[TRUNC]](s288), 256 + ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; CI-MESA: $vgpr8 = COPY [[EXTRACT1]](s32) + ; VI-LABEL: name: test_load_global_s288_align64 + ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; VI: [[LOAD:%[0-9]+]]:_(s512) = G_LOAD [[COPY]](p1) :: (load 36, align 64, addrspace 1) + ; VI: [[TRUNC:%[0-9]+]]:_(s288) = G_TRUNC [[LOAD]](s512) + ; VI: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[TRUNC]](s288), 0 + ; VI: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[TRUNC]](s288), 256 + ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; VI: $vgpr8 = COPY [[EXTRACT1]](s32) + ; GFX9-HSA-LABEL: name: test_load_global_s288_align64 + ; GFX9-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(s512) = G_LOAD [[COPY]](p1) :: (load 36, align 64, addrspace 1) + ; GFX9-HSA: [[TRUNC:%[0-9]+]]:_(s288) = G_TRUNC [[LOAD]](s512) + ; GFX9-HSA: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[TRUNC]](s288), 0 + ; GFX9-HSA: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[TRUNC]](s288), 256 + ; GFX9-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; GFX9-HSA: $vgpr8 = COPY [[EXTRACT1]](s32) + ; GFX9-MESA-LABEL: name: test_load_global_s288_align64 + ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s512) = G_LOAD [[COPY]](p1) :: (load 36, align 64, addrspace 1) + ; GFX9-MESA: [[TRUNC:%[0-9]+]]:_(s288) = G_TRUNC [[LOAD]](s512) + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(s256) = G_EXTRACT [[TRUNC]](s288), 0 + ; GFX9-MESA: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[TRUNC]](s288), 256 + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](s256) + ; GFX9-MESA: $vgpr8 = COPY [[EXTRACT1]](s32) + %0:_(p1) = COPY $vgpr0_vgpr1 + %1:_(s288) = G_LOAD %0 :: (load 36, align 64, addrspace 1) + %2:_(s256) = G_EXTRACT %1, 0 + %3:_(s32) = G_EXTRACT %1, 256 + $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %2 + $vgpr8 = COPY %3 +... + --- name: test_load_global_s128_align16 body: | @@ -4826,39 +5160,45 @@ ; SI-LABEL: name: test_load_global_v3s16_align8 ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; SI: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p1) :: (load 6, align 8, addrspace 1) + ; SI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p1) :: (load 6, align 8, addrspace 1) + ; SI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; SI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; SI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; CI-HSA-LABEL: name: test_load_global_v3s16_align8 ; CI-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-HSA: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p1) :: (load 6, align 8, addrspace 1) + ; CI-HSA: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p1) :: (load 6, align 8, addrspace 1) + ; CI-HSA: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; CI-HSA: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; CI-HSA: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; CI-HSA: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; CI-HSA: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; CI-MESA-LABEL: name: test_load_global_v3s16_align8 ; CI-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-MESA: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p1) :: (load 6, align 8, addrspace 1) + ; CI-MESA: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p1) :: (load 6, align 8, addrspace 1) + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; CI-MESA: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; CI-MESA: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; CI-MESA: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; CI-MESA: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; VI-LABEL: name: test_load_global_v3s16_align8 ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; VI: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p1) :: (load 6, align 8, addrspace 1) + ; VI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p1) :: (load 6, align 8, addrspace 1) + ; VI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; VI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; VI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; GFX9-HSA-LABEL: name: test_load_global_v3s16_align8 ; GFX9-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p1) :: (load 6, align 8, addrspace 1) + ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p1) :: (load 6, align 8, addrspace 1) + ; GFX9-HSA: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; GFX9-HSA: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; GFX9-HSA: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; GFX9-HSA: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; GFX9-HSA: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; GFX9-MESA-LABEL: name: test_load_global_v3s16_align8 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p1) :: (load 6, align 8, addrspace 1) + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p1) :: (load 6, align 8, addrspace 1) + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; GFX9-MESA: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; GFX9-MESA: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) %0:_(p1) = COPY $vgpr0_vgpr1 %1:_(<3 x s16>) = G_LOAD %0 :: (load 6, align 8, addrspace 1) @@ -5817,8 +6157,9 @@ ; SI-LABEL: name: test_load_global_v3s32_align16 ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; SI: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p1) :: (load 12, align 16, addrspace 1) - ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>) + ; SI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p1) :: (load 12, align 16, addrspace 1) + ; SI: [[EXTRACT:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[LOAD]](<4 x s32>), 0 + ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](<3 x s32>) ; CI-HSA-LABEL: name: test_load_global_v3s32_align16 ; CI-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; CI-HSA: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p1) :: (load 12, align 16, addrspace 1) @@ -5854,8 +6195,15 @@ ; SI-LABEL: name: test_load_global_v3s32_align4 ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; SI: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p1) :: (load 12, align 4, addrspace 1) - ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>) + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load 4, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p1) :: (load 4, addrspace 1) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) + ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) ; CI-HSA-LABEL: name: test_load_global_v3s32_align4 ; CI-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; CI-HSA: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p1) :: (load 12, align 4, addrspace 1) @@ -6021,6 +6369,679 @@ $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1 ... +--- +name: test_load_global_v9s32_align32 +body: | + bb.0: + liveins: $vgpr0_vgpr1 + + ; SI-LABEL: name: test_load_global_v9s32_align32 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 1) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 1) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 1) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 1) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 1) + ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 1) + ; SI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; SI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 1) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<9 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32) + ; SI: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<9 x s32>), 0 + ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; SI: $vgpr8 = COPY [[COPY1]](s32) + ; CI-HSA-LABEL: name: test_load_global_v9s32_align32 + ; CI-HSA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI-HSA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 1) + ; CI-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; CI-HSA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-HSA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 1) + ; CI-HSA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI-HSA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI-HSA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 1) + ; CI-HSA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-HSA: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; CI-HSA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 1) + ; CI-HSA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI-HSA: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; CI-HSA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 1) + ; CI-HSA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; CI-HSA: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; CI-HSA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 1) + ; CI-HSA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; CI-HSA: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; CI-HSA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 1) + ; CI-HSA: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; CI-HSA: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; CI-HSA: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 1) + ; CI-HSA: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; CI-HSA: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; CI-HSA: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 1) + ; CI-HSA: [[BUILD_VECTOR:%[0-9]+]]:_(<9 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32) + ; CI-HSA: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<9 x s32>), 0 + ; CI-HSA: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) + ; CI-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; CI-HSA: $vgpr8 = COPY [[COPY1]](s32) + ; CI-MESA-LABEL: name: test_load_global_v9s32_align32 + ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 1) + ; CI-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; CI-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 1) + ; CI-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI-MESA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI-MESA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 1) + ; CI-MESA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-MESA: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; CI-MESA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 1) + ; CI-MESA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI-MESA: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; CI-MESA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 1) + ; CI-MESA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; CI-MESA: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; CI-MESA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 1) + ; CI-MESA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; CI-MESA: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; CI-MESA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 1) + ; CI-MESA: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; CI-MESA: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; CI-MESA: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 1) + ; CI-MESA: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; CI-MESA: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; CI-MESA: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 1) + ; CI-MESA: [[BUILD_VECTOR:%[0-9]+]]:_(<9 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32) + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<9 x s32>), 0 + ; CI-MESA: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) + ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; CI-MESA: $vgpr8 = COPY [[COPY1]](s32) + ; VI-LABEL: name: test_load_global_v9s32_align32 + ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 1) + ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; VI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 1) + ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; VI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 1) + ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; VI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 1) + ; VI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; VI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 1) + ; VI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; VI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 1) + ; VI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; VI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 1) + ; VI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; VI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 1) + ; VI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; VI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 1) + ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<9 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32) + ; VI: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<9 x s32>), 0 + ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) + ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; VI: $vgpr8 = COPY [[COPY1]](s32) + ; GFX9-HSA-LABEL: name: test_load_global_v9s32_align32 + ; GFX9-HSA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 1) + ; GFX9-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; GFX9-HSA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-HSA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9-HSA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9-HSA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 1) + ; GFX9-HSA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-HSA: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; GFX9-HSA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9-HSA: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; GFX9-HSA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 1) + ; GFX9-HSA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; GFX9-HSA: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; GFX9-HSA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; GFX9-HSA: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; GFX9-HSA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 1) + ; GFX9-HSA: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; GFX9-HSA: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; GFX9-HSA: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; GFX9-HSA: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; GFX9-HSA: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 1) + ; GFX9-HSA: [[BUILD_VECTOR:%[0-9]+]]:_(<9 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32) + ; GFX9-HSA: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<9 x s32>), 0 + ; GFX9-HSA: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) + ; GFX9-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; GFX9-HSA: $vgpr8 = COPY [[COPY1]](s32) + ; GFX9-MESA-LABEL: name: test_load_global_v9s32_align32 + ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 1) + ; GFX9-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; GFX9-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9-MESA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9-MESA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 1) + ; GFX9-MESA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-MESA: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; GFX9-MESA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9-MESA: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; GFX9-MESA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 1) + ; GFX9-MESA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; GFX9-MESA: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; GFX9-MESA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; GFX9-MESA: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; GFX9-MESA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 1) + ; GFX9-MESA: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; GFX9-MESA: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; GFX9-MESA: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; GFX9-MESA: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; GFX9-MESA: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 1) + ; GFX9-MESA: [[BUILD_VECTOR:%[0-9]+]]:_(<9 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32) + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<9 x s32>), 0 + ; GFX9-MESA: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; GFX9-MESA: $vgpr8 = COPY [[COPY1]](s32) + %0:_(p4) = COPY $vgpr0_vgpr1 + %1:_(<9 x s32>) = G_LOAD %0 :: (load 36, align 32, addrspace 1) + %2:_(<8 x s32>) = G_EXTRACT %1, 0 + %3:_(s32) = G_EXTRACT %1, 256 + $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %2 + $vgpr8 = COPY %3 +... + +--- +name: test_load_global_v9s32_align64 +body: | + bb.0: + liveins: $vgpr0_vgpr1 + + ; SI-LABEL: name: test_load_global_v9s32_align64 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 1) + ; SI: [[EXTRACT:%[0-9]+]]:_(<9 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; SI: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<9 x s32>), 0 + ; SI: [[EXTRACT2:%[0-9]+]]:_(s32) = G_EXTRACT [[EXTRACT]](<9 x s32>), 256 + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; SI: $vgpr8 = COPY [[EXTRACT2]](s32) + ; CI-HSA-LABEL: name: test_load_global_v9s32_align64 + ; CI-HSA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI-HSA: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 1) + ; CI-HSA: [[EXTRACT:%[0-9]+]]:_(<9 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; CI-HSA: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<9 x s32>), 0 + ; CI-HSA: [[EXTRACT2:%[0-9]+]]:_(s32) = G_EXTRACT [[EXTRACT]](<9 x s32>), 256 + ; CI-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; CI-HSA: $vgpr8 = COPY [[EXTRACT2]](s32) + ; CI-MESA-LABEL: name: test_load_global_v9s32_align64 + ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI-MESA: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 1) + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(<9 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; CI-MESA: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<9 x s32>), 0 + ; CI-MESA: [[EXTRACT2:%[0-9]+]]:_(s32) = G_EXTRACT [[EXTRACT]](<9 x s32>), 256 + ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; CI-MESA: $vgpr8 = COPY [[EXTRACT2]](s32) + ; VI-LABEL: name: test_load_global_v9s32_align64 + ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; VI: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 1) + ; VI: [[EXTRACT:%[0-9]+]]:_(<9 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; VI: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<9 x s32>), 0 + ; VI: [[EXTRACT2:%[0-9]+]]:_(s32) = G_EXTRACT [[EXTRACT]](<9 x s32>), 256 + ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; VI: $vgpr8 = COPY [[EXTRACT2]](s32) + ; GFX9-HSA-LABEL: name: test_load_global_v9s32_align64 + ; GFX9-HSA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 1) + ; GFX9-HSA: [[EXTRACT:%[0-9]+]]:_(<9 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; GFX9-HSA: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<9 x s32>), 0 + ; GFX9-HSA: [[EXTRACT2:%[0-9]+]]:_(s32) = G_EXTRACT [[EXTRACT]](<9 x s32>), 256 + ; GFX9-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; GFX9-HSA: $vgpr8 = COPY [[EXTRACT2]](s32) + ; GFX9-MESA-LABEL: name: test_load_global_v9s32_align64 + ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 36, align 64, addrspace 1) + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(<9 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; GFX9-MESA: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<9 x s32>), 0 + ; GFX9-MESA: [[EXTRACT2:%[0-9]+]]:_(s32) = G_EXTRACT [[EXTRACT]](<9 x s32>), 256 + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; GFX9-MESA: $vgpr8 = COPY [[EXTRACT2]](s32) + %0:_(p4) = COPY $vgpr0_vgpr1 + %1:_(<9 x s32>) = G_LOAD %0 :: (load 36, align 64, addrspace 1) + %2:_(<8 x s32>) = G_EXTRACT %1, 0 + %3:_(s32) = G_EXTRACT %1, 256 + $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %2 + $vgpr8 = COPY %3 +... + +--- +name: test_load_global_v15s32_align64 +body: | + bb.0: + liveins: $vgpr0_vgpr1 + + ; SI-LABEL: name: test_load_global_v15s32_align64 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 60, align 64, addrspace 1) + ; SI: [[EXTRACT:%[0-9]+]]:_(<15 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; SI: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 0 + ; SI: [[EXTRACT2:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 256 + ; SI: [[EXTRACT3:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 384 + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; SI: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT2]](<4 x s32>) + ; SI: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT3]](<3 x s32>) + ; CI-HSA-LABEL: name: test_load_global_v15s32_align64 + ; CI-HSA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI-HSA: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 60, align 64, addrspace 1) + ; CI-HSA: [[EXTRACT:%[0-9]+]]:_(<15 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; CI-HSA: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 0 + ; CI-HSA: [[EXTRACT2:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 256 + ; CI-HSA: [[EXTRACT3:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 384 + ; CI-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; CI-HSA: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT2]](<4 x s32>) + ; CI-HSA: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT3]](<3 x s32>) + ; CI-MESA-LABEL: name: test_load_global_v15s32_align64 + ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI-MESA: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 60, align 64, addrspace 1) + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(<15 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; CI-MESA: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 0 + ; CI-MESA: [[EXTRACT2:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 256 + ; CI-MESA: [[EXTRACT3:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 384 + ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; CI-MESA: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT2]](<4 x s32>) + ; CI-MESA: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT3]](<3 x s32>) + ; VI-LABEL: name: test_load_global_v15s32_align64 + ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; VI: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 60, align 64, addrspace 1) + ; VI: [[EXTRACT:%[0-9]+]]:_(<15 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; VI: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 0 + ; VI: [[EXTRACT2:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 256 + ; VI: [[EXTRACT3:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 384 + ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; VI: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT2]](<4 x s32>) + ; VI: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT3]](<3 x s32>) + ; GFX9-HSA-LABEL: name: test_load_global_v15s32_align64 + ; GFX9-HSA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 60, align 64, addrspace 1) + ; GFX9-HSA: [[EXTRACT:%[0-9]+]]:_(<15 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; GFX9-HSA: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 0 + ; GFX9-HSA: [[EXTRACT2:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 256 + ; GFX9-HSA: [[EXTRACT3:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 384 + ; GFX9-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; GFX9-HSA: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT2]](<4 x s32>) + ; GFX9-HSA: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT3]](<3 x s32>) + ; GFX9-MESA-LABEL: name: test_load_global_v15s32_align64 + ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p4) :: (load 60, align 64, addrspace 1) + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(<15 x s32>) = G_EXTRACT [[LOAD]](<16 x s32>), 0 + ; GFX9-MESA: [[EXTRACT1:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 0 + ; GFX9-MESA: [[EXTRACT2:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 256 + ; GFX9-MESA: [[EXTRACT3:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[EXTRACT]](<15 x s32>), 384 + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT1]](<8 x s32>) + ; GFX9-MESA: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT2]](<4 x s32>) + ; GFX9-MESA: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT3]](<3 x s32>) + %0:_(p4) = COPY $vgpr0_vgpr1 + %1:_(<15 x s32>) = G_LOAD %0 :: (load 60, align 64, addrspace 1) + %2:_(<8 x s32>) = G_EXTRACT %1, 0 + %3:_(<4 x s32>) = G_EXTRACT %1, 256 + %4:_(<3 x s32>) = G_EXTRACT %1, 384 + $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %2 + $vgpr8_vgpr9_vgpr10_vgpr11 = COPY %3 + $vgpr12_vgpr13_vgpr14 = COPY %4 +... + + +--- +name: test_load_global_v15s32_align32 +body: | + bb.0: + liveins: $vgpr0_vgpr1 + + ; SI-LABEL: name: test_load_global_v15s32_align32 + ; SI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 1) + ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 1) + ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; SI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 1) + ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; SI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 1) + ; SI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; SI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 1) + ; SI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; SI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 1) + ; SI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; SI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 1) + ; SI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 36 + ; SI: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C8]](s64) + ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 4, addrspace 1) + ; SI: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 40 + ; SI: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C9]](s64) + ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 4, align 8, addrspace 1) + ; SI: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 44 + ; SI: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C10]](s64) + ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 4, addrspace 1) + ; SI: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 48 + ; SI: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 4, align 16, addrspace 1) + ; SI: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 52 + ; SI: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C12]](s64) + ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 4, addrspace 1) + ; SI: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 56 + ; SI: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C13]](s64) + ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 4, align 8, addrspace 1) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<15 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32), [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32) + ; SI: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 0 + ; SI: [[EXTRACT1:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 256 + ; SI: [[EXTRACT2:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 384 + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; SI: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT1]](<4 x s32>) + ; SI: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT2]](<3 x s32>) + ; CI-HSA-LABEL: name: test_load_global_v15s32_align32 + ; CI-HSA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI-HSA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 1) + ; CI-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; CI-HSA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-HSA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 1) + ; CI-HSA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI-HSA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI-HSA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 1) + ; CI-HSA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-HSA: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; CI-HSA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 1) + ; CI-HSA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI-HSA: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; CI-HSA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 1) + ; CI-HSA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; CI-HSA: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; CI-HSA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 1) + ; CI-HSA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; CI-HSA: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; CI-HSA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 1) + ; CI-HSA: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; CI-HSA: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; CI-HSA: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 1) + ; CI-HSA: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; CI-HSA: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; CI-HSA: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 1) + ; CI-HSA: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 36 + ; CI-HSA: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C8]](s64) + ; CI-HSA: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 4, addrspace 1) + ; CI-HSA: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 40 + ; CI-HSA: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C9]](s64) + ; CI-HSA: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 4, align 8, addrspace 1) + ; CI-HSA: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 44 + ; CI-HSA: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C10]](s64) + ; CI-HSA: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 4, addrspace 1) + ; CI-HSA: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 48 + ; CI-HSA: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; CI-HSA: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 4, align 16, addrspace 1) + ; CI-HSA: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 52 + ; CI-HSA: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C12]](s64) + ; CI-HSA: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 4, addrspace 1) + ; CI-HSA: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 56 + ; CI-HSA: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C13]](s64) + ; CI-HSA: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 4, align 8, addrspace 1) + ; CI-HSA: [[BUILD_VECTOR:%[0-9]+]]:_(<15 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32), [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32) + ; CI-HSA: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 0 + ; CI-HSA: [[EXTRACT1:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 256 + ; CI-HSA: [[EXTRACT2:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 384 + ; CI-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; CI-HSA: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT1]](<4 x s32>) + ; CI-HSA: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT2]](<3 x s32>) + ; CI-MESA-LABEL: name: test_load_global_v15s32_align32 + ; CI-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 1) + ; CI-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; CI-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 1) + ; CI-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI-MESA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI-MESA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 1) + ; CI-MESA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-MESA: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; CI-MESA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 1) + ; CI-MESA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI-MESA: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; CI-MESA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 1) + ; CI-MESA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; CI-MESA: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; CI-MESA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 1) + ; CI-MESA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; CI-MESA: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; CI-MESA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 1) + ; CI-MESA: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; CI-MESA: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; CI-MESA: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 1) + ; CI-MESA: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; CI-MESA: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; CI-MESA: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 1) + ; CI-MESA: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 36 + ; CI-MESA: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C8]](s64) + ; CI-MESA: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 4, addrspace 1) + ; CI-MESA: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 40 + ; CI-MESA: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C9]](s64) + ; CI-MESA: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 4, align 8, addrspace 1) + ; CI-MESA: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 44 + ; CI-MESA: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C10]](s64) + ; CI-MESA: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 4, addrspace 1) + ; CI-MESA: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 48 + ; CI-MESA: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; CI-MESA: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 4, align 16, addrspace 1) + ; CI-MESA: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 52 + ; CI-MESA: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C12]](s64) + ; CI-MESA: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 4, addrspace 1) + ; CI-MESA: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 56 + ; CI-MESA: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C13]](s64) + ; CI-MESA: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 4, align 8, addrspace 1) + ; CI-MESA: [[BUILD_VECTOR:%[0-9]+]]:_(<15 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32), [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32) + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 0 + ; CI-MESA: [[EXTRACT1:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 256 + ; CI-MESA: [[EXTRACT2:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 384 + ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; CI-MESA: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT1]](<4 x s32>) + ; CI-MESA: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT2]](<3 x s32>) + ; VI-LABEL: name: test_load_global_v15s32_align32 + ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 1) + ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; VI: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 1) + ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; VI: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 1) + ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; VI: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 1) + ; VI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; VI: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 1) + ; VI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; VI: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 1) + ; VI: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; VI: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 1) + ; VI: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; VI: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 1) + ; VI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; VI: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 1) + ; VI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 36 + ; VI: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C8]](s64) + ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 4, addrspace 1) + ; VI: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 40 + ; VI: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C9]](s64) + ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 4, align 8, addrspace 1) + ; VI: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 44 + ; VI: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C10]](s64) + ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 4, addrspace 1) + ; VI: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 48 + ; VI: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; VI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 4, align 16, addrspace 1) + ; VI: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 52 + ; VI: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C12]](s64) + ; VI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 4, addrspace 1) + ; VI: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 56 + ; VI: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C13]](s64) + ; VI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 4, align 8, addrspace 1) + ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<15 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32), [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32) + ; VI: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 0 + ; VI: [[EXTRACT1:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 256 + ; VI: [[EXTRACT2:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 384 + ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; VI: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT1]](<4 x s32>) + ; VI: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT2]](<3 x s32>) + ; GFX9-HSA-LABEL: name: test_load_global_v15s32_align32 + ; GFX9-HSA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 1) + ; GFX9-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; GFX9-HSA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-HSA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9-HSA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9-HSA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 1) + ; GFX9-HSA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-HSA: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; GFX9-HSA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9-HSA: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; GFX9-HSA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 1) + ; GFX9-HSA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; GFX9-HSA: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; GFX9-HSA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; GFX9-HSA: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; GFX9-HSA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 1) + ; GFX9-HSA: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; GFX9-HSA: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; GFX9-HSA: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; GFX9-HSA: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; GFX9-HSA: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 1) + ; GFX9-HSA: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 36 + ; GFX9-HSA: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C8]](s64) + ; GFX9-HSA: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 40 + ; GFX9-HSA: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C9]](s64) + ; GFX9-HSA: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 4, align 8, addrspace 1) + ; GFX9-HSA: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 44 + ; GFX9-HSA: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C10]](s64) + ; GFX9-HSA: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 48 + ; GFX9-HSA: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; GFX9-HSA: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 4, align 16, addrspace 1) + ; GFX9-HSA: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 52 + ; GFX9-HSA: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C12]](s64) + ; GFX9-HSA: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 4, addrspace 1) + ; GFX9-HSA: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 56 + ; GFX9-HSA: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C13]](s64) + ; GFX9-HSA: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 4, align 8, addrspace 1) + ; GFX9-HSA: [[BUILD_VECTOR:%[0-9]+]]:_(<15 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32), [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32) + ; GFX9-HSA: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 0 + ; GFX9-HSA: [[EXTRACT1:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 256 + ; GFX9-HSA: [[EXTRACT2:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 384 + ; GFX9-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; GFX9-HSA: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT1]](<4 x s32>) + ; GFX9-HSA: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT2]](<3 x s32>) + ; GFX9-MESA-LABEL: name: test_load_global_v15s32_align32 + ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1 + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p4) :: (load 4, align 32, addrspace 1) + ; GFX9-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; GFX9-MESA: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-MESA: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p4) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9-MESA: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9-MESA: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p4) :: (load 4, align 8, addrspace 1) + ; GFX9-MESA: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-MESA: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C2]](s64) + ; GFX9-MESA: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9-MESA: [[PTR_ADD3:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C3]](s64) + ; GFX9-MESA: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p4) :: (load 4, align 16, addrspace 1) + ; GFX9-MESA: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 20 + ; GFX9-MESA: [[PTR_ADD4:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C4]](s64) + ; GFX9-MESA: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p4) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 24 + ; GFX9-MESA: [[PTR_ADD5:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C5]](s64) + ; GFX9-MESA: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p4) :: (load 4, align 8, addrspace 1) + ; GFX9-MESA: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 28 + ; GFX9-MESA: [[PTR_ADD6:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C6]](s64) + ; GFX9-MESA: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p4) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 + ; GFX9-MESA: [[PTR_ADD7:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C7]](s64) + ; GFX9-MESA: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p4) :: (load 4, align 32, addrspace 1) + ; GFX9-MESA: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 36 + ; GFX9-MESA: [[PTR_ADD8:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C8]](s64) + ; GFX9-MESA: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p4) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 40 + ; GFX9-MESA: [[PTR_ADD9:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C9]](s64) + ; GFX9-MESA: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p4) :: (load 4, align 8, addrspace 1) + ; GFX9-MESA: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 44 + ; GFX9-MESA: [[PTR_ADD10:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C10]](s64) + ; GFX9-MESA: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p4) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 48 + ; GFX9-MESA: [[PTR_ADD11:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C11]](s64) + ; GFX9-MESA: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p4) :: (load 4, align 16, addrspace 1) + ; GFX9-MESA: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 52 + ; GFX9-MESA: [[PTR_ADD12:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C12]](s64) + ; GFX9-MESA: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p4) :: (load 4, addrspace 1) + ; GFX9-MESA: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 56 + ; GFX9-MESA: [[PTR_ADD13:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C13]](s64) + ; GFX9-MESA: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p4) :: (load 4, align 8, addrspace 1) + ; GFX9-MESA: [[BUILD_VECTOR:%[0-9]+]]:_(<15 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32), [[LOAD6]](s32), [[LOAD7]](s32), [[LOAD8]](s32), [[LOAD9]](s32), [[LOAD10]](s32), [[LOAD11]](s32), [[LOAD12]](s32), [[LOAD13]](s32), [[LOAD14]](s32) + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(<8 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 0 + ; GFX9-MESA: [[EXTRACT1:%[0-9]+]]:_(<4 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 256 + ; GFX9-MESA: [[EXTRACT2:%[0-9]+]]:_(<3 x s32>) = G_EXTRACT [[BUILD_VECTOR]](<15 x s32>), 384 + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[EXTRACT]](<8 x s32>) + ; GFX9-MESA: $vgpr8_vgpr9_vgpr10_vgpr11 = COPY [[EXTRACT1]](<4 x s32>) + ; GFX9-MESA: $vgpr12_vgpr13_vgpr14 = COPY [[EXTRACT2]](<3 x s32>) + %0:_(p4) = COPY $vgpr0_vgpr1 + %1:_(<15 x s32>) = G_LOAD %0 :: (load 60, align 32, addrspace 1) + %2:_(<8 x s32>) = G_EXTRACT %1, 0 + %3:_(<4 x s32>) = G_EXTRACT %1, 256 + %4:_(<3 x s32>) = G_EXTRACT %1, 384 + $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %2 + $vgpr8_vgpr9_vgpr10_vgpr11 = COPY %3 + $vgpr12_vgpr13_vgpr14 = COPY %4 +... + --- name: test_load_global_v16s32_align32 body: | @@ -6941,39 +7962,45 @@ ; SI-LABEL: name: test_load_global_v3s64_align32 ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; SI: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 32, addrspace 1) + ; SI: [[LOAD:%[0-9]+]]:_(<4 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 32, addrspace 1) + ; SI: [[EXTRACT:%[0-9]+]]:_(<3 x s64>) = G_EXTRACT [[LOAD]](<4 x s64>), 0 ; SI: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; SI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; SI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s64>), 0 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; CI-HSA-LABEL: name: test_load_global_v3s64_align32 ; CI-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-HSA: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 32, addrspace 1) + ; CI-HSA: [[LOAD:%[0-9]+]]:_(<4 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 32, addrspace 1) + ; CI-HSA: [[EXTRACT:%[0-9]+]]:_(<3 x s64>) = G_EXTRACT [[LOAD]](<4 x s64>), 0 ; CI-HSA: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; CI-HSA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; CI-HSA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s64>), 0 ; CI-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; CI-MESA-LABEL: name: test_load_global_v3s64_align32 ; CI-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-MESA: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 32, addrspace 1) + ; CI-MESA: [[LOAD:%[0-9]+]]:_(<4 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 32, addrspace 1) + ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(<3 x s64>) = G_EXTRACT [[LOAD]](<4 x s64>), 0 ; CI-MESA: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; CI-MESA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; CI-MESA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s64>), 0 ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; VI-LABEL: name: test_load_global_v3s64_align32 ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; VI: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 32, addrspace 1) + ; VI: [[LOAD:%[0-9]+]]:_(<4 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 32, addrspace 1) + ; VI: [[EXTRACT:%[0-9]+]]:_(<3 x s64>) = G_EXTRACT [[LOAD]](<4 x s64>), 0 ; VI: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; VI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; VI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s64>), 0 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; GFX9-HSA-LABEL: name: test_load_global_v3s64_align32 ; GFX9-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 32, addrspace 1) + ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(<4 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 32, addrspace 1) + ; GFX9-HSA: [[EXTRACT:%[0-9]+]]:_(<3 x s64>) = G_EXTRACT [[LOAD]](<4 x s64>), 0 ; GFX9-HSA: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; GFX9-HSA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; GFX9-HSA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s64>), 0 ; GFX9-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; GFX9-MESA-LABEL: name: test_load_global_v3s64_align32 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 32, addrspace 1) + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<4 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 32, addrspace 1) + ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(<3 x s64>) = G_EXTRACT [[LOAD]](<4 x s64>), 0 ; GFX9-MESA: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s64>), 0 ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) %0:_(p1) = COPY $vgpr0_vgpr1 %1:_(<3 x s64>) = G_LOAD %0 :: (load 24, align 32, addrspace 1) @@ -6990,39 +8017,81 @@ ; SI-LABEL: name: test_load_global_v3s64_align8 ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; SI: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 8, addrspace 1) + ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p1) :: (load 8, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p1) :: (load 8, addrspace 1) + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64) ; SI: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; SI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; SI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; CI-HSA-LABEL: name: test_load_global_v3s64_align8 ; CI-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-HSA: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 8, addrspace 1) + ; CI-HSA: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1) + ; CI-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-HSA: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p1) :: (load 8, addrspace 1) + ; CI-HSA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI-HSA: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI-HSA: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p1) :: (load 8, addrspace 1) + ; CI-HSA: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64) ; CI-HSA: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; CI-HSA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; CI-HSA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 ; CI-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; CI-MESA-LABEL: name: test_load_global_v3s64_align8 ; CI-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-MESA: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 8, addrspace 1) + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1) + ; CI-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI-MESA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-MESA: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p1) :: (load 8, addrspace 1) + ; CI-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI-MESA: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI-MESA: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p1) :: (load 8, addrspace 1) + ; CI-MESA: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64) ; CI-MESA: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; CI-MESA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; CI-MESA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 ; CI-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; VI-LABEL: name: test_load_global_v3s64_align8 ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; VI: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 8, addrspace 1) + ; VI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1) + ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; VI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; VI: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p1) :: (load 8, addrspace 1) + ; VI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; VI: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; VI: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p1) :: (load 8, addrspace 1) + ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64) ; VI: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; VI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; VI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; GFX9-HSA-LABEL: name: test_load_global_v3s64_align8 ; GFX9-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 8, addrspace 1) + ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1) + ; GFX9-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-HSA: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p1) :: (load 8, addrspace 1) + ; GFX9-HSA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9-HSA: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9-HSA: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p1) :: (load 8, addrspace 1) + ; GFX9-HSA: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64) ; GFX9-HSA: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; GFX9-HSA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; GFX9-HSA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 ; GFX9-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; GFX9-MESA-LABEL: name: test_load_global_v3s64_align8 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 8, addrspace 1) + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1) + ; GFX9-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9-MESA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-MESA: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p1) :: (load 8, addrspace 1) + ; GFX9-MESA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9-MESA: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9-MESA: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p1) :: (load 8, addrspace 1) + ; GFX9-MESA: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64) ; GFX9-MESA: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; GFX9-MESA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 ; GFX9-MESA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) %0:_(p1) = COPY $vgpr0_vgpr1 %1:_(<3 x s64>) = G_LOAD %0 :: (load 24, align 8, addrspace 1) @@ -7227,9 +8296,16 @@ ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; CI-HSA-LABEL: name: test_load_global_v3s64_align1 ; CI-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-HSA: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 1, addrspace 1) + ; CI-HSA: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, align 1, addrspace 1) + ; CI-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; CI-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-HSA: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p1) :: (load 8, align 1, addrspace 1) + ; CI-HSA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; CI-HSA: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; CI-HSA: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p1) :: (load 8, align 1, addrspace 1) + ; CI-HSA: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64) ; CI-HSA: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; CI-HSA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; CI-HSA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 ; CI-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; CI-MESA-LABEL: name: test_load_global_v3s64_align1 ; CI-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 @@ -7585,9 +8661,16 @@ ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; GFX9-HSA-LABEL: name: test_load_global_v3s64_align1 ; GFX9-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(<3 x s64>) = G_LOAD [[COPY]](p1) :: (load 24, align 1, addrspace 1) + ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load 8, align 1, addrspace 1) + ; GFX9-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; GFX9-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-HSA: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p1) :: (load 8, align 1, addrspace 1) + ; GFX9-HSA: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16 + ; GFX9-HSA: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; GFX9-HSA: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p1) :: (load 8, align 1, addrspace 1) + ; GFX9-HSA: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64) ; GFX9-HSA: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF - ; GFX9-HSA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[LOAD]](<3 x s64>), 0 + ; GFX9-HSA: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 ; GFX9-HSA: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) ; GFX9-MESA-LABEL: name: test_load_global_v3s64_align1 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 @@ -10904,11 +11987,14 @@ ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY25]](s96) ; CI-HSA-LABEL: name: test_extload_global_v2s96_from_24_align1 ; CI-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-HSA: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p1) :: (load 24, align 1, addrspace 1) - ; CI-HSA: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; CI-HSA: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; CI-HSA: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; CI-HSA: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; CI-HSA: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 1, addrspace 1) + ; CI-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-HSA: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p1) :: (load 12, align 1, addrspace 1) + ; CI-HSA: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; CI-HSA: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; CI-HSA: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; CI-HSA: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; CI-MESA-LABEL: name: test_extload_global_v2s96_from_24_align1 ; CI-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; CI-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 1, addrspace 1) @@ -11267,11 +12353,14 @@ ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; GFX9-HSA-LABEL: name: test_extload_global_v2s96_from_24_align1 ; GFX9-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p1) :: (load 24, align 1, addrspace 1) - ; GFX9-HSA: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; GFX9-HSA: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; GFX9-HSA: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; GFX9-HSA: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 1, addrspace 1) + ; GFX9-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-HSA: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p1) :: (load 12, align 1, addrspace 1) + ; GFX9-HSA: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; GFX9-HSA: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; GFX9-HSA: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; GFX9-HSA: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; GFX9-MESA-LABEL: name: test_extload_global_v2s96_from_24_align1 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 1, addrspace 1) @@ -11529,11 +12618,14 @@ ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY14]](s96) ; CI-HSA-LABEL: name: test_extload_global_v2s96_from_24_align2 ; CI-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-HSA: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p1) :: (load 24, align 2, addrspace 1) - ; CI-HSA: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; CI-HSA: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; CI-HSA: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; CI-HSA: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; CI-HSA: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 2, addrspace 1) + ; CI-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-HSA: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p1) :: (load 12, align 2, addrspace 1) + ; CI-HSA: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; CI-HSA: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; CI-HSA: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; CI-HSA: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; CI-MESA-LABEL: name: test_extload_global_v2s96_from_24_align2 ; CI-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; CI-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 2, addrspace 1) @@ -11686,11 +12778,14 @@ ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY14]](s96) ; GFX9-HSA-LABEL: name: test_extload_global_v2s96_from_24_align2 ; GFX9-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p1) :: (load 24, align 2, addrspace 1) - ; GFX9-HSA: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; GFX9-HSA: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; GFX9-HSA: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; GFX9-HSA: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 2, addrspace 1) + ; GFX9-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-HSA: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p1) :: (load 12, align 2, addrspace 1) + ; GFX9-HSA: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; GFX9-HSA: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; GFX9-HSA: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; GFX9-HSA: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; GFX9-MESA-LABEL: name: test_extload_global_v2s96_from_24_align2 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p1) :: (load 2, addrspace 1) @@ -11782,46 +12877,64 @@ ; SI-LABEL: name: test_extload_global_v2s96_from_24_align4 ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; SI: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p1) :: (load 24, align 4, addrspace 1) - ; SI: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; SI: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; SI: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 4, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p1) :: (load 12, align 4, addrspace 1) + ; SI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; SI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; CI-HSA-LABEL: name: test_extload_global_v2s96_from_24_align4 ; CI-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-HSA: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p1) :: (load 24, align 4, addrspace 1) - ; CI-HSA: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; CI-HSA: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; CI-HSA: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; CI-HSA: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; CI-HSA: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 4, addrspace 1) + ; CI-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-HSA: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p1) :: (load 12, align 4, addrspace 1) + ; CI-HSA: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; CI-HSA: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; CI-HSA: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; CI-HSA: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; CI-MESA-LABEL: name: test_extload_global_v2s96_from_24_align4 ; CI-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-MESA: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p1) :: (load 24, align 4, addrspace 1) - ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; CI-MESA: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; CI-MESA: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; CI-MESA: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 4, addrspace 1) + ; CI-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-MESA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-MESA: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p1) :: (load 12, align 4, addrspace 1) + ; CI-MESA: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; CI-MESA: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; CI-MESA: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; CI-MESA: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; VI-LABEL: name: test_extload_global_v2s96_from_24_align4 ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; VI: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p1) :: (load 24, align 4, addrspace 1) - ; VI: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; VI: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; VI: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 4, addrspace 1) + ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; VI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; VI: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p1) :: (load 12, align 4, addrspace 1) + ; VI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; VI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; GFX9-HSA-LABEL: name: test_extload_global_v2s96_from_24_align4 ; GFX9-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p1) :: (load 24, align 4, addrspace 1) - ; GFX9-HSA: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; GFX9-HSA: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; GFX9-HSA: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; GFX9-HSA: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 4, addrspace 1) + ; GFX9-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-HSA: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p1) :: (load 12, align 4, addrspace 1) + ; GFX9-HSA: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; GFX9-HSA: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; GFX9-HSA: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; GFX9-HSA: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; GFX9-MESA-LABEL: name: test_extload_global_v2s96_from_24_align4 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p1) :: (load 24, align 4, addrspace 1) - ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; GFX9-MESA: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; GFX9-MESA: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; GFX9-MESA: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 4, addrspace 1) + ; GFX9-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-MESA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-MESA: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p1) :: (load 12, align 4, addrspace 1) + ; GFX9-MESA: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; GFX9-MESA: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; GFX9-MESA: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) %0:_(p1) = COPY $vgpr0_vgpr1 %1:_(<2 x s96>) = G_LOAD %0 :: (load 24, align 4, addrspace 1) %2:_(s96) = G_EXTRACT %1, 0 @@ -11838,46 +12951,64 @@ ; SI-LABEL: name: test_extload_global_v2s96_from_24_align16 ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; SI: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p1) :: (load 24, align 16, addrspace 1) - ; SI: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; SI: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; SI: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 16, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p1) :: (load 12, align 4, addrspace 1) + ; SI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; SI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; CI-HSA-LABEL: name: test_extload_global_v2s96_from_24_align16 ; CI-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-HSA: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p1) :: (load 24, align 16, addrspace 1) - ; CI-HSA: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; CI-HSA: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; CI-HSA: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; CI-HSA: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; CI-HSA: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 16, addrspace 1) + ; CI-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-HSA: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p1) :: (load 12, align 4, addrspace 1) + ; CI-HSA: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; CI-HSA: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; CI-HSA: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; CI-HSA: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; CI-MESA-LABEL: name: test_extload_global_v2s96_from_24_align16 ; CI-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; CI-MESA: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p1) :: (load 24, align 16, addrspace 1) - ; CI-MESA: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; CI-MESA: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; CI-MESA: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; CI-MESA: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; CI-MESA: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 16, addrspace 1) + ; CI-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; CI-MESA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; CI-MESA: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p1) :: (load 12, align 4, addrspace 1) + ; CI-MESA: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; CI-MESA: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; CI-MESA: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; CI-MESA: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; VI-LABEL: name: test_extload_global_v2s96_from_24_align16 ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; VI: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p1) :: (load 24, align 16, addrspace 1) - ; VI: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; VI: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; VI: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 16, addrspace 1) + ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; VI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; VI: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p1) :: (load 12, align 4, addrspace 1) + ; VI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; VI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; GFX9-HSA-LABEL: name: test_extload_global_v2s96_from_24_align16 ; GFX9-HSA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p1) :: (load 24, align 16, addrspace 1) - ; GFX9-HSA: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; GFX9-HSA: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; GFX9-HSA: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; GFX9-HSA: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; GFX9-HSA: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 16, addrspace 1) + ; GFX9-HSA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-HSA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-HSA: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p1) :: (load 12, align 4, addrspace 1) + ; GFX9-HSA: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; GFX9-HSA: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; GFX9-HSA: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; GFX9-HSA: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) ; GFX9-MESA-LABEL: name: test_extload_global_v2s96_from_24_align16 ; GFX9-MESA: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 - ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(<2 x s96>) = G_LOAD [[COPY]](p1) :: (load 24, align 16, addrspace 1) - ; GFX9-MESA: [[EXTRACT:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 0 - ; GFX9-MESA: [[EXTRACT1:%[0-9]+]]:_(s96) = G_EXTRACT [[LOAD]](<2 x s96>), 96 - ; GFX9-MESA: $vgpr0_vgpr1_vgpr2 = COPY [[EXTRACT]](s96) - ; GFX9-MESA: $vgpr3_vgpr4_vgpr5 = COPY [[EXTRACT1]](s96) + ; GFX9-MESA: [[LOAD:%[0-9]+]]:_(s96) = G_LOAD [[COPY]](p1) :: (load 12, align 16, addrspace 1) + ; GFX9-MESA: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12 + ; GFX9-MESA: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; GFX9-MESA: [[LOAD1:%[0-9]+]]:_(s96) = G_LOAD [[PTR_ADD]](p1) :: (load 12, align 4, addrspace 1) + ; GFX9-MESA: [[COPY1:%[0-9]+]]:_(s96) = COPY [[LOAD]](s96) + ; GFX9-MESA: [[COPY2:%[0-9]+]]:_(s96) = COPY [[LOAD1]](s96) + ; GFX9-MESA: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) + ; GFX9-MESA: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) %0:_(p1) = COPY $vgpr0_vgpr1 %1:_(<2 x s96>) = G_LOAD %0 :: (load 24, align 16, addrspace 1) %2:_(s96) = G_EXTRACT %1, 0 Index: llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir =================================================================== --- llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir +++ llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir @@ -6281,33 +6281,38 @@ ; SI-LABEL: name: test_load_local_v3s16_align8 ; SI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 - ; SI: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p3) :: (load 6, align 8, addrspace 3) + ; SI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 6, align 8, addrspace 3) + ; SI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; SI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; SI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; CI-LABEL: name: test_load_local_v3s16_align8 ; CI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 - ; CI: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p3) :: (load 6, align 8, addrspace 3) + ; CI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 6, align 8, addrspace 3) + ; CI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; CI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; CI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; CI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; CI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; CI-DS128-LABEL: name: test_load_local_v3s16_align8 ; CI-DS128: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 - ; CI-DS128: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p3) :: (load 6, align 8, addrspace 3) + ; CI-DS128: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 6, align 8, addrspace 3) + ; CI-DS128: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; CI-DS128: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; CI-DS128: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; CI-DS128: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; CI-DS128: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; VI-LABEL: name: test_load_local_v3s16_align8 ; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 - ; VI: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p3) :: (load 6, align 8, addrspace 3) + ; VI: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 6, align 8, addrspace 3) + ; VI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; VI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; VI: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) ; GFX9-LABEL: name: test_load_local_v3s16_align8 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 - ; GFX9: [[LOAD:%[0-9]+]]:_(<3 x s16>) = G_LOAD [[COPY]](p3) :: (load 6, align 8, addrspace 3) + ; GFX9: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p3) :: (load 6, align 8, addrspace 3) + ; GFX9: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[LOAD]](<4 x s16>), 0 ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF - ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[LOAD]](<3 x s16>), 0 + ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0 ; GFX9: $vgpr0_vgpr1 = COPY [[INSERT]](<4 x s16>) %0:_(p3) = COPY $vgpr0 %1:_(<3 x s16>) = G_LOAD %0 :: (load 6, align 8, addrspace 3) Index: llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir =================================================================== --- llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir +++ llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir @@ -2454,7 +2454,14 @@ ; SI-LABEL: name: test_store_global_v3s32_align4 ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; SI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr2_vgpr3_vgpr4 - ; SI: G_STORE [[COPY1]](<3 x s32>), [[COPY]](p1) :: (store 12, align 4, addrspace 1) + ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>) + ; SI: G_STORE [[UV]](s32), [[COPY]](p1) :: (store 4, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: G_STORE [[UV1]](s32), [[PTR_ADD]](p1) :: (store 4, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: G_STORE [[UV2]](s32), [[PTR_ADD1]](p1) :: (store 4, addrspace 1) ; CI-LABEL: name: test_store_global_v3s32_align4 ; CI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; CI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr2_vgpr3_vgpr4 @@ -2481,7 +2488,14 @@ ; SI-LABEL: name: test_store_global_v3s32_align8 ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; SI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr2_vgpr3_vgpr4 - ; SI: G_STORE [[COPY1]](<3 x s32>), [[COPY]](p1) :: (store 12, align 8, addrspace 1) + ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>) + ; SI: G_STORE [[UV]](s32), [[COPY]](p1) :: (store 4, align 8, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: G_STORE [[UV1]](s32), [[PTR_ADD]](p1) :: (store 4, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: G_STORE [[UV2]](s32), [[PTR_ADD1]](p1) :: (store 4, align 8, addrspace 1) ; CI-LABEL: name: test_store_global_v3s32_align8 ; CI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; CI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr2_vgpr3_vgpr4 @@ -2508,7 +2522,14 @@ ; SI-LABEL: name: test_store_global_v3s32_align16 ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; SI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr2_vgpr3_vgpr4 - ; SI: G_STORE [[COPY1]](<3 x s32>), [[COPY]](p1) :: (store 12, align 16, addrspace 1) + ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>) + ; SI: G_STORE [[UV]](s32), [[COPY]](p1) :: (store 4, align 16, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: G_STORE [[UV1]](s32), [[PTR_ADD]](p1) :: (store 4, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: G_STORE [[UV2]](s32), [[PTR_ADD1]](p1) :: (store 4, align 8, addrspace 1) ; CI-LABEL: name: test_store_global_v3s32_align16 ; CI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; CI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr2_vgpr3_vgpr4 Index: llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir =================================================================== --- llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir +++ llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir @@ -143,7 +143,14 @@ ; SI-LABEL: name: test_store_global_v3s32 ; SI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; SI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr2_vgpr3_vgpr4 - ; SI: G_STORE [[COPY1]](<3 x s32>), [[COPY]](p1) :: (store 12, align 4, addrspace 1) + ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>) + ; SI: G_STORE [[UV]](s32), [[COPY]](p1) :: (store 4, addrspace 1) + ; SI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4 + ; SI: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) + ; SI: G_STORE [[UV1]](s32), [[PTR_ADD]](p1) :: (store 4, addrspace 1) + ; SI: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 + ; SI: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) + ; SI: G_STORE [[UV2]](s32), [[PTR_ADD1]](p1) :: (store 4, addrspace 1) ; VI-LABEL: name: test_store_global_v3s32 ; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1 ; VI: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr2_vgpr3_vgpr4