diff --git a/llvm/lib/Target/X86/X86AsmPrinter.h b/llvm/lib/Target/X86/X86AsmPrinter.h
--- a/llvm/lib/Target/X86/X86AsmPrinter.h
+++ b/llvm/lib/Target/X86/X86AsmPrinter.h
@@ -134,6 +134,8 @@
     SMShadowTracker.emitShadowPadding(*OutStreamer, getSubtargetInfo());
   }
 
+  void emitPatchableFunctionPrefix(int N) override;
+
   bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
                        const char *ExtraCode, raw_ostream &OS) override;
   bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
diff --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp
--- a/llvm/lib/Target/X86/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -2638,3 +2638,10 @@
 
   EmitAndCountInstruction(TmpInst);
 }
+
+void X86AsmPrinter::emitPatchableFunctionPrefix(int N) {
+  // Emit 1-byte NOPs so that after a partial patch, the remaining are still
+  // valid.
+  while (N--)
+    OutStreamer->EmitInstruction(MCInstBuilder(X86::NOOP), getSubtargetInfo());
+}
diff --git a/llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll b/llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll
@@ -0,0 +1,47 @@
+; RUN: llc -mtriple=x86_64 %s -o - | FileCheck --check-prefixes=CHECK %s
+
+;; -fpatchable-function-entry=0 -fcf-protection=branch
+define void @f0() "patchable-function-entry"="0" "branch-target-enforcement" {
+; CHECK-LABEL: f0:
+; CHECK-NEXT: .Lfunc_begin0:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:  endbr64
+; CHECK-NEXT:  retq
+; CHECK-NOT:   .section __patchable_function_entries
+  ret void
+}
+
+;; -fpatchable-function-entry=1 -fcf-protection=branch
+define void @f1() "patchable-function-entry"="1" {
+; CHECK-LABEL: f1:
+; CHECK-NEXT: .Lfunc_begin1:
+; CHECK:       endbr64
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  retq
+; CHECK:       .section __patchable_function_entries,"awo",@progbits,f1,unique,0
+; CHECK-NEXT:  .p2align 3
+; CHECK-NEXT:  .quad .Lfunc_begin1
+  ret void
+}
+
+;; -fpatchable-function-entry=2,1 -mbranch-protection=bti
+define void @f1_1() "patchable-function-entry"="1" "patchable-function-prefix"="1" {
+; CHECK-LABEL: .type f1_1,@function
+; CHECK-NEXT: .Ltmp0:
+; CHECK-NEXT: nop
+; CHECK-NEXT: f1_1:
+; CHECK-NEXT: .Lfunc_begin2:
+; CHECK:      # %bb.0:
+; CHECK-NEXT: endbr64
+; CHECK-NEXT: nop
+; CHECK-NEXT: retq
+; CHECK:      .size f1_1, .Lfunc_end2-f1_1
+; CHECK:      .section __patchable_function_entries,"awo",@progbits,f1,unique,0
+; CHECK-NEXT: .p2align 3
+; CHECK-NEXT: .quad .Ltmp0
+  ret void
+}
+
+!llvm.module.flags = !{!0}
+
+!0 = !{i32 4, !"cf-protection-branch", i32 1}
diff --git a/llvm/test/CodeGen/X86/patchable-function-entry.ll b/llvm/test/CodeGen/X86/patchable-function-entry.ll
--- a/llvm/test/CodeGen/X86/patchable-function-entry.ll
+++ b/llvm/test/CodeGen/X86/patchable-function-entry.ll
@@ -67,3 +67,25 @@
 ; 64-NEXT:     .quad .Lfunc_begin4
   ret void
 }
+
+;; -fpatchable-function-entry=3,2
+;; "patchable-function-prefix" emits data before the function entry label.
+define void @f3_2() "patchable-function-prefix"="2" "patchable-function-entry"="1" {
+; CHECK-LABEL: .type f3_2,@function
+; CHECK-NEXT: .Ltmp0: # @f3_2
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  f3_2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:  nop
+;; .size does not include the prefix.
+; CHECK:       .size f3_2, .Lfunc_end5-f3_2
+; NOFSECT      .section __patchable_function_entries,"awo",@progbits,f0,unique,0
+; FSECT:       .section __patchable_function_entries,"awo",@progbits,f3_2,unique,4
+; 32:          .p2align 2
+; 32-NEXT:     .long .Ltmp0
+; 64:          .p2align 3
+; 64-NEXT:     .quad .Ltmp0
+  %frame = alloca i8, i32 16
+  ret void
+}