diff --git a/llvm/lib/BinaryFormat/XCOFF.cpp b/llvm/lib/BinaryFormat/XCOFF.cpp --- a/llvm/lib/BinaryFormat/XCOFF.cpp +++ b/llvm/lib/BinaryFormat/XCOFF.cpp @@ -10,24 +10,32 @@ using namespace llvm; +#define ECASE(A) \ + case XCOFF::XMC_##A: \ + return #A; StringRef XCOFF::getMappingClassString(XCOFF::StorageMappingClass SMC) { switch (SMC) { - case XCOFF::XMC_DS: - return "DS"; - case XCOFF::XMC_RW: - return "RW"; - case XCOFF::XMC_PR: - return "PR"; - case XCOFF::XMC_TC0: - return "TC0"; - case XCOFF::XMC_BS: - return "BS"; - case XCOFF::XMC_RO: - return "RO"; - case XCOFF::XMC_UA: - return "UA"; - case XCOFF::XMC_TC: - return "TC"; + ECASE(PR) + ECASE(RO) + ECASE(DB) + ECASE(GL) + ECASE(XO) + ECASE(SV) + ECASE(SV64) + ECASE(SV3264) + ECASE(TI) + ECASE(TB) + ECASE(RW) + ECASE(TC0) + ECASE(TC) + ECASE(TD) + ECASE(DS) + ECASE(UA) + ECASE(BS) + ECASE(UC) + ECASE(TL) + ECASE(UL) + ECASE(TE) default: report_fatal_error("Unhandled storage-mapping class."); } diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp --- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp +++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp @@ -1202,7 +1202,7 @@ raw_ostream &/*cStream*/, int64_t Value, uint64_t /*Address*/, bool IsBranch, uint64_t /*Offset*/, uint64_t /*InstSize*/) { - using SymbolInfoTy = std::tuple; + using SymbolInfoTy = std::tuple; using SectionSymbolsTy = std::vector; if (!IsBranch) { diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll @@ -47,22 +47,22 @@ ;CHECK-NEXT: .space 1 -;CHECKOBJ: 00000000 .text: +;CHECKOBJ: 00000000 (idx: 0) .text[PR]: ;CHECKOBJ-NEXT: 0: 38 60 00 00 li 3, 0 ;CHECKOBJ-NEXT: 4: 4e 80 00 20 blr ;CHECKOBJ-NEXT: ...{{[[:space:]] *}} -;CHECKOBJ-NEXT: 00000010 .rodata: +;CHECKOBJ-NEXT: 00000010 (idx: 4) .rodata[RO]: ;CHECKOBJ-NEXT: 10: 40 00 00 00 bdnzf 0, .+0 ;CHECKOBJ-NEXT: 14: 00 00 00 32 ;CHECKOBJ-NEXT: ...{{[[:space:]] *}} -;CHECKOBJ-NEXT: 00000030 .L__const.main.cnst16: +;CHECKOBJ-NEXT: 00000030 (idx: 8) .L__const.main.cnst16: ;CHECKOBJ-NEXT: 30: 40 00 00 00 bdnzf 0, .+0 ;CHECKOBJ-NEXT: 34: 00 00 00 16 ;CHECKOBJ-NEXT: ...{{[[:space:]] *}} -;CHECKOBJ-NEXT: 00000040 .L__const.main.cnst8: +;CHECKOBJ-NEXT: 00000040 (idx: 10) .L__const.main.cnst8: ;CHECKOBJ-NEXT: 40: 40 00 00 08 bdnzf 0, .+8 ;CHECKOBJ-NEXT: 44: 00 00 00 00 {{[[:space:]] *}} -;CHECKOBJ-NEXT: 00000048 .L__const.main.cnst4: +;CHECKOBJ-NEXT: 00000048 (idx: 12) .L__const.main.cnst4: ;CHECKOBJ-NEXT: 48: 40 08 00 00 bdnzf 8, .+0 diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll @@ -50,12 +50,12 @@ ; CHECK-NEXT: .byte 104 ; CHECK-NEXT: .byte 0 -; CHECKOBJ: 00000010 .rodata.str1.1: +; CHECKOBJ: 00000010 (idx: 4) .rodata.str1.1[RO]: ; CHECKOBJ-NEXT: 10: 68 65 6c 6c xori 5, 3, 27756 ; CHECKOBJ-NEXT: 14: 6f 20 77 6f xoris 0, 25, 30575 ; CHECKOBJ-NEXT: 18: 72 6c 64 21 andi. 12, 19, 25633 ; CHECKOBJ-NEXT: 1c: 0a 00 61 62 tdlti 0, 24930{{[[:space:]] *}} -; CHECKOBJ-NEXT: 0000001e .L.str: +; CHECKOBJ-NEXT: 0000001e (idx: 8) .L.str: ; CHECKOBJ-NEXT: 1e: 61 62 63 64 ori 2, 11, 25444 ; CHECKOBJ-NEXT: 22: 65 66 67 68 oris 6, 11, 26472 ; CHECKOBJ-NEXT: 26: 00 diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll @@ -285,33 +285,33 @@ ; SYMS: ] ; DIS: Disassembly of section .text: -; DIS: 00000000 const_ivar: +; DIS: 00000000 (idx: 4) const_ivar: ; DIS-NEXT: 0: 00 00 00 23 ; DIS-NEXT: 4: 00 00 00 00 -; DIS: 00000008 const_llvar: +; DIS: 00000008 (idx: 6) const_llvar: ; DIS-NEXT: 8: 00 00 00 00 ; DIS-NEXT: c: 00 00 00 24 -; DIS: 00000010 const_svar: +; DIS: 00000010 (idx: 8) const_svar: ; DIS-NEXT: 10: 00 25 00 00 -; DIS: 00000014 const_fvar: +; DIS: 00000014 (idx: 10) const_fvar: ; DIS-NEXT: 14: 44 48 00 00 -; DIS: 00000018 const_dvar: +; DIS: 00000018 (idx: 12) const_dvar: ; DIS-NEXT: 18: 40 8c 20 00 ; DIS-NEXT: 1c: 00 00 00 00 -; DIS: 00000020 const_over_aligned: +; DIS: 00000020 (idx: 14) const_over_aligned: ; DIS-NEXT: 20: 40 8c 20 00 ; DIS-NEXT: 24: 00 00 00 00 -; DIS: 00000028 const_chrarray: +; DIS: 00000028 (idx: 16) const_chrarray: ; DIS-NEXT: 28: 61 62 63 64 ; DIS-NEXT: 2c: 00 00 00 00 -; DIS: 00000030 const_dblarr: +; DIS: 00000030 (idx: 18) const_dblarr: ; DIS-NEXT: 30: 3f f0 00 00 ; DIS-NEXT: 34: 00 00 00 00 ; DIS-NEXT: 38: 40 00 00 00 diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll @@ -12,11 +12,11 @@ } ; CHECK: Disassembly of section .text:{{[[:space:]] *}} -; CHECK-NEXT: 00000000 .text: +; CHECK-NEXT: 00000000 (idx: 0) .text[PR]: ; CHECK-NEXT: 0: 38 60 00 00 li 3, 0 ; CHECK-NEXT: 4: 4e 80 00 20 blr ; CHECK-NEXT: 8: 60 00 00 00 nop ; CHECK-NEXT: c: 60 00 00 00 nop -; CHECK: 00000010 .foo1: +; CHECK: 00000010 (idx: 4) .foo1: ; CHECK-NEXT: 10: 38 60 00 01 li 3, 1 ; CHECK-NEXT: 14: 4e 80 00 20 blr diff --git a/llvm/test/tools/llvm-objdump/xcoff-disassemble-all.test b/llvm/test/tools/llvm-objdump/xcoff-disassemble-all.test --- a/llvm/test/tools/llvm-objdump/xcoff-disassemble-all.test +++ b/llvm/test/tools/llvm-objdump/xcoff-disassemble-all.test @@ -15,7 +15,7 @@ ; REQUIRES: powerpc-registered-target CHECK: Inputs/xcoff-section-headers.o: file format aixcoff-rs6000 CHECK: Disassembly of section .text: -CHECK: 00000000 .text: +CHECK: 00000000 (idx: 4) .text: CHECK-NEXT: 0: 80 62 00 04 lwz 3, 4(2) CHECK-NEXT: 4: 80 63 00 00 lwz 3, 0(3) CHECK-NEXT: 8: 4e 80 00 20 blr @@ -27,29 +27,29 @@ CHECK-NEXT: 20: 6e 63 00 00 xoris 3, 19, 0 CHECK-NEXT: ... CHECK: Disassembly of section .data: -CHECK: 00000080 func: +CHECK: 00000080 (idx: 22) func[TC]: CHECK-NEXT: 80: 00 00 00 94 -CHECK: 00000084 a: +CHECK: 00000084 (idx: 26) a[TC]: CHECK-NEXT: 84: 00 00 00 a4 -CHECK: 00000088 b: +CHECK: 00000088 (idx: 30) b[TC]: CHECK-NEXT: 88: 00 00 00 a0 -CHECK: 0000008c c: +CHECK: 0000008c (idx: 34) c[TC]: CHECK-NEXT: 8c: 00 00 00 08 -CHECK: 00000090 d: +CHECK: 00000090 (idx: 38) d[TC]: CHECK-NEXT: 90: 00 00 00 00 -CHECK: 00000094 func: +CHECK: 00000094 (idx: 20) func[DS]: CHECK-NEXT: 94: 00 00 00 00 CHECK-NEXT: 98: 00 00 00 80 CHECK-NEXT: 9c: 00 00 00 00 -CHECK: 000000a0 b: +CHECK: 000000a0 (idx: 28) b[RW]: CHECK-NEXT: a0: 00 00 30 39 CHECK: Disassembly of section .bss: -CHECK: 000000a4 a: +CHECK: 000000a4 (idx: 24) a[RW]: CHECK-NEXT: ... CHECK: Disassembly of section .tdata: -CHECK: 00000000 d: +CHECK: 00000000 (idx: 36) d[TL]: CHECK-NEXT: 0: 40 09 21 f9 bdnzfl 9, .+8696 CHECK-NEXT: 4: f0 1b 86 6e CHECK: Disassembly of section .tbss: -CHECK: 00000008 c: +CHECK: 00000008 (idx: 32) c[UL]: CHECK-NEXT: ... diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp --- a/llvm/tools/llvm-objdump/llvm-objdump.cpp +++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp @@ -46,6 +46,7 @@ #include "llvm/Object/MachOUniversal.h" #include "llvm/Object/ObjectFile.h" #include "llvm/Object/Wasm.h" +#include "llvm/Object/XCOFFObjectFile.h" #include "llvm/Support/Casting.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" @@ -341,7 +342,8 @@ static StringSet<> FoundSectionSet; static StringRef ToolName; -typedef std::vector> SectionSymbolsTy; +typedef std::vector> + SectionSymbolsTy; namespace { struct FilterResult { @@ -900,6 +902,36 @@ llvm_unreachable("Unsupported binary format"); } +#define XMC_INVALID_SMC 255 +#define SymbolTypeMask 0x07 +#define NO_SYMINDEX -1 + +static uint8_t getXCoffSymbolCsectSMC(const ObjectFile *Obj, + const SymbolRef &Sym) { + assert(Obj->isXCOFF() && "Not XCOFF object file."); + DataRefImpl SymbolDRI = Sym.getRawDataRefImpl(); + XCOFFSymbolRef XCOFFSymRef(SymbolDRI, + static_cast(Obj)); + + if (XCOFFSymRef.hasCsectAuxEnt()) { + assert(XCOFFSymRef.getNumberOfAuxEntries() && + "No Csect Auxiliary Entry is found."); + const XCOFFCsectAuxEnt32 *AuxEntPtr = XCOFFSymRef.getXCOFFCsectAuxEnt32(); + if ((AuxEntPtr->SymbolAlignmentAndType & SymbolTypeMask) != XCOFF::XTY_LD) + return AuxEntPtr->StorageMappingClass; + } + return XMC_INVALID_SMC; +} + +static int64_t getSymbolIndex(const ObjectFile *Obj, const SymbolRef &Sym) { + if (!Obj->isXCOFF()) + return NO_SYMINDEX; + + auto *XCOFFObj = dyn_cast(Obj); + DataRefImpl SymbolDRI = Sym.getRawDataRefImpl(); + return XCOFFObj->getSymbolIndex(SymbolDRI.p); +} + template static void addDynamicElfSymbols(const ELFObjectFile *Obj, std::map &AllSymbols) { @@ -923,7 +955,8 @@ if (SecI == Obj->section_end()) continue; - AllSymbols[*SecI].emplace_back(Address, Name, SymbolType); + AllSymbols[*SecI].emplace_back(Address, Name, SymbolType, + getSymbolIndex(Obj, Symbol)); } } @@ -965,8 +998,9 @@ StringRef Name = unwrapOrError(Symbol.getName(), Obj->getFileName()); if (!Name.empty()) - AllSymbols[*Plt].emplace_back( - PltEntry.second, Saver.save((Name + "@plt").str()), SymbolType); + AllSymbols[*Plt].emplace_back(PltEntry.second, + Saver.save((Name + "@plt").str()), + SymbolType, getSymbolIndex(Obj, Symbol)); } } } @@ -1143,12 +1177,17 @@ continue; uint8_t SymbolType = ELF::STT_NOTYPE; + int64_t SymbolIndex = getSymbolIndex(Obj, Symbol); + if (Obj->isELF()) { SymbolType = getElfSymbolType(Obj, Symbol); if (SymbolType == ELF::STT_SECTION) continue; } + if (Obj->isXCOFF()) + SymbolType = getXCoffSymbolCsectSMC(Obj, Symbol); + // Don't ask a Mach-O STAB symbol for its section unless you know that // STAB symbol's section field refers to a valid section index. Otherwise // the symbol may error trying to load a section that does not exist. @@ -1163,9 +1202,9 @@ section_iterator SecI = unwrapOrError(Symbol.getSection(), FileName); if (SecI != Obj->section_end()) - AllSymbols[*SecI].emplace_back(Address, Name, SymbolType); + AllSymbols[*SecI].emplace_back(Address, Name, SymbolType, SymbolIndex); else - AbsoluteSymbols.emplace_back(Address, Name, SymbolType); + AbsoluteSymbols.emplace_back(Address, Name, SymbolType, SymbolIndex); } if (AllSymbols.empty() && Obj->isELF()) addDynamicElfSymbols(Obj, AllSymbols); @@ -1201,9 +1240,9 @@ }); if (Sec != SectionAddresses.begin()) { --Sec; - AllSymbols[Sec->second].emplace_back(VA, Name, ELF::STT_NOTYPE); + AllSymbols[Sec->second].emplace_back(VA, Name, ELF::STT_NOTYPE, 0); } else - AbsoluteSymbols.emplace_back(VA, Name, ELF::STT_NOTYPE); + AbsoluteSymbols.emplace_back(VA, Name, ELF::STT_NOTYPE, 0); } } @@ -1268,7 +1307,8 @@ Symbols.insert( Symbols.begin(), std::make_tuple(SectionAddr, SectionName, - Section.isText() ? ELF::STT_FUNC : ELF::STT_OBJECT)); + Section.isText() ? ELF::STT_FUNC : ELF::STT_OBJECT, + NO_SYMINDEX)); } SmallString<40> Comments; @@ -1343,8 +1383,20 @@ if (!NoLeadingAddr) outs() << format(Is64Bits ? "%016" PRIx64 " " : "%08" PRIx64 " ", SectionAddr + Start + VMAAdjustment); - - outs() << SymbolName << ":\n"; + if (Obj->isXCOFF()) { + uint8_t SymbolType = std::get<2>(Symbols[SI]); + if (std::get<3>(Symbols[SI]) >= 0) + outs() << "(idx: " << std::get<3>(Symbols[SI]) << ") "; + outs() << SymbolName; + if (std::get<3>(Symbols[SI]) >= 0 && SymbolType != XMC_INVALID_SMC) + outs() << "[" + << XCOFF::getMappingClassString( + (XCOFF::StorageMappingClass)SymbolType) + .str() + << "]"; + outs() << ":\n"; + } else + outs() << SymbolName << ":\n"; // Don't print raw contents of a virtual section. A virtual section // doesn't have any contents in the file. @@ -1464,16 +1516,14 @@ // the target, find the nearest preceding absolute symbol. auto TargetSym = partition_point( *TargetSectionSymbols, - [=](const std::tuple &O) { - return std::get<0>(O) <= Target; - }); + [=](const std::tuple + &O) { return std::get<0>(O) <= Target; }); if (TargetSym == TargetSectionSymbols->begin()) { TargetSectionSymbols = &AbsoluteSymbols; TargetSym = partition_point( AbsoluteSymbols, - [=](const std::tuple &O) { - return std::get<0>(O) <= Target; - }); + [=](const std::tuple + &O) { return std::get<0>(O) <= Target; }); } if (TargetSym != TargetSectionSymbols->begin()) { --TargetSym;