diff --git a/llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h b/llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h --- a/llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h +++ b/llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h @@ -20,20 +20,23 @@ struct SymbolInfoTy { uint64_t Addr; StringRef Name; - uint8_t Type; + int16_t TypeOrSmc; + int64_t Index; + bool ShowSymDesc; - SymbolInfoTy(uint64_t Addr, StringRef Name, uint8_t Type) - : Addr(Addr), Name(Name), Type(Type){}; + SymbolInfoTy(uint64_t Addr, StringRef Name, uint8_t TypeOrSmc, + int64_t Idx, bool Show) + : Addr(Addr), Name(Name), TypeOrSmc(TypeOrSmc), Index(Idx), + ShowSymDesc(Show){}; friend bool operator<(const SymbolInfoTy &P1, const SymbolInfoTy &P2) { - return std::tie(P1.Addr, P1.Name, P1.Type) < - std::tie(P2.Addr, P2.Name, P2.Type); + return std::tie(P1.Addr, P1.Name, P1.TypeOrSmc) < + std::tie(P2.Addr, P2.Name, P2.TypeOrSmc); } }; using SectionSymbolsTy = std::vector; - template class ArrayRef; class MCContext; class MCInst; diff --git a/llvm/include/llvm/Object/XCOFFObjectFile.h b/llvm/include/llvm/Object/XCOFFObjectFile.h --- a/llvm/include/llvm/Object/XCOFFObjectFile.h +++ b/llvm/include/llvm/Object/XCOFFObjectFile.h @@ -128,6 +128,12 @@ }; struct XCOFFCsectAuxEnt32 { + enum { + SymbolTypeMask = 0x07, + SymbolAlignmentMask = 0xF8, + SymbolAlignmentBitOffset = 3 + }; + support::ubig32_t SectionOrLength; // If the symbol type is XTY_SD or XTY_CM, the csect // length. @@ -140,6 +146,16 @@ XCOFF::StorageMappingClass StorageMappingClass; support::ubig32_t StabInfoIndex; support::ubig16_t StabSectNum; + uint16_t getAlignmentLog2() const { + return (SymbolAlignmentAndType & SymbolAlignmentMask) >> + SymbolAlignmentBitOffset; + }; + + uint8_t getSymbolType() const { + return SymbolAlignmentAndType & SymbolTypeMask; + }; + + bool isLabel() const { return getSymbolType() == XCOFF::XTY_LD; } }; struct XCOFFFileAuxEnt { diff --git a/llvm/lib/BinaryFormat/XCOFF.cpp b/llvm/lib/BinaryFormat/XCOFF.cpp --- a/llvm/lib/BinaryFormat/XCOFF.cpp +++ b/llvm/lib/BinaryFormat/XCOFF.cpp @@ -10,24 +10,33 @@ using namespace llvm; +#define SMC_CASE(A) \ + case XCOFF::XMC_##A: \ + return #A; StringRef XCOFF::getMappingClassString(XCOFF::StorageMappingClass SMC) { switch (SMC) { - case XCOFF::XMC_DS: - return "DS"; - case XCOFF::XMC_RW: - return "RW"; - case XCOFF::XMC_PR: - return "PR"; - case XCOFF::XMC_TC0: - return "TC0"; - case XCOFF::XMC_BS: - return "BS"; - case XCOFF::XMC_RO: - return "RO"; - case XCOFF::XMC_UA: - return "UA"; - case XCOFF::XMC_TC: - return "TC"; + SMC_CASE(PR) + SMC_CASE(RO) + SMC_CASE(DB) + SMC_CASE(GL) + SMC_CASE(XO) + SMC_CASE(SV) + SMC_CASE(SV64) + SMC_CASE(SV3264) + SMC_CASE(TI) + SMC_CASE(TB) + SMC_CASE(RW) + SMC_CASE(TC0) + SMC_CASE(TC) + SMC_CASE(TD) + SMC_CASE(DS) + SMC_CASE(UA) + SMC_CASE(BS) + SMC_CASE(UC) + SMC_CASE(TL) + SMC_CASE(UL) + SMC_CASE(TE) +#undef SMC_CASE default: report_fatal_error("Unhandled storage-mapping class."); } diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp --- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp +++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp @@ -1210,11 +1210,11 @@ if (!Symbols) return false; - auto Result = std::find_if(Symbols->begin(), Symbols->end(), - [Value](const SymbolInfoTy& Val) { - return Val.Addr == static_cast(Value) - && Val.Type == ELF::STT_NOTYPE; - }); + auto Result = std::find_if( + Symbols->begin(), Symbols->end(), [Value](const SymbolInfoTy &Val) { + return Val.Addr == static_cast(Value) && + Val.TypeOrSmc == ELF::STT_NOTYPE; + }); if (Result != Symbols->end()) { auto *Sym = Ctx.getOrCreateSymbol(Result->Name); const auto *Add = MCSymbolRefExpr::create(Sym, Ctx); diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll @@ -47,22 +47,22 @@ ;CHECK-NEXT: .space 1 -;CHECKOBJ: 00000000 .text: +;CHECKOBJ: 00000000 (idx: 0) .text[PR]: ;CHECKOBJ-NEXT: 0: 38 60 00 00 li 3, 0 ;CHECKOBJ-NEXT: 4: 4e 80 00 20 blr ;CHECKOBJ-NEXT: ...{{[[:space:]] *}} -;CHECKOBJ-NEXT: 00000010 .rodata: +;CHECKOBJ-NEXT: 00000010 (idx: 4) .rodata[RO]: ;CHECKOBJ-NEXT: 10: 40 00 00 00 bdnzf 0, .+0 ;CHECKOBJ-NEXT: 14: 00 00 00 32 ;CHECKOBJ-NEXT: ...{{[[:space:]] *}} -;CHECKOBJ-NEXT: 00000030 .L__const.main.cnst16: +;CHECKOBJ-NEXT: 00000030 (idx: 8) .L__const.main.cnst16: ;CHECKOBJ-NEXT: 30: 40 00 00 00 bdnzf 0, .+0 ;CHECKOBJ-NEXT: 34: 00 00 00 16 ;CHECKOBJ-NEXT: ...{{[[:space:]] *}} -;CHECKOBJ-NEXT: 00000040 .L__const.main.cnst8: +;CHECKOBJ-NEXT: 00000040 (idx: 10) .L__const.main.cnst8: ;CHECKOBJ-NEXT: 40: 40 00 00 08 bdnzf 0, .+8 ;CHECKOBJ-NEXT: 44: 00 00 00 00 {{[[:space:]] *}} -;CHECKOBJ-NEXT: 00000048 .L__const.main.cnst4: +;CHECKOBJ-NEXT: 00000048 (idx: 12) .L__const.main.cnst4: ;CHECKOBJ-NEXT: 48: 40 08 00 00 bdnzf 8, .+0 diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll @@ -66,20 +66,20 @@ ; CHECK-NEXT: .byte 104 ; CHECK-NEXT: .byte 0 -; CHECKOBJ: 00000010 .rodata.str2.2: +; CHECKOBJ: 00000010 (idx: 4) .rodata.str2.2[RO]: ; CHECKOBJ-NEXT: 10: 01 08 01 10 ; CHECKOBJ-NEXT: 14: 00 d5 00 00 {{.*}}{{[[:space:]] *}} -; CHECKOBJ-NEXT: 00000018 .rodata.str4.4: +; CHECKOBJ-NEXT: 00000018 (idx: 8) .rodata.str4.4[RO] ; CHECKOBJ-NEXT: 18: 00 00 01 d0 ; CHECKOBJ-NEXT: 1c: 00 00 01 d8 ; CHECKOBJ-NEXT: 20: 00 00 01 9d ; CHECKOBJ-NEXT: 24: 00 00 00 00 {{.*}}{{[[:space:]] *}} -; CHECKOBJ-NEXT: 00000028 .rodata.str1.1: +; CHECKOBJ-NEXT: 00000028 (idx: 12) .rodata.str1.1[RO]: ; CHECKOBJ-NEXT: 28: 68 65 6c 6c ; CHECKOBJ-NEXT: 2c: 6f 20 77 6f ; CHECKOBJ-NEXT: 30: 72 6c 64 21 ; CHECKOBJ-NEXT: 34: 0a 00 61 62 {{.*}}{{[[:space:]] *}} -; CHECKOBJ-NEXT: 00000036 .L.str: +; CHECKOBJ-NEXT: 00000036 (idx: 16) .L.str: ; CHECKOBJ-NEXT: 36: 61 62 63 64 ; CHECKOBJ-NEXT: 3a: 65 66 67 68 ; CHECKOBJ-NEXT: 3e: 00 diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll @@ -285,33 +285,33 @@ ; SYMS: ] ; DIS: Disassembly of section .text: -; DIS: 00000000 const_ivar: +; DIS: 00000000 (idx: 4) const_ivar: ; DIS-NEXT: 0: 00 00 00 23 ; DIS-NEXT: 4: 00 00 00 00 -; DIS: 00000008 const_llvar: +; DIS: 00000008 (idx: 6) const_llvar: ; DIS-NEXT: 8: 00 00 00 00 ; DIS-NEXT: c: 00 00 00 24 -; DIS: 00000010 const_svar: +; DIS: 00000010 (idx: 8) const_svar: ; DIS-NEXT: 10: 00 25 00 00 -; DIS: 00000014 const_fvar: +; DIS: 00000014 (idx: 10) const_fvar: ; DIS-NEXT: 14: 44 48 00 00 -; DIS: 00000018 const_dvar: +; DIS: 00000018 (idx: 12) const_dvar: ; DIS-NEXT: 18: 40 8c 20 00 ; DIS-NEXT: 1c: 00 00 00 00 -; DIS: 00000020 const_over_aligned: +; DIS: 00000020 (idx: 14) const_over_aligned: ; DIS-NEXT: 20: 40 8c 20 00 ; DIS-NEXT: 24: 00 00 00 00 -; DIS: 00000028 const_chrarray: +; DIS: 00000028 (idx: 16) const_chrarray: ; DIS-NEXT: 28: 61 62 63 64 ; DIS-NEXT: 2c: 00 00 00 00 -; DIS: 00000030 const_dblarr: +; DIS: 00000030 (idx: 18) const_dblarr: ; DIS-NEXT: 30: 3f f0 00 00 ; DIS-NEXT: 34: 00 00 00 00 ; DIS-NEXT: 38: 40 00 00 00 diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll --- a/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll +++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll @@ -12,11 +12,11 @@ } ; CHECK: Disassembly of section .text:{{[[:space:]] *}} -; CHECK-NEXT: 00000000 .text: +; CHECK-NEXT: 00000000 (idx: 0) .text[PR]: ; CHECK-NEXT: 0: 38 60 00 00 li 3, 0 ; CHECK-NEXT: 4: 4e 80 00 20 blr ; CHECK-NEXT: 8: 60 00 00 00 nop ; CHECK-NEXT: c: 60 00 00 00 nop -; CHECK: 00000010 .foo1: +; CHECK: 00000010 (idx: 4) .foo1: ; CHECK-NEXT: 10: 38 60 00 01 li 3, 1 ; CHECK-NEXT: 14: 4e 80 00 20 blr diff --git a/llvm/test/tools/llvm-objdump/xcoff-disassemble-all.test b/llvm/test/tools/llvm-objdump/xcoff-disassemble-all.test --- a/llvm/test/tools/llvm-objdump/xcoff-disassemble-all.test +++ b/llvm/test/tools/llvm-objdump/xcoff-disassemble-all.test @@ -15,7 +15,7 @@ ; REQUIRES: powerpc-registered-target CHECK: Inputs/xcoff-section-headers.o: file format aixcoff-rs6000 CHECK: Disassembly of section .text: -CHECK: 00000000 .text: +CHECK: 00000000 (idx: 4) .text: CHECK-NEXT: 0: 80 62 00 04 lwz 3, 4(2) CHECK-NEXT: 4: 80 63 00 00 lwz 3, 0(3) CHECK-NEXT: 8: 4e 80 00 20 blr @@ -27,29 +27,29 @@ CHECK-NEXT: 20: 6e 63 00 00 xoris 3, 19, 0 CHECK-NEXT: ... CHECK: Disassembly of section .data: -CHECK: 00000080 func: +CHECK: 00000080 (idx: 22) func[TC]: CHECK-NEXT: 80: 00 00 00 94 -CHECK: 00000084 a: +CHECK: 00000084 (idx: 26) a[TC]: CHECK-NEXT: 84: 00 00 00 a4 -CHECK: 00000088 b: +CHECK: 00000088 (idx: 30) b[TC]: CHECK-NEXT: 88: 00 00 00 a0 -CHECK: 0000008c c: +CHECK: 0000008c (idx: 34) c[TC]: CHECK-NEXT: 8c: 00 00 00 08 -CHECK: 00000090 d: +CHECK: 00000090 (idx: 38) d[TC]: CHECK-NEXT: 90: 00 00 00 00 -CHECK: 00000094 func: +CHECK: 00000094 (idx: 20) func[DS]: CHECK-NEXT: 94: 00 00 00 00 CHECK-NEXT: 98: 00 00 00 80 CHECK-NEXT: 9c: 00 00 00 00 -CHECK: 000000a0 b: +CHECK: 000000a0 (idx: 28) b[RW]: CHECK-NEXT: a0: 00 00 30 39 CHECK: Disassembly of section .bss: -CHECK: 000000a4 a: +CHECK: 000000a4 (idx: 24) a[RW]: CHECK-NEXT: ... CHECK: Disassembly of section .tdata: -CHECK: 00000000 d: +CHECK: 00000000 (idx: 36) d[TL]: CHECK-NEXT: 0: 40 09 21 f9 bdnzfl 9, .+8696 CHECK-NEXT: 4: f0 1b 86 6e CHECK: Disassembly of section .tbss: -CHECK: 00000008 c: +CHECK: 00000008 (idx: 32) c[UL]: CHECK-NEXT: ... diff --git a/llvm/tools/llvm-objdump/CMakeLists.txt b/llvm/tools/llvm-objdump/CMakeLists.txt --- a/llvm/tools/llvm-objdump/CMakeLists.txt +++ b/llvm/tools/llvm-objdump/CMakeLists.txt @@ -20,6 +20,7 @@ ELFDump.cpp MachODump.cpp WasmDump.cpp + XCOFFDump.cpp ) if(HAVE_LIBXAR) diff --git a/llvm/tools/llvm-objdump/XCOFFDump.cpp b/llvm/tools/llvm-objdump/XCOFFDump.cpp new file mode 100644 --- /dev/null +++ b/llvm/tools/llvm-objdump/XCOFFDump.cpp @@ -0,0 +1,22 @@ +#include "llvm/Object/XCOFFObjectFile.h" + +using namespace llvm::object; +namespace llvm { + +int16_t getXCoffSymbolCsectSMC(const ObjectFile *Obj, const SymbolRef &Sym) { + assert(Obj->isXCOFF() && "Not XCOFF object file."); + DataRefImpl SymbolDRI = Sym.getRawDataRefImpl(); + + XCOFFSymbolRef SymRef(SymbolDRI, static_cast(Obj)); + + if (SymRef.hasCsectAuxEnt()) { + assert(SymRef.getNumberOfAuxEntries() && + "No CSECT Auxiliary Entry is found."); + + const XCOFFCsectAuxEnt32 *AuxEntPtr = SymRef.getXCOFFCsectAuxEnt32(); + return AuxEntPtr->StorageMappingClass; + } + + return -1; +} +} // namespace llvm diff --git a/llvm/tools/llvm-objdump/llvm-objdump.h b/llvm/tools/llvm-objdump/llvm-objdump.h --- a/llvm/tools/llvm-objdump/llvm-objdump.h +++ b/llvm/tools/llvm-objdump/llvm-objdump.h @@ -139,6 +139,10 @@ void printSectionContents(const object::ObjectFile *O); void printSymbolTable(const object::ObjectFile *O, StringRef ArchiveName, StringRef ArchitectureName = StringRef()); + +int16_t getXCoffSymbolCsectSMC(const object::ObjectFile *Obj, + const object::SymbolRef &Sym); + LLVM_ATTRIBUTE_NORETURN void reportError(StringRef File, Twine Message); LLVM_ATTRIBUTE_NORETURN void reportError(Error E, StringRef FileName, StringRef ArchiveName = "", diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp --- a/llvm/tools/llvm-objdump/llvm-objdump.cpp +++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp @@ -46,6 +46,7 @@ #include "llvm/Object/MachOUniversal.h" #include "llvm/Object/ObjectFile.h" #include "llvm/Object/Wasm.h" +#include "llvm/Object/XCOFFObjectFile.h" #include "llvm/Support/Casting.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" @@ -898,6 +899,37 @@ llvm_unreachable("Unsupported binary format"); } +#define NO_SYMINDEX -1 + +static int64_t getSymbolIndex(const ObjectFile *Obj, const SymbolRef &Sym) { + if (!Obj->isXCOFF()) + return NO_SYMINDEX; + + const auto *XCOFFObj = dyn_cast(Obj); + DataRefImpl SymbolDRI = Sym.getRawDataRefImpl(); + return XCOFFObj->getSymbolIndex(SymbolDRI.p); +} + +static bool isSymbolDescriptionDisplay(const ObjectFile *Obj, + const SymbolRef &Sym) { + if (!Obj->isXCOFF()) + return false; + + DataRefImpl SymbolDRI = Sym.getRawDataRefImpl(); + + XCOFFSymbolRef SymRef(SymbolDRI, static_cast(Obj)); + + if (SymRef.hasCsectAuxEnt()) { + assert(SymRef.getNumberOfAuxEntries() && + "No CSECT Auxiliary Entry is found."); + + const XCOFFCsectAuxEnt32 *AuxEntPtr = SymRef.getXCOFFCsectAuxEnt32(); + return !AuxEntPtr->isLabel(); + } + + return false; +} + template static void addDynamicElfSymbols(const ELFObjectFile *Obj, std::map &AllSymbols) { @@ -921,7 +953,9 @@ if (SecI == Obj->section_end()) continue; - AllSymbols[*SecI].emplace_back(Address, Name, SymbolType); + AllSymbols[*SecI].emplace_back(Address, Name, SymbolType, + getSymbolIndex(Obj, Symbol), + isSymbolDescriptionDisplay(Obj, Symbol)); } } @@ -963,8 +997,10 @@ StringRef Name = unwrapOrError(Symbol.getName(), Obj->getFileName()); if (!Name.empty()) - AllSymbols[*Plt].emplace_back( - PltEntry.second, Saver.save((Name + "@plt").str()), SymbolType); + AllSymbols[*Plt].emplace_back(PltEntry.second, + Saver.save((Name + "@plt").str()), + SymbolType, getSymbolIndex(Obj, Symbol), + isSymbolDescriptionDisplay(Obj, Symbol)); } } } @@ -1108,6 +1144,24 @@ } } +static void printXCOFFSymbolDescription(SymbolInfoTy &SymbolInfo, + std::string SymbolName) { + uint8_t SymbolType = SymbolInfo.TypeOrSmc; + int64_t SymIndex = SymbolInfo.Index; + + if (SymIndex >= 0) + outs() << "(idx: " << SymIndex << ") "; + + outs() << SymbolName; + + if (SymIndex >= 0 && SymbolInfo.ShowSymDesc) + outs() << "[" + << XCOFF::getMappingClassString( + (XCOFF::StorageMappingClass)SymbolType) + .str() + << "]"; +} + static void disassembleObject(const Target *TheTarget, const ObjectFile *Obj, MCContext &Ctx, MCDisassembler *PrimaryDisAsm, MCDisassembler *SecondaryDisAsm, @@ -1141,16 +1195,20 @@ continue; uint8_t SymbolType = ELF::STT_NOTYPE; + int64_t SymbolIndex = getSymbolIndex(Obj, Symbol); + bool SymbolDescriptionDisplay = isSymbolDescriptionDisplay(Obj, Symbol); + if (Obj->isELF()) { SymbolType = getElfSymbolType(Obj, Symbol); if (SymbolType == ELF::STT_SECTION) continue; - } + } else if (Obj->isXCOFF()) + SymbolType = getXCoffSymbolCsectSMC(Obj, Symbol); // Don't ask a Mach-O STAB symbol for its section unless you know that // STAB symbol's section field refers to a valid section index. Otherwise // the symbol may error trying to load a section that does not exist. - if (MachO) { + else if (MachO) { DataRefImpl SymDRI = Symbol.getRawDataRefImpl(); uint8_t NType = (MachO->is64Bit() ? MachO->getSymbol64TableEntry(SymDRI).n_type: @@ -1161,9 +1219,11 @@ section_iterator SecI = unwrapOrError(Symbol.getSection(), FileName); if (SecI != Obj->section_end()) - AllSymbols[*SecI].emplace_back(Address, Name, SymbolType); + AllSymbols[*SecI].emplace_back(Address, Name, SymbolType, SymbolIndex, + SymbolDescriptionDisplay); else - AbsoluteSymbols.emplace_back(Address, Name, SymbolType); + AbsoluteSymbols.emplace_back(Address, Name, SymbolType, SymbolIndex, + SymbolDescriptionDisplay); } if (AllSymbols.empty() && Obj->isELF()) addDynamicElfSymbols(Obj, AllSymbols); @@ -1199,9 +1259,11 @@ }); if (Sec != SectionAddresses.begin()) { --Sec; - AllSymbols[Sec->second].emplace_back(VA, Name, ELF::STT_NOTYPE); + AllSymbols[Sec->second].emplace_back(VA, Name, ELF::STT_NOTYPE, + NO_SYMINDEX, false); } else - AbsoluteSymbols.emplace_back(VA, Name, ELF::STT_NOTYPE); + AbsoluteSymbols.emplace_back(VA, Name, ELF::STT_NOTYPE, NO_SYMINDEX, + false); } } @@ -1265,8 +1327,9 @@ if (Symbols.empty() || Symbols[0].Addr != 0) { Symbols.insert( Symbols.begin(), - SymbolInfoTy(SectionAddr, SectionName, - Section.isText() ? ELF::STT_FUNC : ELF::STT_OBJECT)); + SymbolInfoTy(SectionAddr, SectionName, + Section.isText() ? ELF::STT_FUNC : ELF::STT_OBJECT, + NO_SYMINDEX, false)); } SmallString<40> Comments; @@ -1321,12 +1384,12 @@ } if (Obj->isELF() && Obj->getArch() == Triple::amdgcn) { - if (Symbols[SI].Type == ELF::STT_AMDGPU_HSA_KERNEL) { + if (Symbols[SI].TypeOrSmc == ELF::STT_AMDGPU_HSA_KERNEL) { // skip amd_kernel_code_t at the begining of kernel symbol (256 bytes) Start += 256; } if (SI == SE - 1 || - Symbols[SI + 1].Type == ELF::STT_AMDGPU_HSA_KERNEL) { + Symbols[SI + 1].TypeOrSmc == ELF::STT_AMDGPU_HSA_KERNEL) { // cut trailing zeroes at the end of kernel // cut up to 256 bytes const uint64_t EndAlign = 256; @@ -1341,8 +1404,11 @@ if (!NoLeadingAddr) outs() << format(Is64Bits ? "%016" PRIx64 " " : "%08" PRIx64 " ", SectionAddr + Start + VMAAdjustment); - - outs() << SymbolName << ":\n"; + if (Obj->isXCOFF()) { + printXCOFFSymbolDescription(Symbols[SI], SymbolName); + outs() << ":\n"; + } else + outs() << SymbolName << ":\n"; // Don't print raw contents of a virtual section. A virtual section // doesn't have any contents in the file. @@ -1365,7 +1431,7 @@ // only disassembling text (applicable all architectures), we are in a // situation where we must print the data and not disassemble it. if (Obj->isELF() && !DisassembleAll && Section.isText()) { - uint8_t SymTy = Symbols[SI].Type; + uint8_t SymTy = Symbols[SI].TypeOrSmc; if (SymTy == ELF::STT_OBJECT || SymTy == ELF::STT_COMMON) { dumpELFData(SectionAddr, Index, End, Bytes); Index = End; @@ -1373,7 +1439,7 @@ } bool CheckARMELFData = hasMappingSymbols(Obj) && - Symbols[SI].Type != ELF::STT_OBJECT && + Symbols[SI].TypeOrSmc != ELF::STT_OBJECT && !DisassembleAll; while (Index < End) { // ARM and AArch64 ELF binaries can interleave data and text in the diff --git a/llvm/tools/llvm-readobj/XCOFFDumper.cpp b/llvm/tools/llvm-readobj/XCOFFDumper.cpp --- a/llvm/tools/llvm-readobj/XCOFFDumper.cpp +++ b/llvm/tools/llvm-readobj/XCOFFDumper.cpp @@ -22,11 +22,6 @@ namespace { class XCOFFDumper : public ObjDumper { - enum { - SymbolTypeMask = 0x07, - SymbolAlignmentMask = 0xF8, - SymbolAlignmentBitOffset = 3 - }; public: XCOFFDumper(const XCOFFObjectFile &Obj, ScopedPrinter &Writer) @@ -211,17 +206,15 @@ DictScope SymDs(W, "CSECT Auxiliary Entry"); W.printNumber("Index", Obj.getSymbolIndex(reinterpret_cast(AuxEntPtr))); - if ((AuxEntPtr->SymbolAlignmentAndType & SymbolTypeMask) == XCOFF::XTY_LD) + if (AuxEntPtr->isLabel()) W.printNumber("ContainingCsectSymbolIndex", AuxEntPtr->SectionOrLength); else W.printNumber("SectionLen", AuxEntPtr->SectionOrLength); W.printHex("ParameterHashIndex", AuxEntPtr->ParameterHashIndex); W.printHex("TypeChkSectNum", AuxEntPtr->TypeChkSectNum); // Print out symbol alignment and type. - W.printNumber("SymbolAlignmentLog2", - (AuxEntPtr->SymbolAlignmentAndType & SymbolAlignmentMask) >> - SymbolAlignmentBitOffset); - W.printEnum("SymbolType", AuxEntPtr->SymbolAlignmentAndType & SymbolTypeMask, + W.printNumber("SymbolAlignmentLog2", AuxEntPtr->getAlignmentLog2()); + W.printEnum("SymbolType", AuxEntPtr->getSymbolType(), makeArrayRef(CsectSymbolTypeClass)); W.printEnum("StorageMappingClass", static_cast(AuxEntPtr->StorageMappingClass),