diff --git a/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp b/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp --- a/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp @@ -462,8 +462,15 @@ NewPtr->getType()->getPointerAddressSpace() == AS)) NewPtr = IC.Builder.CreateBitCast(Ptr, NewTy->getPointerTo(AS)); + unsigned Align = LI.getAlignment(); + if (!Align) + // If old load did not have an explicit alignment specified, + // manually preserve the implied (ABI) alignment of the load. + // Else we may inadvertently incorrectly over-promise alignment. + Align = IC.getDataLayout().getABITypeAlignment(LI.getType()); + LoadInst *NewLoad = IC.Builder.CreateAlignedLoad( - NewTy, NewPtr, LI.getAlignment(), LI.isVolatile(), LI.getName() + Suffix); + NewTy, NewPtr, Align, LI.isVolatile(), LI.getName() + Suffix); NewLoad->setAtomic(LI.getOrdering(), LI.getSyncScopeID()); copyMetadataForLoad(*NewLoad, LI); return NewLoad; diff --git a/llvm/test/Transforms/InstCombine/load-bitcast64.ll b/llvm/test/Transforms/InstCombine/load-bitcast64.ll --- a/llvm/test/Transforms/InstCombine/load-bitcast64.ll +++ b/llvm/test/Transforms/InstCombine/load-bitcast64.ll @@ -8,7 +8,7 @@ ; CHECK-LABEL: @test1( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64** -; CHECK-NEXT: [[B1:%.*]] = load i64*, i64** [[TMP0]], align 8 +; CHECK-NEXT: [[B1:%.*]] = load i64*, i64** [[TMP0]], align 4 ; CHECK-NEXT: ret i64* [[B1]] ; entry: @@ -57,7 +57,7 @@ ; CHECK-LABEL: @test4( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64* -; CHECK-NEXT: [[B1:%.*]] = load i64, i64* [[TMP0]], align 4 +; CHECK-NEXT: [[B1:%.*]] = load i64, i64* [[TMP0]], align 8 ; CHECK-NEXT: ret i64 [[B1]] ; entry: @@ -88,7 +88,7 @@ ; CHECK-LABEL: @test6( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64* -; CHECK-NEXT: [[B1:%.*]] = load i64, i64* [[TMP0]], align 4 +; CHECK-NEXT: [[B1:%.*]] = load i64, i64* [[TMP0]], align 8 ; CHECK-NEXT: ret i64 [[B1]] ; entry: