diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
--- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -909,6 +909,10 @@
 }  // hasSideEffects = 0
 }  // End FXU Operations.
 
+def : InstAlias<"rotlwi $rA, $rS, $n", (RLWINM8 g8rc:$rA, g8rc:$rS, u5imm:$n, 0, 31)>;
+def : InstAlias<"rotlwi. $rA, $rS, $n", (RLWINM8_rec g8rc:$rA, g8rc:$rS, u5imm:$n, 0, 31)>;
+def : InstAlias<"rotlw $rA, $rS, $rB", (RLWNM8 g8rc:$rA, g8rc:$rS, g8rc:$rB, 0, 31)>;
+def : InstAlias<"rotlw. $rA, $rS, $rB", (RLWNM8_rec g8rc:$rA, g8rc:$rS, g8rc:$rB, 0, 31)>;
 
 //===----------------------------------------------------------------------===//
 // Load/Store instructions.
diff --git a/llvm/test/CodeGen/PowerPC/bperm.ll b/llvm/test/CodeGen/PowerPC/bperm.ll
--- a/llvm/test/CodeGen/PowerPC/bperm.ll
+++ b/llvm/test/CodeGen/PowerPC/bperm.ll
@@ -9,7 +9,7 @@
   ret i32 %0
 
 ; CHECK-LABEL: @bs4
-; CHECK: rlwinm [[REG1:[0-9]+]], 3, 8, 0, 31
+; CHECK: rotlwi [[REG1:[0-9]+]], 3, 8
 ; CHECK: rlwimi [[REG1]], 3, 24, 16, 23
 ; CHECK: rlwimi [[REG1]], 3, 24, 0, 7
 ; CHECK: mr 3, [[REG1]]