diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h --- a/llvm/include/llvm/CodeGen/TargetLowering.h +++ b/llvm/include/llvm/CodeGen/TargetLowering.h @@ -194,10 +194,11 @@ uint16_t Alignment = 0; Type *ByValType = nullptr; - ArgListEntry() - : IsSExt(false), IsZExt(false), IsInReg(false), IsSRet(false), - IsNest(false), IsByVal(false), IsInAlloca(false), IsReturned(false), - IsSwiftSelf(false), IsSwiftError(false), IsCFGuardTarget(false) {} + ArgListEntry(SDValue Node, Type *Ty) + : Node(Node), Ty(Ty), IsSExt(false), IsZExt(false), IsInReg(false), + IsSRet(false), IsNest(false), IsByVal(false), IsInAlloca(false), + IsReturned(false), IsSwiftSelf(false), IsSwiftError(false), + IsCFGuardTarget(false) {} ArgListEntry(Value *Val) : Val(Val), Ty(Val->getType()), IsSExt(false), IsZExt(false), diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -2027,12 +2027,10 @@ SDValue SelectionDAGLegalize::ExpandLibCall(RTLIB::Libcall LC, SDNode *Node, bool isSigned) { TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; for (const SDValue &Op : Node->op_values()) { EVT ArgVT = Op.getValueType(); Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); - Entry.Node = Op; - Entry.Ty = ArgTy; + TargetLowering::ArgListEntry Entry(Op, ArgTy); Entry.IsSExt = TLI.shouldSignExtendTypeInLibCall(ArgVT, isSigned); Entry.IsZExt = !TLI.shouldSignExtendTypeInLibCall(ArgVT, isSigned); Args.push_back(Entry); @@ -2198,12 +2196,10 @@ Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext()); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; for (const SDValue &Op : Node->op_values()) { EVT ArgVT = Op.getValueType(); Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); - Entry.Node = Op; - Entry.Ty = ArgTy; + TargetLowering::ArgListEntry Entry(Op, ArgTy); Entry.IsSExt = isSigned; Entry.IsZExt = !isSigned; Args.push_back(Entry); @@ -2211,8 +2207,7 @@ // Also pass the return address of the remainder. SDValue FIPtr = DAG.CreateStackTemporary(RetVT); - Entry.Node = FIPtr; - Entry.Ty = RetTy->getPointerTo(); + TargetLowering::ArgListEntry Entry(FIPtr, RetTy->getPointerTo()); Entry.IsSExt = isSigned; Entry.IsZExt = !isSigned; Args.push_back(Entry); @@ -2293,30 +2288,20 @@ Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext()); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; // Pass the argument. - Entry.Node = Node->getOperand(0); - Entry.Ty = RetTy; - Entry.IsSExt = false; - Entry.IsZExt = false; - Args.push_back(Entry); + TargetLowering::ArgListEntry ArgEntry(Node->getOperand(0), RetTy); + Args.push_back(ArgEntry); // Pass the return address of sin. SDValue SinPtr = DAG.CreateStackTemporary(RetVT); - Entry.Node = SinPtr; - Entry.Ty = RetTy->getPointerTo(); - Entry.IsSExt = false; - Entry.IsZExt = false; - Args.push_back(Entry); + TargetLowering::ArgListEntry SinEntry(SinPtr, RetTy->getPointerTo()); + Args.push_back(SinEntry); // Also pass the return address of the cos. SDValue CosPtr = DAG.CreateStackTemporary(RetVT); - Entry.Node = CosPtr; - Entry.Ty = RetTy->getPointerTo(); - Entry.IsSExt = false; - Entry.IsZExt = false; - Args.push_back(Entry); + TargetLowering::ArgListEntry CosEntry(CosPtr, RetTy->getPointerTo()); + Args.push_back(CosEntry); SDValue Callee = DAG.getExternalSymbol(TLI.getLibcallName(LC), TLI.getPointerTy(DAG.getDataLayout())); diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -3504,22 +3504,17 @@ MachinePointerInfo()); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; for (const SDValue &Op : N->op_values()) { EVT ArgVT = Op.getValueType(); Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); - Entry.Node = Op; - Entry.Ty = ArgTy; + TargetLowering::ArgListEntry Entry(Op, ArgTy); Entry.IsSExt = true; - Entry.IsZExt = false; Args.push_back(Entry); } // Also pass the address of the overflow check. - Entry.Node = Temp; - Entry.Ty = PtrTy->getPointerTo(); + TargetLowering::ArgListEntry Entry(Temp, PtrTy->getPointerTo()); Entry.IsSExt = true; - Entry.IsZExt = false; Args.push_back(Entry); SDValue Func = DAG.getExternalSymbol(TLI.getLibcallName(LC), PtrVT); diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -6251,13 +6251,15 @@ // Emit a library call. TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = Type::getInt8PtrTy(*getContext()); - Entry.Node = Dst; Args.push_back(Entry); - Entry.Node = Src; Args.push_back(Entry); - - Entry.Ty = getDataLayout().getIntPtrType(*getContext()); - Entry.Node = Size; Args.push_back(Entry); + Type *Ty = Type::getInt8PtrTy(*getContext()); + TargetLowering::ArgListEntry DstEntry(Dst, Ty); + Args.push_back(DstEntry); + TargetLowering::ArgListEntry SrcEntry(Src, Ty); + Args.push_back(SrcEntry); + + Ty = getDataLayout().getIntPtrType(*getContext()); + TargetLowering::ArgListEntry SizeEntry(Size, Ty); + Args.push_back(SizeEntry); // FIXME: pass in SDLoc TargetLowering::CallLoweringInfo CLI(*this); CLI.setDebugLoc(dl) @@ -6283,17 +6285,15 @@ MachinePointerInfo SrcPtrInfo) { // Emit a library call. TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = getDataLayout().getIntPtrType(*getContext()); - Entry.Node = Dst; - Args.push_back(Entry); + Type *Ty = getDataLayout().getIntPtrType(*getContext()); + TargetLowering::ArgListEntry DstEntry(Dst, Ty); + Args.push_back(DstEntry); - Entry.Node = Src; - Args.push_back(Entry); + TargetLowering::ArgListEntry SrcEntry(Src, Ty); + Args.push_back(SrcEntry); - Entry.Ty = SizeTy; - Entry.Node = Size; - Args.push_back(Entry); + TargetLowering::ArgListEntry SizeEntry(Size, SizeTy); + Args.push_back(SizeEntry); RTLIB::Libcall LibraryCall = RTLIB::getMEMCPY_ELEMENT_UNORDERED_ATOMIC(ElemSz); @@ -6355,13 +6355,15 @@ // Emit a library call. TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = Type::getInt8PtrTy(*getContext()); - Entry.Node = Dst; Args.push_back(Entry); - Entry.Node = Src; Args.push_back(Entry); - - Entry.Ty = getDataLayout().getIntPtrType(*getContext()); - Entry.Node = Size; Args.push_back(Entry); + Type *Ty = Type::getInt8PtrTy(*getContext()); + TargetLowering::ArgListEntry DstEntry(Dst, Ty); + Args.push_back(DstEntry); + TargetLowering::ArgListEntry SrcEntry(Src, Ty); + Args.push_back(SrcEntry); + + Ty = getDataLayout().getIntPtrType(*getContext()); + TargetLowering::ArgListEntry SizeEntry(Size, Ty); + Args.push_back(SizeEntry); // FIXME: pass in SDLoc TargetLowering::CallLoweringInfo CLI(*this); CLI.setDebugLoc(dl) @@ -6387,17 +6389,15 @@ MachinePointerInfo SrcPtrInfo) { // Emit a library call. TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = getDataLayout().getIntPtrType(*getContext()); - Entry.Node = Dst; - Args.push_back(Entry); + Type *Ty = getDataLayout().getIntPtrType(*getContext()); + TargetLowering::ArgListEntry DstEntry(Dst, Ty); + Args.push_back(DstEntry); - Entry.Node = Src; - Args.push_back(Entry); + TargetLowering::ArgListEntry SrcEntry(Src, Ty); + Args.push_back(SrcEntry); - Entry.Ty = SizeTy; - Entry.Node = Size; - Args.push_back(Entry); + TargetLowering::ArgListEntry SizeEntry(Size, SizeTy); + Args.push_back(SizeEntry); RTLIB::Libcall LibraryCall = RTLIB::getMEMMOVE_ELEMENT_UNORDERED_ATOMIC(ElemSz); @@ -6454,15 +6454,15 @@ // Emit a library call. TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Node = Dst; Entry.Ty = Type::getInt8PtrTy(*getContext()); - Args.push_back(Entry); - Entry.Node = Src; - Entry.Ty = Src.getValueType().getTypeForEVT(*getContext()); - Args.push_back(Entry); - Entry.Node = Size; - Entry.Ty = getDataLayout().getIntPtrType(*getContext()); - Args.push_back(Entry); + Type *Ty = Type::getInt8PtrTy(*getContext()); + TargetLowering::ArgListEntry DstEntry(Dst, Ty); + Args.push_back(DstEntry); + Ty = Src.getValueType().getTypeForEVT(*getContext()); + TargetLowering::ArgListEntry SrcEntry(Src, Ty); + Args.push_back(SrcEntry); + Ty = getDataLayout().getIntPtrType(*getContext()); + TargetLowering::ArgListEntry SizeEntry(Size, Ty); + Args.push_back(SizeEntry); // FIXME: pass in SDLoc TargetLowering::CallLoweringInfo CLI(*this); @@ -6487,18 +6487,16 @@ MachinePointerInfo DstPtrInfo) { // Emit a library call. TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = getDataLayout().getIntPtrType(*getContext()); - Entry.Node = Dst; - Args.push_back(Entry); - - Entry.Ty = Type::getInt8Ty(*getContext()); - Entry.Node = Value; - Args.push_back(Entry); - - Entry.Ty = SizeTy; - Entry.Node = Size; - Args.push_back(Entry); + Type *Ty = getDataLayout().getIntPtrType(*getContext()); + TargetLowering::ArgListEntry DstEntry(Dst, Ty); + Args.push_back(DstEntry); + + Ty = Type::getInt8Ty(*getContext()); + TargetLowering::ArgListEntry ValueEntry(Value, Ty); + Args.push_back(ValueEntry); + + TargetLowering::ArgListEntry SizeEntry(Size, SizeTy); + Args.push_back(SizeEntry); RTLIB::Libcall LibraryCall = RTLIB::getMEMSET_ELEMENT_UNORDERED_ATOMIC(ElemSz); diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -2547,9 +2547,7 @@ assert(FnTy->getNumParams() == 1 && "Invalid function signature"); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Node = GuardVal; - Entry.Ty = FnTy->getParamType(0); + TargetLowering::ArgListEntry Entry(GuardVal, FnTy->getParamType(0)); if (GuardCheckFn->hasAttribute(1, Attribute::AttrKind::InReg)) Entry.IsInReg = true; Args.push_back(Entry); @@ -7085,16 +7083,13 @@ for (ImmutableCallSite::arg_iterator i = CS.arg_begin(), e = CS.arg_end(); i != e; ++i) { - TargetLowering::ArgListEntry Entry; const Value *V = *i; // Skip empty types if (V->getType()->isEmptyTy()) continue; - SDValue ArgNode = getValue(V); - Entry.Node = ArgNode; Entry.Ty = V->getType(); - + TargetLowering::ArgListEntry Entry(getValue(V), V->getType()); Entry.setAttributes(&CS, i - CS.arg_begin()); // Use swifterror virtual register as input to the call. @@ -7118,11 +7113,8 @@ // If call site has a cfguardtarget operand bundle, create and add an // additional ArgListEntry. if (auto Bundle = CS.getOperandBundle(LLVMContext::OB_cfguardtarget)) { - TargetLowering::ArgListEntry Entry; Value *V = Bundle->Inputs[0]; - SDValue ArgNode = getValue(V); - Entry.Node = ArgNode; - Entry.Ty = V->getType(); + TargetLowering::ArgListEntry Entry(getValue(V), V->getType()); Entry.IsCFGuardTarget = true; Args.push_back(Entry); } @@ -8591,9 +8583,7 @@ assert(!V->getType()->isEmptyTy() && "Empty type passed to intrinsic."); - TargetLowering::ArgListEntry Entry; - Entry.Node = getValue(V); - Entry.Ty = V->getType(); + TargetLowering::ArgListEntry Entry(getValue(V), V->getType()); Entry.setAttributes(Call, ArgI); Args.push_back(Entry); } @@ -8992,19 +8982,8 @@ DL.getAllocaAddrSpace()); DemoteStackSlot = CLI.DAG.getFrameIndex(DemoteStackIdx, getFrameIndexTy(DL)); - ArgListEntry Entry; - Entry.Node = DemoteStackSlot; - Entry.Ty = StackSlotPtrType; - Entry.IsSExt = false; - Entry.IsZExt = false; - Entry.IsInReg = false; + ArgListEntry Entry(DemoteStackSlot, StackSlotPtrType); Entry.IsSRet = true; - Entry.IsNest = false; - Entry.IsByVal = false; - Entry.IsReturned = false; - Entry.IsSwiftSelf = false; - Entry.IsSwiftError = false; - Entry.IsCFGuardTarget = false; Entry.Alignment = Align; CLI.getArgs().insert(CLI.getArgs().begin(), Entry); CLI.NumFixedArgs += 1; diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -130,11 +130,10 @@ TargetLowering::ArgListTy Args; Args.reserve(Ops.size()); - TargetLowering::ArgListEntry Entry; for (unsigned i = 0; i < Ops.size(); ++i) { SDValue NewOp = Ops[i]; - Entry.Node = NewOp; - Entry.Ty = Entry.Node.getValueType().getTypeForEVT(*DAG.getContext()); + Type *Ty = NewOp.getValueType().getTypeForEVT(*DAG.getContext()); + TargetLowering::ArgListEntry Entry(NewOp, Ty); Entry.IsSExt = shouldSignExtendTypeInLibCall(NewOp.getValueType(), CallOptions.IsSExt); Entry.IsZExt = !Entry.IsSExt; @@ -6978,14 +6977,12 @@ SDLoc dl(GA); ArgListTy Args; - ArgListEntry Entry; std::string NameString = ("__emutls_v." + GA->getGlobal()->getName()).str(); Module *VariableModule = const_cast(GA->getGlobal()->getParent()); StringRef EmuTlsVarName(NameString); GlobalVariable *EmuTlsVar = VariableModule->getNamedGlobal(EmuTlsVarName); assert(EmuTlsVar && "Cannot find EmuTlsVar "); - Entry.Node = DAG.getGlobalAddress(EmuTlsVar, dl, PtrVT); - Entry.Ty = VoidPtrType; + ArgListEntry Entry(DAG.getGlobalAddress(EmuTlsVar, dl, PtrVT), VoidPtrType); Args.push_back(Entry); SDValue EmuTlsGetAddr = DAG.getExternalSymbol("__emutls_get_address", PtrVT); diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -2636,13 +2636,7 @@ Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); ArgListTy Args; - ArgListEntry Entry; - - Entry.Node = Arg; - Entry.Ty = ArgTy; - Entry.IsSExt = false; - Entry.IsZExt = false; - Args.push_back(Entry); + Args.push_back(ArgListEntry(Arg, ArgTy)); RTLIB::Libcall LC = ArgVT == MVT::f64 ? RTLIB::SINCOS_STRET_F64 : RTLIB::SINCOS_STRET_F32; diff --git a/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp b/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp --- a/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp @@ -34,12 +34,10 @@ EVT IntPtr = TLI.getPointerTy(DAG.getDataLayout()); Type *IntPtrTy = Type::getInt8PtrTy(*DAG.getContext()); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Node = Dst; - Entry.Ty = IntPtrTy; - Args.push_back(Entry); - Entry.Node = Size; - Args.push_back(Entry); + TargetLowering::ArgListEntry DstEntry(Dst, IntPtrTy); + Args.push_back(DstEntry); + TargetLowering::ArgListEntry SizeEntry(Size, IntPtrTy); + Args.push_back(SizeEntry); TargetLowering::CallLoweringInfo CLI(DAG); CLI.setDebugLoc(dl) .setChain(Chain) diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -3228,9 +3228,7 @@ // call __tls_get_addr. ArgListTy Args; - ArgListEntry Entry; - Entry.Node = Argument; - Entry.Ty = (Type *) Type::getInt32Ty(*DAG.getContext()); + ArgListEntry Entry(Argument, Type::getInt32Ty(*DAG.getContext())); Args.push_back(Entry); // FIXME: is there useful debug info available here? @@ -8885,22 +8883,13 @@ int FrameIdx = MFI.CreateStackObject(ByteSize, StackAlign, false); SRet = DAG.getFrameIndex(FrameIdx, TLI.getPointerTy(DL)); - ArgListEntry Entry; - Entry.Node = SRet; - Entry.Ty = RetTy->getPointerTo(); - Entry.IsSExt = false; - Entry.IsZExt = false; + ArgListEntry Entry(SRet, RetTy->getPointerTo()); Entry.IsSRet = true; Args.push_back(Entry); RetTy = Type::getVoidTy(*DAG.getContext()); } - ArgListEntry Entry; - Entry.Node = Arg; - Entry.Ty = ArgTy; - Entry.IsSExt = false; - Entry.IsZExt = false; - Args.push_back(Entry); + Args.push_back(ArgListEntry(Arg, ArgTy)); RTLIB::Libcall LC = (ArgVT == MVT::f64) ? RTLIB::SINCOS_STRET_F64 : RTLIB::SINCOS_STRET_F32; @@ -8954,10 +8943,9 @@ ARMTargetLowering::ArgListTy Args; for (auto AI : {1, 0}) { - ArgListEntry Arg; - Arg.Node = Op.getOperand(AI); - Arg.Ty = Arg.Node.getValueType().getTypeForEVT(*DAG.getContext()); - Args.push_back(Arg); + SDValue Arg = Op.getOperand(AI); + Type *ArgTy = Arg.getValueType().getTypeForEVT(*DAG.getContext()); + Args.push_back(ArgListEntry(Arg, ArgTy)); } CallLoweringInfo CLI(DAG); @@ -16152,12 +16140,10 @@ bool isSigned = N->getOpcode() == ISD::SDIVREM || N->getOpcode() == ISD::SREM; TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { EVT ArgVT = N->getOperand(i).getValueType(); Type *ArgTy = ArgVT.getTypeForEVT(*Context); - Entry.Node = N->getOperand(i); - Entry.Ty = ArgTy; + TargetLowering::ArgListEntry Entry(N->getOperand(i), ArgTy); Entry.IsSExt = isSigned; Entry.IsZExt = !isSigned; Args.push_back(Entry); diff --git a/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp b/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp --- a/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp +++ b/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp @@ -72,19 +72,18 @@ AlignVariant = ALIGN1; TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = DAG.getDataLayout().getIntPtrType(*DAG.getContext()); - Entry.Node = Dst; - Args.push_back(Entry); + Type *Ty = DAG.getDataLayout().getIntPtrType(*DAG.getContext()); + TargetLowering::ArgListEntry DstEntry(Dst, Ty); + Args.push_back(DstEntry); if (AEABILibcall == AEABI_MEMCLR) { - Entry.Node = Size; - Args.push_back(Entry); + TargetLowering::ArgListEntry SizeEntry(Size, Ty); + Args.push_back(SizeEntry); } else if (AEABILibcall == AEABI_MEMSET) { // Adjust parameters for memset, EABI uses format (ptr, size, value), // GNU library uses (ptr, value, size) // See RTABI section 4.3.4 - Entry.Node = Size; - Args.push_back(Entry); + TargetLowering::ArgListEntry SizeEntry(Size, Ty); + Args.push_back(SizeEntry); // Extend or truncate the argument to be an i32 value for the call. if (Src.getValueType().bitsGT(MVT::i32)) @@ -92,16 +91,15 @@ else if (Src.getValueType().bitsLT(MVT::i32)) Src = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); - Entry.Node = Src; - Entry.Ty = Type::getInt32Ty(*DAG.getContext()); - Entry.IsSExt = false; - Args.push_back(Entry); + Ty = Type::getInt32Ty(*DAG.getContext()); + TargetLowering::ArgListEntry SrcEntry(Src, Ty); + Args.push_back(SrcEntry); } else { - Entry.Node = Src; - Args.push_back(Entry); + TargetLowering::ArgListEntry SrcEntry(Src, Ty); + Args.push_back(SrcEntry); - Entry.Node = Size; - Args.push_back(Entry); + TargetLowering::ArgListEntry SizeEntry(Size, Ty); + Args.push_back(SizeEntry); } char const *FunctionNames[4][3] = { diff --git a/llvm/lib/Target/AVR/AVRISelLowering.cpp b/llvm/lib/Target/AVR/AVRISelLowering.cpp --- a/llvm/lib/Target/AVR/AVRISelLowering.cpp +++ b/llvm/lib/Target/AVR/AVRISelLowering.cpp @@ -368,10 +368,9 @@ SDValue InChain = DAG.getEntryNode(); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; for (SDValue const &Value : Op->op_values()) { - Entry.Node = Value; - Entry.Ty = Value.getValueType().getTypeForEVT(*DAG.getContext()); + Type *Ty = Value.getValueType().getTypeForEVT(*DAG.getContext()); + TargetLowering::ArgListEntry Entry(Value, Ty); Entry.IsSExt = IsSigned; Entry.IsZExt = !IsSigned; Args.push_back(Entry); diff --git a/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp b/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp --- a/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp +++ b/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp @@ -32,14 +32,13 @@ // const TargetLowering &TLI = *DAG.getSubtarget().getTargetLowering(); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = DAG.getDataLayout().getIntPtrType(*DAG.getContext()); - Entry.Node = Dst; - Args.push_back(Entry); - Entry.Node = Src; - Args.push_back(Entry); - Entry.Node = Size; - Args.push_back(Entry); + Type *Ty = DAG.getDataLayout().getIntPtrType(*DAG.getContext()); + TargetLowering::ArgListEntry DstEntry(Dst, Ty); + Args.push_back(DstEntry); + TargetLowering::ArgListEntry SrcEntry(Src, Ty); + Args.push_back(SrcEntry); + TargetLowering::ArgListEntry SizeEntry(Size, Ty); + Args.push_back(SizeEntry); const char *SpecialMemcpyName = "__hexagon_memcpy_likely_aligned_min32bytes_mult8bytes"; diff --git a/llvm/lib/Target/Mips/MipsCallLowering.cpp b/llvm/lib/Target/Mips/MipsCallLowering.cpp --- a/llvm/lib/Target/Mips/MipsCallLowering.cpp +++ b/llvm/lib/Target/Mips/MipsCallLowering.cpp @@ -589,9 +589,7 @@ SmallVector OrigArgIndices; unsigned i = 0; for (auto &Arg : Info.OrigArgs) { - - TargetLowering::ArgListEntry Entry; - Entry.Ty = Arg.Ty; + TargetLowering::ArgListEntry Entry(SDValue(), Arg.Ty); FuncOrigArgs.push_back(Entry); ArgInfos.push_back(Arg); diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -2157,10 +2157,7 @@ SDValue TlsGetAddr = DAG.getExternalSymbol("__tls_get_addr", PtrVT); ArgListTy Args; - ArgListEntry Entry; - Entry.Node = Argument; - Entry.Ty = PtrTy; - Args.push_back(Entry); + Args.push_back(ArgListEntry(Argument, PtrTy)); TargetLowering::CallLoweringInfo CLI(DAG); CLI.setDebugLoc(DL) diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -3202,18 +3202,20 @@ Type *IntPtrTy = DAG.getDataLayout().getIntPtrType(*DAG.getContext()); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = IntPtrTy; - Entry.Node = Trmp; Args.push_back(Entry); + TargetLowering::ArgListEntry TrmpEntry(Trmp, IntPtrTy); + Args.push_back(TrmpEntry); // TrampSize == (isPPC64 ? 48 : 40); - Entry.Node = DAG.getConstant(isPPC64 ? 48 : 40, dl, - isPPC64 ? MVT::i64 : MVT::i32); - Args.push_back(Entry); - - Entry.Node = FPtr; Args.push_back(Entry); - Entry.Node = Nest; Args.push_back(Entry); + SDValue Size = + DAG.getConstant(isPPC64 ? 48 : 40, dl, isPPC64 ? MVT::i64 : MVT::i32); + TargetLowering::ArgListEntry SizeEntry(Size, IntPtrTy); + Args.push_back(SizeEntry); + + TargetLowering::ArgListEntry FPtrEntry(FPtr, IntPtrTy); + Args.push_back(FPtrEntry); + TargetLowering::ArgListEntry NestEntry(Nest, IntPtrTy); + Args.push_back(NestEntry); // Lower to a call to __trampoline_setup(Trmp, TrampSize, FPtr, ctx_reg) TargetLowering::CallLoweringInfo CLI(DAG); diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -558,10 +558,7 @@ // Prepare argument list to generate call. ArgListTy Args; - ArgListEntry Entry; - Entry.Node = Load; - Entry.Ty = CallTy; - Args.push_back(Entry); + Args.push_back(ArgListEntry(Load, CallTy)); // Setup call to __tls_get_addr. TargetLowering::CallLoweringInfo CLI(DAG); diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp --- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp +++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp @@ -2125,21 +2125,19 @@ EVT ArgVT = Arg.getValueType(); Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); - ArgListEntry Entry; - Entry.Node = Arg; - Entry.Ty = ArgTy; - if (ArgTy->isFP128Ty()) { // Create a stack object and pass the pointer to the library function. int FI = MFI.CreateStackObject(16, 8, false); SDValue FIPtr = DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout())); - Chain = DAG.getStore(Chain, DL, Entry.Node, FIPtr, MachinePointerInfo(), + Chain = DAG.getStore(Chain, DL, Arg, FIPtr, MachinePointerInfo(), /* Alignment = */ 8); - Entry.Node = FIPtr; - Entry.Ty = PointerType::getUnqual(ArgTy); + ArgListEntry Entry(FIPtr, PointerType::getUnqual(ArgTy)); + Args.push_back(Entry); + } else { + ArgListEntry Entry(Arg, ArgTy); + Args.push_back(Entry); } - Args.push_back(Entry); return Chain; } @@ -2161,14 +2159,11 @@ if (RetTy->isFP128Ty()) { // Create a Stack Object to receive the return value of type f128. - ArgListEntry Entry; int RetFI = MFI.CreateStackObject(16, 8, false); RetPtr = DAG.getFrameIndex(RetFI, PtrVT); - Entry.Node = RetPtr; - Entry.Ty = PointerType::getUnqual(RetTy); + ArgListEntry Entry(RetPtr, PointerType::getUnqual(RetTy)); if (!Subtarget->is64Bit()) Entry.IsSRet = true; - Entry.IsReturned = false; Args.push_back(Entry); RetTyABI = Type::getVoidTy(*DAG.getContext()); } diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -26129,19 +26129,15 @@ SDValue InChain = DAG.getEntryNode(); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; for (unsigned i = 0, e = Op->getNumOperands(); i != e; ++i) { EVT ArgVT = Op->getOperand(i).getValueType(); assert(ArgVT.isInteger() && ArgVT.getSizeInBits() == 128 && "Unexpected argument type for lowering"); SDValue StackPtr = DAG.CreateStackTemporary(ArgVT, 16); - Entry.Node = StackPtr; InChain = DAG.getStore(InChain, dl, Op->getOperand(i), StackPtr, MachinePointerInfo(), /* Alignment = */ 16); Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); - Entry.Ty = PointerType::get(ArgTy,0); - Entry.IsSExt = false; - Entry.IsZExt = false; + TargetLowering::ArgListEntry Entry(StackPtr, PointerType::get(ArgTy, 0)); Args.push_back(Entry); } @@ -28016,12 +28012,8 @@ Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Node = Arg; - Entry.Ty = ArgTy; - Entry.IsSExt = false; - Entry.IsZExt = false; + TargetLowering::ArgListEntry Entry(Arg, ArgTy); Args.push_back(Entry); bool isF64 = ArgVT == MVT::f64; diff --git a/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp b/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp --- a/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp +++ b/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp @@ -77,12 +77,10 @@ EVT IntPtr = TLI.getPointerTy(DAG.getDataLayout()); Type *IntPtrTy = DAG.getDataLayout().getIntPtrType(*DAG.getContext()); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Node = Dst; - Entry.Ty = IntPtrTy; - Args.push_back(Entry); - Entry.Node = Size; - Args.push_back(Entry); + TargetLowering::ArgListEntry DstEntry(Dst, IntPtrTy); + Args.push_back(DstEntry); + TargetLowering::ArgListEntry SizeEntry(Size, IntPtrTy); + Args.push_back(SizeEntry); TargetLowering::CallLoweringInfo CLI(DAG); CLI.setDebugLoc(dl) diff --git a/llvm/lib/Target/XCore/XCoreISelLowering.cpp b/llvm/lib/Target/XCore/XCoreISelLowering.cpp --- a/llvm/lib/Target/XCore/XCoreISelLowering.cpp +++ b/llvm/lib/Target/XCore/XCoreISelLowering.cpp @@ -465,10 +465,8 @@ // Lower to a call to __misaligned_load(BasePtr). Type *IntPtrTy = DAG.getDataLayout().getIntPtrType(Context); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = IntPtrTy; - Entry.Node = BasePtr; + TargetLowering::ArgListEntry Entry(BasePtr, IntPtrTy); Args.push_back(Entry); TargetLowering::CallLoweringInfo CLI(DAG); @@ -516,14 +514,12 @@ // Lower to a call to __misaligned_store(BasePtr, Value). Type *IntPtrTy = DAG.getDataLayout().getIntPtrType(Context); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = IntPtrTy; - Entry.Node = BasePtr; - Args.push_back(Entry); + TargetLowering::ArgListEntry BaseEntry(BasePtr, IntPtrTy); + Args.push_back(BaseEntry); - Entry.Node = Value; - Args.push_back(Entry); + TargetLowering::ArgListEntry ValueEntry(Value, IntPtrTy); + Args.push_back(ValueEntry); TargetLowering::CallLoweringInfo CLI(DAG); CLI.setDebugLoc(dl).setChain(Chain).setCallee( diff --git a/llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp b/llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp --- a/llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp +++ b/llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp @@ -25,11 +25,13 @@ DAG.MaskedValueIsZero(Size, APInt(SizeBitWidth, 3))) { const TargetLowering &TLI = *DAG.getSubtarget().getTargetLowering(); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = DAG.getDataLayout().getIntPtrType(*DAG.getContext()); - Entry.Node = Dst; Args.push_back(Entry); - Entry.Node = Src; Args.push_back(Entry); - Entry.Node = Size; Args.push_back(Entry); + Type *Ty = DAG.getDataLayout().getIntPtrType(*DAG.getContext()); + TargetLowering::ArgListEntry DstEntry(Dst, Ty); + Args.push_back(DstEntry); + TargetLowering::ArgListEntry SrcEntry(Src, Ty); + Args.push_back(SrcEntry); + TargetLowering::ArgListEntry SizeEntry(Size, Ty); + Args.push_back(SizeEntry); TargetLowering::CallLoweringInfo CLI(DAG); CLI.setDebugLoc(dl)