diff --git a/mlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.td b/mlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.td
--- a/mlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.td
+++ b/mlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.td
@@ -16,15 +16,17 @@
 include "mlir/Dialect/StandardOps/Ops.td"
 include "mlir/Dialect/SPIRV/SPIRVOps.td"
 
-class BinaryOpPattern<Op src, Op tgt> :
-      Pat<(src SPV_ScalarOrVector:$l, SPV_ScalarOrVector:$r),
+class BinaryOpPattern<Type type, Op src, Op tgt> :
+      Pat<(src SPV_ScalarOrVectorOf<type>:$l, SPV_ScalarOrVectorOf<type>:$r),
           (tgt $l, $r)>;
 
-def : BinaryOpPattern<AddFOp, SPV_FAddOp>;
-def : BinaryOpPattern<DivFOp, SPV_FDivOp>;
-def : BinaryOpPattern<MulFOp, SPV_FMulOp>;
-def : BinaryOpPattern<RemFOp, SPV_FRemOp>;
-def : BinaryOpPattern<SubFOp, SPV_FSubOp>;
+def : BinaryOpPattern<SPV_Bool, AndOp, SPV_LogicalAndOp>;
+def : BinaryOpPattern<SPV_Bool, OrOp, SPV_LogicalOrOp>;
+def : BinaryOpPattern<SPV_Float, AddFOp, SPV_FAddOp>;
+def : BinaryOpPattern<SPV_Float, DivFOp, SPV_FDivOp>;
+def : BinaryOpPattern<SPV_Float, MulFOp, SPV_FMulOp>;
+def : BinaryOpPattern<SPV_Float, RemFOp, SPV_FRemOp>;
+def : BinaryOpPattern<SPV_Float, SubFOp, SPV_FSubOp>;
 
 // Constant Op
 // TODO(ravishankarm): Handle lowering other constant types.
diff --git a/mlir/test/Conversion/StandardToSPIRV/std-to-spirv.mlir b/mlir/test/Conversion/StandardToSPIRV/std-to-spirv.mlir
--- a/mlir/test/Conversion/StandardToSPIRV/std-to-spirv.mlir
+++ b/mlir/test/Conversion/StandardToSPIRV/std-to-spirv.mlir
@@ -135,6 +135,46 @@
 }
 
 //===----------------------------------------------------------------------===//
+// std logical binary operations
+//===----------------------------------------------------------------------===//
+
+// CHECK-LABEL: @logical_scalar
+func @logical_scalar(%arg0 : i1, %arg1 : i1) {
+  // CHECK: spv.LogicalAnd
+  %0 = and %arg0, %arg1 : i1
+  // CHECK: spv.LogicalOr
+  %1 = or %arg0, %arg1 : i1
+  return
+}
+
+// CHECK-LABEL: @logical_vector
+func @logical_vector(%arg0 : vector<4xi1>, %arg1 : vector<4xi1>) {
+  // CHECK: spv.LogicalAnd
+  %0 = and %arg0, %arg1 : vector<4xi1>
+  // CHECK: spv.LogicalOr
+  %1 = or %arg0, %arg1 : vector<4xi1>
+  return
+}
+
+// CHECK-LABEL: @logical_scalar_fail
+func @logical_scalar_fail(%arg0 : i32, %arg1 : i32) {
+  // CHECK-NOT: spv.LogicalAnd
+  %0 = and %arg0, %arg1 : i32
+  // CHECK-NOT: spv.LogicalOr
+  %1 = or %arg0, %arg1 : i32
+  return
+}
+
+// CHECK-LABEL: @logical_vector_fail
+func @logical_vector_fail(%arg0 : vector<4xi32>, %arg1 : vector<4xi32>) {
+  // CHECK-NOT: spv.LogicalAnd
+  %0 = and %arg0, %arg1 : vector<4xi32>
+  // CHECK-NOT: spv.LogicalOr
+  %1 = or %arg0, %arg1 : vector<4xi32>
+  return
+}
+
+//===----------------------------------------------------------------------===//
 // std.select
 //===----------------------------------------------------------------------===//