Index: llvm/lib/Target/Hexagon/BitTracker.cpp =================================================================== --- llvm/lib/Target/Hexagon/BitTracker.cpp +++ llvm/lib/Target/Hexagon/BitTracker.cpp @@ -860,7 +860,7 @@ << " cell: " << ME.getCell(RU, Map) << "\n"; } dbgs() << "Outputs:\n"; - for (const std::pair &P : ResMap) { + for (const std::pair &P : ResMap) { RegisterRef RD(P.first); dbgs() << " " << printReg(P.first, &ME.TRI) << " cell: " << ME.getCell(RD, ResMap) << "\n"; Index: llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp =================================================================== --- llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp +++ llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp @@ -555,7 +555,7 @@ LLVM_ATTRIBUTE_UNUSED raw_ostream &operator<< (raw_ostream &OS, const PrintIMap &P) { OS << "{\n"; - for (const std::pair &Q : P.IMap) { + for (const std::pair &Q : P.IMap) { OS << " " << PrintInit(Q.first, P.HRI) << " -> {"; for (unsigned I : Q.second) OS << ' ' << I; @@ -1895,7 +1895,7 @@ LocDefList Defs; bool Changed = false; - for (const std::pair &P : IMap) { + for (const std::pair &P : IMap) { const IndexList &Idxs = P.second; if (Idxs.size() < CountThreshold) continue; Index: llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp =================================================================== --- llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp +++ llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp @@ -2335,7 +2335,7 @@ continue; if (!Worklist.count(&In) && In.mayHaveSideEffects()) return false; - for (const auto &K : In.users()) { + for (const auto K : In.users()) { Instruction *UseI = dyn_cast(K); if (!UseI) continue; Index: llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp =================================================================== --- llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp +++ llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp @@ -309,7 +309,7 @@ // r0 = ... // J2_jumpr r0 if (DepType == SDep::Data) { - for (const MachineOperand MO : MI.operands()) + for (const MachineOperand &MO : MI.operands()) if (MO.isReg() && MO.getReg() == DepReg && !MO.isImplicit()) return true; } Index: llvm/lib/Target/Hexagon/RDFLiveness.cpp =================================================================== --- llvm/lib/Target/Hexagon/RDFLiveness.cpp +++ llvm/lib/Target/Hexagon/RDFLiveness.cpp @@ -620,7 +620,7 @@ for (NodeAddr UA : PUs) { std::map &PUM = PhiUp[UA.Id]; RegisterRef UR = PRI.normalize(UA.Addr->getRegRef(DFG)); - for (const std::pair &P : PUM) { + for (const std::pair &P : PUM) { bool Changed = false; const RegisterAggr &MidDefs = P.second; @@ -636,7 +636,7 @@ // if MidDefs does not cover (R,U) // then add (R-MidDefs,U) to RealUseMap[P] // - for (const std::pair &T : RUM) { + for (const std::pair &T : RUM) { RegisterRef R(T.first); // The current phi (PA) could be a phi for a regmask. It could // reach a whole variety of uses that are not related to the @@ -768,7 +768,7 @@ auto PrA = DFG.addr(PUA.Addr->getPredecessor()); RefMap &LOX = PhiLOX[PrA.Addr->getCode()]; - for (const std::pair &RS : RUs) { + for (const std::pair &RS : RUs) { // We need to visit each individual use. for (std::pair P : RS.second) { // Create a register ref corresponding to the use, and find @@ -991,7 +991,7 @@ RefMap LiveInCopy = LiveIn; LiveIn.clear(); - for (const std::pair &LE : LiveInCopy) { + for (const std::pair &LE : LiveInCopy) { RegisterRef LRef(LE.first); NodeRefSet &NewDefs = LiveIn[LRef.Reg]; // To be filled. const NodeRefSet &OldDefs = LE.second; @@ -1105,7 +1105,7 @@ for (auto C : IIDF[B]) { RegisterAggr &LiveC = LiveMap[C]; - for (const std::pair &S : LiveIn) + for (const std::pair &S : LiveIn) for (auto R : S.second) if (MDT.properlyDominates(getBlockWithRef(R.first), C)) LiveC.insert(RegisterRef(S.first, R.second));