diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td @@ -809,32 +809,50 @@ // v8.3a Pointer Authentication // These instructions inhabit part of the hint space and so can be used for -// armv8 targets +// armv8 targets. Keeping the old HINT mnemonic when compiling without PA is +// important for compatibility with other assemblers (e.g. GAS) when building +// software compatible with both CPUs that do or don't implement PA. let Uses = [LR], Defs = [LR] in { - def PACIAZ : SystemNoOperands<0b000, "paciaz">; - def PACIBZ : SystemNoOperands<0b010, "pacibz">; - def AUTIAZ : SystemNoOperands<0b100, "autiaz">; - def AUTIBZ : SystemNoOperands<0b110, "autibz">; + def PACIAZ : SystemNoOperands<0b000, "hint #24">; + def PACIBZ : SystemNoOperands<0b010, "hint #26">; + def AUTIAZ : SystemNoOperands<0b100, "hint #28">; + def AUTIBZ : SystemNoOperands<0b110, "hint #30">; } let Uses = [LR, SP], Defs = [LR] in { - def PACIASP : SystemNoOperands<0b001, "paciasp">; - def PACIBSP : SystemNoOperands<0b011, "pacibsp">; - def AUTIASP : SystemNoOperands<0b101, "autiasp">; - def AUTIBSP : SystemNoOperands<0b111, "autibsp">; + def PACIASP : SystemNoOperands<0b001, "hint #25">; + def PACIBSP : SystemNoOperands<0b011, "hint #27">; + def AUTIASP : SystemNoOperands<0b101, "hint #29">; + def AUTIBSP : SystemNoOperands<0b111, "hint #31">; } let Uses = [X16, X17], Defs = [X17], CRm = 0b0001 in { - def PACIA1716 : SystemNoOperands<0b000, "pacia1716">; - def PACIB1716 : SystemNoOperands<0b010, "pacib1716">; - def AUTIA1716 : SystemNoOperands<0b100, "autia1716">; - def AUTIB1716 : SystemNoOperands<0b110, "autib1716">; + def PACIA1716 : SystemNoOperands<0b000, "hint #8">; + def PACIB1716 : SystemNoOperands<0b010, "hint #10">; + def AUTIA1716 : SystemNoOperands<0b100, "hint #12">; + def AUTIB1716 : SystemNoOperands<0b110, "hint #14">; } let Uses = [LR], Defs = [LR], CRm = 0b0000 in { - def XPACLRI : SystemNoOperands<0b111, "xpaclri">; + def XPACLRI : SystemNoOperands<0b111, "hint #7">; } -// These pointer authentication isntructions require armv8.3a +// These pointer authentication instructions require armv8.3a let Predicates = [HasPA] in { + + // When compiling with PA, there is a better mnemonic for these instructions. + def : InstAlias<"paciaz", (PACIAZ), 1>; + def : InstAlias<"pacibz", (PACIBZ), 1>; + def : InstAlias<"autiaz", (AUTIAZ), 1>; + def : InstAlias<"autibz", (AUTIBZ), 1>; + def : InstAlias<"paciasp", (PACIASP), 1>; + def : InstAlias<"pacibsp", (PACIBSP), 1>; + def : InstAlias<"autiasp", (AUTIASP), 1>; + def : InstAlias<"autibsp", (AUTIBSP), 1>; + def : InstAlias<"pacia1716", (PACIA1716), 1>; + def : InstAlias<"pacib1716", (PACIB1716), 1>; + def : InstAlias<"autia1716", (AUTIA1716), 1>; + def : InstAlias<"autib1716", (AUTIB1716), 1>; + def : InstAlias<"xpaclri", (XPACLRI), 1>; + multiclass SignAuth prefix, bits<3> prefix_z, string asm> { def IA : SignAuthOneData; def IB : SignAuthOneData; diff --git a/llvm/test/CodeGen/AArch64/sign-return-address.ll b/llvm/test/CodeGen/AArch64/sign-return-address.ll --- a/llvm/test/CodeGen/AArch64/sign-return-address.ll +++ b/llvm/test/CodeGen/AArch64/sign-return-address.ll @@ -1,4 +1,5 @@ -; RUN: llc -mtriple=aarch64-none-eabi < %s | FileCheck %s +; RUN: llc -mtriple=aarch64-none-eabi < %s | FileCheck %s +; RUN: llc -mtriple=aarch64-none-eabi -mattr=v8.3a < %s | FileCheck --check-prefix CHECK-V83A %s ; CHECK-LABEL: @leaf ; CHECK-NOT: paci{{[a,b]}}sp @@ -22,19 +23,23 @@ } ; CHECK-LABEL: @leaf_sign_all -; CHECK: paciasp -; CHECK: autiasp -; CHECK: ret +; CHECK: hint #25 +; CHECK: hint #29 +; CHECK: ret +; CHECK-V83A: paciasp +; CHECK-V83A: retaa define i32 @leaf_sign_all(i32 %x) "sign-return-address"="all" { ret i32 %x } -; CHECK: @leaf_clobbers_lr -; CHECK: paciasp -; CHECK: str x30, [sp, #-16]! -; CHECK: ldr x30, [sp], #16 -; CHECK-NEXT: autiasp -; CHECK: ret +; CHECK: @leaf_clobbers_lr +; CHECK: hint #25 +; CHECK-V83A: paciasp +; CHECK, CHECK-V32A: str x30, [sp, #-16]! +; CHECK, CHECK-V32A: ldr x30, [sp], #16 +; CHECK: hint #29 +; CHECK: ret +; CHECK-V32A-NEXT: retaa define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" { call void asm sideeffect "mov x30, $0", "r,~{lr}"(i64 %x) #1 ret i64 %x @@ -42,21 +47,25 @@ declare i32 @foo(i32) -; CHECK: @non_leaf_sign_all -; CHECK: paciasp -; CHECK: autiasp -; CHECK: ret +; CHECK: @non_leaf_sign_all +; CHECK: hint #25 +; CHECK: hint #29 +; CHECK: ret +; CHECK-V83A: paciasp +; CHECK-V83A: retaa define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" { %call = call i32 @foo(i32 %x) ret i32 %call } -; CHECK: @non_leaf_sign_non_leaf -; CHECK: paciasp -; CHECK: str x30, [sp, #-16]! -; CHECK: ldr x30, [sp], #16 -; CHECK: autiasp -; CHECK: ret +; CHECK: @non_leaf_sign_non_leaf +; CHECK: hint #25 +; CHECK-V83A: paciasp +; CHECK, CHECK-V83A: str x30, [sp, #-16]! +; CHECK, CHECK-V83A: ldr x30, [sp], #16 +; CHECK: hint #29 +; CHECK: ret +; CHECK-V83A: retaa define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" { %call = call i32 @foo(i32 %x) ret i32 %call @@ -73,12 +82,14 @@ declare fastcc i64 @bar(i64) -; CHECK-LABEL: @spill_lr_and_tail_call -; CHECK: paciasp -; CHECK: str x30, [sp, #-16]! -; CHECK: ldr x30, [sp], #16 -; CHECK: autiasp -; CHECK: b bar +; CHECK-LABEL: @spill_lr_and_tail_call +; CHECK: hint #25 +; CHECK-V83A: paciasp +; CHECK, CHECK-V83A: str x30, [sp, #-16]! +; CHECK, CHECK-V83A: ldr x30, [sp], #16 +; CHECK-V83A: autiasp +; CHECK: hint #29 +; CHECK: b bar define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" { call void asm sideeffect "mov x30, $0", "r,~{lr}"(i64 %x) #1 tail call fastcc i64 @bar(i64 %x) @@ -86,15 +97,19 @@ } ; CHECK-LABEL: @leaf_sign_all_a_key -; CHECK: paciasp -; CHECK: autiasp +; CHECK: hint #25 +; CHECK: hint #29 +; CHECK-V83A: paciasp +; CHECK-V83A: retaa define i32 @leaf_sign_all_a_key(i32 %x) "sign-return-address"="all" "sign-return-address-key"="a_key" { ret i32 %x } ; CHECK-LABEL: @leaf_sign_all_b_key -; CHECK: pacibsp -; CHECK: autibsp +; CHECK: hint #27 +; CHECK: hint #31 +; CHECK-V83A: pacibsp +; CHECK-V83A: retab define i32 @leaf_sign_all_b_key(i32 %x) "sign-return-address"="all" "sign-return-address-key"="b_key" { ret i32 %x } diff --git a/llvm/test/CodeGen/AArch64/speculation-hardening-dagisel.ll b/llvm/test/CodeGen/AArch64/speculation-hardening-dagisel.ll --- a/llvm/test/CodeGen/AArch64/speculation-hardening-dagisel.ll +++ b/llvm/test/CodeGen/AArch64/speculation-hardening-dagisel.ll @@ -18,7 +18,7 @@ ; NOSLH-NOT: dsb sy ; NOSLH-NOT: isb if.then: - %0 = tail call i64 asm "autia1716", "={x17},{x16},0"(i64 %b, i64 %a) + %0 = tail call i64 asm "hint #12", "={x17},{x16},0"(i64 %b, i64 %a) ; CHECK: bl g ; SLH: dsb sy ; SLH: isb diff --git a/llvm/test/CodeGen/AArch64/speculation-hardening-loads.ll b/llvm/test/CodeGen/AArch64/speculation-hardening-loads.ll --- a/llvm/test/CodeGen/AArch64/speculation-hardening-loads.ll +++ b/llvm/test/CodeGen/AArch64/speculation-hardening-loads.ll @@ -90,7 +90,7 @@ ; CHECK: dsb sy ; CHECK: isb entry: - %0 = tail call i64 asm "autia1716", "={x17},{x16},0"(i64 %b, i64 %a) + %0 = tail call i64 asm "hint #12", "={x17},{x16},0"(i64 %b, i64 %a) %X = load i64, i64* %p, align 8 %ret = add i64 %X, %0 ; CHECK-NOT: csdb diff --git a/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s b/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s --- a/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s +++ b/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s @@ -1,8 +1,8 @@ // RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.3a -o - %s 2>&1 | \ // RUN: FileCheck --check-prefixes=CHECK,ALL %s -// RUN: not llvm-mc -triple aarch64-none-linux-gnu %s -o - > %t.1 2>%t.2 -// RUN: FileCheck --check-prefixes=ALL,NOENC %s < %t.1 +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding %s -o - > %t.1 2>%t.2 +// RUN: FileCheck --check-prefixes=ALL %s < %t.1 // RUN: FileCheck --check-prefix=CHECK-REQ %s < %t.2 // ALL: .text @@ -98,43 +98,56 @@ // ALL-EMPTY: paciasp // CHECK-NEXT: paciasp // encoding: [0x3f,0x23,0x03,0xd5] -// NOENC-NEXT: paciasp +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: paciasp autiasp // CHECK-NEXT: autiasp // encoding: [0xbf,0x23,0x03,0xd5] -// NOENC-NEXT: autiasp +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: autiasp paciaz // CHECK-NEXT: paciaz // encoding: [0x1f,0x23,0x03,0xd5] -// NOENC-NEXT: paciaz +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: paciaz autiaz // CHECK-NEXT: autiaz // encoding: [0x9f,0x23,0x03,0xd5] -// NOENC-NEXT: autiaz +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: autiaz pacia1716 // CHECK-NEXT: pacia1716 // encoding: [0x1f,0x21,0x03,0xd5] -// NOENC-NEXT: pacia1716 +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: pacia1716 autia1716 // CHECK-NEXT: autia1716 // encoding: [0x9f,0x21,0x03,0xd5] -// NOENC-NEXT: autia1716 +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: autia1716 pacibsp // CHECK-NEXT: pacibsp // encoding: [0x7f,0x23,0x03,0xd5] -// NOENC-NEXT: pacibsp +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: pacibsp autibsp // CHECK-NEXT: autibsp // encoding: [0xff,0x23,0x03,0xd5] -// NOENC-NEXT: autibsp +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: autibsp pacibz // CHECK-NEXT: pacibz // encoding: [0x5f,0x23,0x03,0xd5] -// NOENC-NEXT: pacibz +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: pacibz autibz // CHECK-NEXT: autibz // encoding: [0xdf,0x23,0x03,0xd5] -// NOENC-NEXT: autibz +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: autibz pacib1716 // CHECK-NEXT: pacib1716 // encoding: [0x5f,0x21,0x03,0xd5] -// NOENC-NEXT: pacib1716 +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: pacib1716 autib1716 // CHECK-NEXT: autib1716 // encoding: [0xdf,0x21,0x03,0xd5] -// NOENC-NEXT: autib1716 +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: autib1716 xpaclri -// CHECK-NEXT: xpaclri // encoding: [0xff,0x20,0x03,0xd5] -// NOENC-NEXT: xpaclri +// CHECK-NEXT: xpaclri // encoding: [0xff,0x20,0x03,0xd5] +// CHECK-REQ: error: instruction requires: pa +// CHECK-REQ-NEXT: xpaclri // ALL-EMPTY: pacia x0, x1