diff --git a/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp b/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
--- a/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
+++ b/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
@@ -53,6 +53,13 @@
   // Gets a hashable artifact from a given MachineOperand (ie an unsigned).
   auto GetHashableMO = [this](const MachineOperand &MO) -> unsigned {
     switch (MO.getType()) {
+    case MachineOperand::MO_CImmediate:
+      return hash_combine(MO.getType(), MO.getTargetFlags(),
+                          MO.getCImm()->getZExtValue());
+    case MachineOperand::MO_FPImmediate:
+      return hash_combine(
+          MO.getType(), MO.getTargetFlags(),
+          MO.getFPImm()->getValueAPF().bitcastToAPInt().getZExtValue());
     case MachineOperand::MO_Immediate:
       return MO.getImm();
     case MachineOperand::MO_TargetIndex:
@@ -70,8 +77,6 @@
 
     // TODO: Handle the following Immediate/Index/ID/Predicate cases. They can
     // be hashed on in a stable manner.
-    case MachineOperand::MO_CImmediate:
-    case MachineOperand::MO_FPImmediate:
     case MachineOperand::MO_FrameIndex:
     case MachineOperand::MO_ConstantPoolIndex:
     case MachineOperand::MO_JumpTableIndex:
diff --git a/llvm/test/CodeGen/MIR/Generic/CFPImmMIRCanonHash.mir b/llvm/test/CodeGen/MIR/Generic/CFPImmMIRCanonHash.mir
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/Generic/CFPImmMIRCanonHash.mir
@@ -0,0 +1,14 @@
+# RUN: llc -run-pass mir-canonicalizer -o - %s | FileCheck %s
+---
+name: cimm_fpimm_hash_test
+body: |
+  bb.0:
+    ; CHECK: _1:_(s1) = G_CONSTANT i1 true
+    ; CHECK: _1:_(s1) = G_CONSTANT i1 false
+    ; CHECK: _1:_(s32) = G_FCONSTANT float
+    ; CHECK: _1:_(s32) = G_FCONSTANT float
+    %0:_(s1) = G_CONSTANT i1 true
+    %1:_(s1) = G_CONSTANT i1 false
+    %2:_(s32) = G_FCONSTANT float 1.0
+    %3:_(s32) = G_FCONSTANT float 0.0
+...