diff --git a/lld/ELF/SyntheticSections.h b/lld/ELF/SyntheticSections.h
--- a/lld/ELF/SyntheticSections.h
+++ b/lld/ELF/SyntheticSections.h
@@ -671,6 +671,7 @@
   PltSection(bool isIplt);
   void writeTo(uint8_t *buf) override;
   size_t getSize() const override;
+  uint32_t getNumEntries() const { return entries.size(); }
   bool isNeeded() const override { return !entries.empty(); }
   void addSymbols();
   template <class ELFT> void addEntry(Symbol &sym);
diff --git a/lld/ELF/SyntheticSections.cpp b/lld/ELF/SyntheticSections.cpp
--- a/lld/ELF/SyntheticSections.cpp
+++ b/lld/ELF/SyntheticSections.cpp
@@ -2446,13 +2446,14 @@
 // On PowerPC64 the lazy symbol resolvers go into the `global linkage table`
 // in the .glink section, rather then the typical .plt section.
 PltSection::PltSection(bool isIplt)
-    : SyntheticSection(
-          SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS, 16,
-          (config->emachine == EM_PPC || config->emachine == EM_PPC64)
-              ? ".glink"
-              : ".plt"),
+    : SyntheticSection(SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS, 16, ".plt"),
       headerSize(!isIplt || config->zRetpolineplt ? target->pltHeaderSize : 0),
       isIplt(isIplt) {
+  if (config->emachine == EM_PPC || config->emachine == EM_PPC64) {
+    name = ".glink";
+    alignment = 4;
+  }
+
   // The PLT needs to be writable on SPARC as the dynamic linker will
   // modify the instructions in the PLT entries.
   if (config->emachine == EM_SPARCV9)
@@ -2481,7 +2482,8 @@
     unsigned relOff = relSec->entsize * i + pltOff;
     uint64_t got = b->getGotPltVA();
     uint64_t plt = this->getVA() + off;
-    target->writePlt(buf + off, got, plt, b->pltIndex, relOff);
+    uint32_t index = (isIplt ? in.plt->getNumEntries() : 0) + b->pltIndex;
+    target->writePlt(buf + off, got, plt, index, relOff);
     off += target->pltEntrySize;
   }
 }