diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -4354,6 +4354,7 @@
     return false;
 
   unsigned FinalIndex = GEP->getNumOperands() - 1;
+  Type  *ElemType = GEP->getSourceElementType();
   Value *IndexVal = GEP->getOperand(FinalIndex);
 
   // Ensure all the other indices are 0.
@@ -4366,10 +4367,28 @@
     auto *CI = dyn_cast_or_null<ConstantInt>(C);
     if (!CI || !CI->isZero())
       return false;
+
+    switch (ElemType->getTypeID()) {
+    case Type::ArrayTyID:
+      ElemType = ElemType->getArrayElementType(); break;
+    case Type::VectorTyID:
+      ElemType = ElemType->getVectorElementType(); break;
+    case Type::StructTyID:
+      // getUniformBase can not be used to get the elements in a structure due
+      // to they don't have fixed offset.
+      // So we should make sure the index prior to FinalIndex could not point
+      // to a structure.
+      if (i == FinalIndex - 1)
+        return false;
+      ElemType = ElemType->getStructElementType(CI->getZExtValue()); break;
+    }
   }
 
   // The operands of the GEP may be defined in another basic block.
   // In this case we'll not find nodes for the operands.
+  // FIXME: It seems there's a bug here. SDB->findValue(Ptr) seems always
+  // return true. SDB->findValue(IndexVal) always false unless the same
+  // constant happen to present in unrelated IRs.
   if (!SDB->findValue(Ptr) || !SDB->findValue(IndexVal))
     return false;
 
diff --git a/llvm/test/CodeGen/X86/masked_gather.ll b/llvm/test/CodeGen/X86/masked_gather.ll
--- a/llvm/test/CodeGen/X86/masked_gather.ll
+++ b/llvm/test/CodeGen/X86/masked_gather.ll
@@ -8,6 +8,10 @@
 ; vXf32
 ;
 
+%struct.a = type { [4 x i32], [4 x i8], %struct.b, i32 }
+%struct.b = type { i32, i32 }
+@c = external dso_local global %struct.a, align 4
+
 define <4 x float> @gather_v4f32_ptr_v4i32(<4 x float*> %ptr, <4 x i32> %trigger, <4 x float> %passthru) {
 ; SSE-LABEL: gather_v4f32_ptr_v4i32:
 ; SSE:       # %bb.0:
@@ -1016,6 +1020,501 @@
   ret <16 x i8> %res
 }
 
+define <8 x i32> @gather_v8i32_v8i32(<8 x i32> %trigger) {
+; SSE-LABEL: gather_v8i32_v8i32:
+; SSE:       # %bb.0:
+; SSE-NEXT:    movdqa %xmm0, %xmm2
+; SSE-NEXT:    movl $c, %eax
+; SSE-NEXT:    movq %rax, %xmm0
+; SSE-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[0,1,0,1]
+; SSE-NEXT:    movdqa {{.*#+}} xmm4 = [12,12]
+; SSE-NEXT:    paddq %xmm3, %xmm4
+; SSE-NEXT:    pcmpeqd {{.*}}(%rip), %xmm1
+; SSE-NEXT:    pcmpeqd {{.*}}(%rip), %xmm2
+; SSE-NEXT:    packssdw %xmm1, %xmm2
+; SSE-NEXT:    movdqa %xmm2, %xmm0
+; SSE-NEXT:    packsswb %xmm0, %xmm0
+; SSE-NEXT:    pmovmskb %xmm0, %eax
+; SSE-NEXT:    testb $1, %al
+; SSE-NEXT:    je .LBB4_1
+; SSE-NEXT:  # %bb.2: # %cond.load
+; SSE-NEXT:    movq %xmm4, %rcx
+; SSE-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; SSE-NEXT:    testb $2, %al
+; SSE-NEXT:    jne .LBB4_4
+; SSE-NEXT:    jmp .LBB4_5
+; SSE-NEXT:  .LBB4_1:
+; SSE-NEXT:    # implicit-def: $xmm0
+; SSE-NEXT:    testb $2, %al
+; SSE-NEXT:    je .LBB4_5
+; SSE-NEXT:  .LBB4_4: # %cond.load1
+; SSE-NEXT:    pextrq $1, %xmm4, %rcx
+; SSE-NEXT:    pinsrd $1, (%rcx), %xmm0
+; SSE-NEXT:  .LBB4_5: # %else2
+; SSE-NEXT:    testb $4, %al
+; SSE-NEXT:    jne .LBB4_6
+; SSE-NEXT:  # %bb.7: # %else5
+; SSE-NEXT:    testb $8, %al
+; SSE-NEXT:    jne .LBB4_8
+; SSE-NEXT:  .LBB4_9: # %else8
+; SSE-NEXT:    testb $16, %al
+; SSE-NEXT:    je .LBB4_10
+; SSE-NEXT:  .LBB4_11: # %cond.load10
+; SSE-NEXT:    movq %xmm4, %rcx
+; SSE-NEXT:    pinsrd $0, (%rcx), %xmm1
+; SSE-NEXT:    testb $32, %al
+; SSE-NEXT:    jne .LBB4_13
+; SSE-NEXT:    jmp .LBB4_14
+; SSE-NEXT:  .LBB4_6: # %cond.load4
+; SSE-NEXT:    movq %xmm4, %rcx
+; SSE-NEXT:    pinsrd $2, (%rcx), %xmm0
+; SSE-NEXT:    testb $8, %al
+; SSE-NEXT:    je .LBB4_9
+; SSE-NEXT:  .LBB4_8: # %cond.load7
+; SSE-NEXT:    pextrq $1, %xmm4, %rcx
+; SSE-NEXT:    pinsrd $3, (%rcx), %xmm0
+; SSE-NEXT:    testb $16, %al
+; SSE-NEXT:    jne .LBB4_11
+; SSE-NEXT:  .LBB4_10:
+; SSE-NEXT:    # implicit-def: $xmm1
+; SSE-NEXT:    testb $32, %al
+; SSE-NEXT:    je .LBB4_14
+; SSE-NEXT:  .LBB4_13: # %cond.load13
+; SSE-NEXT:    pextrq $1, %xmm4, %rcx
+; SSE-NEXT:    pinsrd $1, (%rcx), %xmm1
+; SSE-NEXT:  .LBB4_14: # %else14
+; SSE-NEXT:    testb $64, %al
+; SSE-NEXT:    jne .LBB4_15
+; SSE-NEXT:  # %bb.16: # %else17
+; SSE-NEXT:    testb $-128, %al
+; SSE-NEXT:    je .LBB4_18
+; SSE-NEXT:  .LBB4_17: # %cond.load19
+; SSE-NEXT:    pextrq $1, %xmm4, %rax
+; SSE-NEXT:    pinsrd $3, (%rax), %xmm1
+; SSE-NEXT:  .LBB4_18: # %else20
+; SSE-NEXT:    paddq {{.*}}(%rip), %xmm3
+; SSE-NEXT:    packsswb %xmm0, %xmm2
+; SSE-NEXT:    pmovmskb %xmm2, %eax
+; SSE-NEXT:    testb $1, %al
+; SSE-NEXT:    je .LBB4_19
+; SSE-NEXT:  # %bb.20: # %cond.load23
+; SSE-NEXT:    movq %xmm3, %rcx
+; SSE-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
+; SSE-NEXT:    testb $2, %al
+; SSE-NEXT:    jne .LBB4_22
+; SSE-NEXT:    jmp .LBB4_23
+; SSE-NEXT:  .LBB4_15: # %cond.load16
+; SSE-NEXT:    movq %xmm4, %rcx
+; SSE-NEXT:    pinsrd $2, (%rcx), %xmm1
+; SSE-NEXT:    testb $-128, %al
+; SSE-NEXT:    jne .LBB4_17
+; SSE-NEXT:    jmp .LBB4_18
+; SSE-NEXT:  .LBB4_19:
+; SSE-NEXT:    # implicit-def: $xmm2
+; SSE-NEXT:    testb $2, %al
+; SSE-NEXT:    je .LBB4_23
+; SSE-NEXT:  .LBB4_22: # %cond.load29
+; SSE-NEXT:    pextrq $1, %xmm3, %rcx
+; SSE-NEXT:    pinsrd $1, (%rcx), %xmm2
+; SSE-NEXT:  .LBB4_23: # %else33
+; SSE-NEXT:    testb $4, %al
+; SSE-NEXT:    jne .LBB4_24
+; SSE-NEXT:  # %bb.25: # %else39
+; SSE-NEXT:    testb $8, %al
+; SSE-NEXT:    jne .LBB4_26
+; SSE-NEXT:  .LBB4_27: # %else45
+; SSE-NEXT:    testb $16, %al
+; SSE-NEXT:    je .LBB4_28
+; SSE-NEXT:  .LBB4_29: # %cond.load47
+; SSE-NEXT:    movq %xmm3, %rcx
+; SSE-NEXT:    pinsrd $0, (%rcx), %xmm4
+; SSE-NEXT:    testb $32, %al
+; SSE-NEXT:    jne .LBB4_31
+; SSE-NEXT:    jmp .LBB4_32
+; SSE-NEXT:  .LBB4_24: # %cond.load35
+; SSE-NEXT:    movq %xmm3, %rcx
+; SSE-NEXT:    pinsrd $2, (%rcx), %xmm2
+; SSE-NEXT:    testb $8, %al
+; SSE-NEXT:    je .LBB4_27
+; SSE-NEXT:  .LBB4_26: # %cond.load41
+; SSE-NEXT:    pextrq $1, %xmm3, %rcx
+; SSE-NEXT:    pinsrd $3, (%rcx), %xmm2
+; SSE-NEXT:    testb $16, %al
+; SSE-NEXT:    jne .LBB4_29
+; SSE-NEXT:  .LBB4_28:
+; SSE-NEXT:    # implicit-def: $xmm4
+; SSE-NEXT:    testb $32, %al
+; SSE-NEXT:    je .LBB4_32
+; SSE-NEXT:  .LBB4_31: # %cond.load53
+; SSE-NEXT:    pextrq $1, %xmm3, %rcx
+; SSE-NEXT:    pinsrd $1, (%rcx), %xmm4
+; SSE-NEXT:  .LBB4_32: # %else57
+; SSE-NEXT:    testb $64, %al
+; SSE-NEXT:    jne .LBB4_33
+; SSE-NEXT:  # %bb.34: # %else63
+; SSE-NEXT:    testb $-128, %al
+; SSE-NEXT:    je .LBB4_36
+; SSE-NEXT:  .LBB4_35: # %cond.load65
+; SSE-NEXT:    pextrq $1, %xmm3, %rax
+; SSE-NEXT:    pinsrd $3, (%rax), %xmm4
+; SSE-NEXT:  .LBB4_36: # %else69
+; SSE-NEXT:    paddd %xmm4, %xmm1
+; SSE-NEXT:    paddd %xmm2, %xmm0
+; SSE-NEXT:    retq
+; SSE-NEXT:  .LBB4_33: # %cond.load59
+; SSE-NEXT:    movq %xmm3, %rcx
+; SSE-NEXT:    pinsrd $2, (%rcx), %xmm4
+; SSE-NEXT:    testb $-128, %al
+; SSE-NEXT:    jne .LBB4_35
+; SSE-NEXT:    jmp .LBB4_36
+;
+; AVX1-LABEL: gather_v8i32_v8i32:
+; AVX1:       # %bb.0:
+; AVX1-NEXT:    movl $c, %eax
+; AVX1-NEXT:    vmovq %rax, %xmm1
+; AVX1-NEXT:    vpshufd {{.*#+}} xmm3 = xmm1[0,1,0,1]
+; AVX1-NEXT:    vpaddq {{.*}}(%rip), %xmm3, %xmm1
+; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm1, %ymm4
+; AVX1-NEXT:    vpcmpeqd {{.*}}(%rip), %xmm0, %xmm1
+; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
+; AVX1-NEXT:    vpcmpeqd {{.*}}(%rip), %xmm2, %xmm2
+; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm1, %ymm1
+; AVX1-NEXT:    vmovmskps %ymm1, %eax
+; AVX1-NEXT:    testb $1, %al
+; AVX1-NEXT:    # implicit-def: $ymm1
+; AVX1-NEXT:    je .LBB4_2
+; AVX1-NEXT:  # %bb.1: # %cond.load
+; AVX1-NEXT:    vmovq %xmm4, %rcx
+; AVX1-NEXT:    vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; AVX1-NEXT:  .LBB4_2: # %else
+; AVX1-NEXT:    testb $2, %al
+; AVX1-NEXT:    je .LBB4_4
+; AVX1-NEXT:  # %bb.3: # %cond.load1
+; AVX1-NEXT:    vpextrq $1, %xmm4, %rcx
+; AVX1-NEXT:    vpinsrd $1, (%rcx), %xmm1, %xmm5
+; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm5[0,1,2,3],ymm1[4,5,6,7]
+; AVX1-NEXT:  .LBB4_4: # %else2
+; AVX1-NEXT:    testb $4, %al
+; AVX1-NEXT:    vextractf128 $1, %ymm4, %xmm5
+; AVX1-NEXT:    jne .LBB4_5
+; AVX1-NEXT:  # %bb.6: # %else5
+; AVX1-NEXT:    testb $8, %al
+; AVX1-NEXT:    jne .LBB4_7
+; AVX1-NEXT:  .LBB4_8: # %else8
+; AVX1-NEXT:    testb $16, %al
+; AVX1-NEXT:    jne .LBB4_9
+; AVX1-NEXT:  .LBB4_10: # %else11
+; AVX1-NEXT:    testb $32, %al
+; AVX1-NEXT:    jne .LBB4_11
+; AVX1-NEXT:  .LBB4_12: # %else14
+; AVX1-NEXT:    testb $64, %al
+; AVX1-NEXT:    je .LBB4_14
+; AVX1-NEXT:  .LBB4_13: # %cond.load16
+; AVX1-NEXT:    vmovq %xmm5, %rcx
+; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm4
+; AVX1-NEXT:    vpinsrd $2, (%rcx), %xmm4, %xmm4
+; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm1, %ymm1
+; AVX1-NEXT:  .LBB4_14: # %else17
+; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm3, %ymm4
+; AVX1-NEXT:    testb $-128, %al
+; AVX1-NEXT:    je .LBB4_16
+; AVX1-NEXT:  # %bb.15: # %cond.load19
+; AVX1-NEXT:    vpextrq $1, %xmm5, %rax
+; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
+; AVX1-NEXT:    vpinsrd $3, (%rax), %xmm3, %xmm3
+; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm1, %ymm1
+; AVX1-NEXT:  .LBB4_16: # %else20
+; AVX1-NEXT:    vextractf128 $1, %ymm4, %xmm3
+; AVX1-NEXT:    vmovdqa {{.*#+}} xmm5 = [28,28]
+; AVX1-NEXT:    vpaddq %xmm5, %xmm3, %xmm3
+; AVX1-NEXT:    vpaddq %xmm5, %xmm4, %xmm6
+; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm6, %ymm6
+; AVX1-NEXT:    vpcmpeqd {{.*}}(%rip), %xmm0, %xmm0
+; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
+; AVX1-NEXT:    vmovmskps %ymm0, %eax
+; AVX1-NEXT:    testb $1, %al
+; AVX1-NEXT:    # implicit-def: $ymm0
+; AVX1-NEXT:    je .LBB4_18
+; AVX1-NEXT:  # %bb.17: # %cond.load23
+; AVX1-NEXT:    vmovq %xmm6, %rcx
+; AVX1-NEXT:    vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; AVX1-NEXT:  .LBB4_18: # %else27
+; AVX1-NEXT:    testb $2, %al
+; AVX1-NEXT:    je .LBB4_20
+; AVX1-NEXT:  # %bb.19: # %cond.load29
+; AVX1-NEXT:    vpextrq $1, %xmm6, %rcx
+; AVX1-NEXT:    vpinsrd $1, (%rcx), %xmm0, %xmm2
+; AVX1-NEXT:    vblendps {{.*#+}} ymm0 = ymm2[0,1,2,3],ymm0[4,5,6,7]
+; AVX1-NEXT:  .LBB4_20: # %else33
+; AVX1-NEXT:    vpaddq %xmm5, %xmm4, %xmm2
+; AVX1-NEXT:    testb $4, %al
+; AVX1-NEXT:    vextractf128 $1, %ymm6, %xmm4
+; AVX1-NEXT:    je .LBB4_22
+; AVX1-NEXT:  # %bb.21: # %cond.load35
+; AVX1-NEXT:    vmovq %xmm4, %rcx
+; AVX1-NEXT:    vpinsrd $2, (%rcx), %xmm0, %xmm5
+; AVX1-NEXT:    vblendps {{.*#+}} ymm0 = ymm5[0,1,2,3],ymm0[4,5,6,7]
+; AVX1-NEXT:  .LBB4_22: # %else39
+; AVX1-NEXT:    testb $8, %al
+; AVX1-NEXT:    je .LBB4_24
+; AVX1-NEXT:  # %bb.23: # %cond.load41
+; AVX1-NEXT:    vpextrq $1, %xmm4, %rcx
+; AVX1-NEXT:    vpinsrd $3, (%rcx), %xmm0, %xmm4
+; AVX1-NEXT:    vblendps {{.*#+}} ymm0 = ymm4[0,1,2,3],ymm0[4,5,6,7]
+; AVX1-NEXT:  .LBB4_24: # %else45
+; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm2, %ymm2
+; AVX1-NEXT:    testb $16, %al
+; AVX1-NEXT:    je .LBB4_26
+; AVX1-NEXT:  # %bb.25: # %cond.load47
+; AVX1-NEXT:    vmovq %xmm2, %rcx
+; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
+; AVX1-NEXT:    vpinsrd $0, (%rcx), %xmm3, %xmm3
+; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm0, %ymm0
+; AVX1-NEXT:  .LBB4_26: # %else51
+; AVX1-NEXT:    testb $32, %al
+; AVX1-NEXT:    je .LBB4_28
+; AVX1-NEXT:  # %bb.27: # %cond.load53
+; AVX1-NEXT:    vpextrq $1, %xmm2, %rcx
+; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
+; AVX1-NEXT:    vpinsrd $1, (%rcx), %xmm3, %xmm3
+; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm0, %ymm0
+; AVX1-NEXT:  .LBB4_28: # %else57
+; AVX1-NEXT:    testb $64, %al
+; AVX1-NEXT:    vextractf128 $1, %ymm2, %xmm2
+; AVX1-NEXT:    je .LBB4_30
+; AVX1-NEXT:  # %bb.29: # %cond.load59
+; AVX1-NEXT:    vmovq %xmm2, %rcx
+; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
+; AVX1-NEXT:    vpinsrd $2, (%rcx), %xmm3, %xmm3
+; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm0, %ymm0
+; AVX1-NEXT:  .LBB4_30: # %else63
+; AVX1-NEXT:    testb $-128, %al
+; AVX1-NEXT:    je .LBB4_32
+; AVX1-NEXT:  # %bb.31: # %cond.load65
+; AVX1-NEXT:    vpextrq $1, %xmm2, %rax
+; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
+; AVX1-NEXT:    vpinsrd $3, (%rax), %xmm2, %xmm2
+; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
+; AVX1-NEXT:  .LBB4_32: # %else69
+; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
+; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
+; AVX1-NEXT:    vpaddd %xmm2, %xmm3, %xmm2
+; AVX1-NEXT:    vpaddd %xmm0, %xmm1, %xmm0
+; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
+; AVX1-NEXT:    retq
+; AVX1-NEXT:  .LBB4_5: # %cond.load4
+; AVX1-NEXT:    vmovq %xmm5, %rcx
+; AVX1-NEXT:    vpinsrd $2, (%rcx), %xmm1, %xmm6
+; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm6[0,1,2,3],ymm1[4,5,6,7]
+; AVX1-NEXT:    testb $8, %al
+; AVX1-NEXT:    je .LBB4_8
+; AVX1-NEXT:  .LBB4_7: # %cond.load7
+; AVX1-NEXT:    vpextrq $1, %xmm5, %rcx
+; AVX1-NEXT:    vpinsrd $3, (%rcx), %xmm1, %xmm6
+; AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm6[0,1,2,3],ymm1[4,5,6,7]
+; AVX1-NEXT:    testb $16, %al
+; AVX1-NEXT:    je .LBB4_10
+; AVX1-NEXT:  .LBB4_9: # %cond.load10
+; AVX1-NEXT:    vmovq %xmm4, %rcx
+; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm6
+; AVX1-NEXT:    vpinsrd $0, (%rcx), %xmm6, %xmm6
+; AVX1-NEXT:    vinsertf128 $1, %xmm6, %ymm1, %ymm1
+; AVX1-NEXT:    testb $32, %al
+; AVX1-NEXT:    je .LBB4_12
+; AVX1-NEXT:  .LBB4_11: # %cond.load13
+; AVX1-NEXT:    vpextrq $1, %xmm4, %rcx
+; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm4
+; AVX1-NEXT:    vpinsrd $1, (%rcx), %xmm4, %xmm4
+; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm1, %ymm1
+; AVX1-NEXT:    testb $64, %al
+; AVX1-NEXT:    jne .LBB4_13
+; AVX1-NEXT:    jmp .LBB4_14
+;
+; AVX2-LABEL: gather_v8i32_v8i32:
+; AVX2:       # %bb.0:
+; AVX2-NEXT:    movl $c, %eax
+; AVX2-NEXT:    vmovq %rax, %xmm1
+; AVX2-NEXT:    vpbroadcastq %xmm1, %ymm1
+; AVX2-NEXT:    vpbroadcastq {{.*#+}} ymm2 = [12,12,12,12]
+; AVX2-NEXT:    vpaddq %ymm2, %ymm1, %ymm2
+; AVX2-NEXT:    vpcmpeqd {{.*}}(%rip), %ymm0, %ymm0
+; AVX2-NEXT:    vmovmskps %ymm0, %eax
+; AVX2-NEXT:    testb $1, %al
+; AVX2-NEXT:    # implicit-def: $ymm0
+; AVX2-NEXT:    je .LBB4_2
+; AVX2-NEXT:  # %bb.1: # %cond.load
+; AVX2-NEXT:    vmovq %xmm2, %rcx
+; AVX2-NEXT:    vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; AVX2-NEXT:  .LBB4_2: # %else
+; AVX2-NEXT:    testb $2, %al
+; AVX2-NEXT:    je .LBB4_4
+; AVX2-NEXT:  # %bb.3: # %cond.load1
+; AVX2-NEXT:    vpextrq $1, %xmm2, %rcx
+; AVX2-NEXT:    vpinsrd $1, (%rcx), %xmm0, %xmm3
+; AVX2-NEXT:    vpblendd {{.*#+}} ymm0 = ymm3[0,1,2,3],ymm0[4,5,6,7]
+; AVX2-NEXT:  .LBB4_4: # %else2
+; AVX2-NEXT:    testb $4, %al
+; AVX2-NEXT:    vextracti128 $1, %ymm2, %xmm3
+; AVX2-NEXT:    jne .LBB4_5
+; AVX2-NEXT:  # %bb.6: # %else5
+; AVX2-NEXT:    testb $8, %al
+; AVX2-NEXT:    jne .LBB4_7
+; AVX2-NEXT:  .LBB4_8: # %else8
+; AVX2-NEXT:    testb $16, %al
+; AVX2-NEXT:    jne .LBB4_9
+; AVX2-NEXT:  .LBB4_10: # %else11
+; AVX2-NEXT:    testb $32, %al
+; AVX2-NEXT:    jne .LBB4_11
+; AVX2-NEXT:  .LBB4_12: # %else14
+; AVX2-NEXT:    testb $64, %al
+; AVX2-NEXT:    jne .LBB4_13
+; AVX2-NEXT:  .LBB4_14: # %else17
+; AVX2-NEXT:    testb $-128, %al
+; AVX2-NEXT:    je .LBB4_16
+; AVX2-NEXT:  .LBB4_15: # %cond.load19
+; AVX2-NEXT:    vpextrq $1, %xmm3, %rcx
+; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm2
+; AVX2-NEXT:    vpinsrd $3, (%rcx), %xmm2, %xmm2
+; AVX2-NEXT:    vinserti128 $1, %xmm2, %ymm0, %ymm0
+; AVX2-NEXT:  .LBB4_16: # %else20
+; AVX2-NEXT:    vpbroadcastq {{.*#+}} ymm2 = [28,28,28,28]
+; AVX2-NEXT:    vpaddq %ymm2, %ymm1, %ymm2
+; AVX2-NEXT:    testb $1, %al
+; AVX2-NEXT:    # implicit-def: $ymm1
+; AVX2-NEXT:    je .LBB4_18
+; AVX2-NEXT:  # %bb.17: # %cond.load23
+; AVX2-NEXT:    vmovq %xmm2, %rcx
+; AVX2-NEXT:    vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; AVX2-NEXT:  .LBB4_18: # %else27
+; AVX2-NEXT:    testb $2, %al
+; AVX2-NEXT:    je .LBB4_20
+; AVX2-NEXT:  # %bb.19: # %cond.load29
+; AVX2-NEXT:    vpextrq $1, %xmm2, %rcx
+; AVX2-NEXT:    vpinsrd $1, (%rcx), %xmm1, %xmm3
+; AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm3[0,1,2,3],ymm1[4,5,6,7]
+; AVX2-NEXT:  .LBB4_20: # %else33
+; AVX2-NEXT:    testb $4, %al
+; AVX2-NEXT:    vextracti128 $1, %ymm2, %xmm3
+; AVX2-NEXT:    jne .LBB4_21
+; AVX2-NEXT:  # %bb.22: # %else39
+; AVX2-NEXT:    testb $8, %al
+; AVX2-NEXT:    jne .LBB4_23
+; AVX2-NEXT:  .LBB4_24: # %else45
+; AVX2-NEXT:    testb $16, %al
+; AVX2-NEXT:    jne .LBB4_25
+; AVX2-NEXT:  .LBB4_26: # %else51
+; AVX2-NEXT:    testb $32, %al
+; AVX2-NEXT:    jne .LBB4_27
+; AVX2-NEXT:  .LBB4_28: # %else57
+; AVX2-NEXT:    testb $64, %al
+; AVX2-NEXT:    jne .LBB4_29
+; AVX2-NEXT:  .LBB4_30: # %else63
+; AVX2-NEXT:    testb $-128, %al
+; AVX2-NEXT:    jne .LBB4_31
+; AVX2-NEXT:  .LBB4_32: # %else69
+; AVX2-NEXT:    vpaddd %ymm1, %ymm0, %ymm0
+; AVX2-NEXT:    retq
+; AVX2-NEXT:  .LBB4_5: # %cond.load4
+; AVX2-NEXT:    vmovq %xmm3, %rcx
+; AVX2-NEXT:    vpinsrd $2, (%rcx), %xmm0, %xmm4
+; AVX2-NEXT:    vpblendd {{.*#+}} ymm0 = ymm4[0,1,2,3],ymm0[4,5,6,7]
+; AVX2-NEXT:    testb $8, %al
+; AVX2-NEXT:    je .LBB4_8
+; AVX2-NEXT:  .LBB4_7: # %cond.load7
+; AVX2-NEXT:    vpextrq $1, %xmm3, %rcx
+; AVX2-NEXT:    vpinsrd $3, (%rcx), %xmm0, %xmm4
+; AVX2-NEXT:    vpblendd {{.*#+}} ymm0 = ymm4[0,1,2,3],ymm0[4,5,6,7]
+; AVX2-NEXT:    testb $16, %al
+; AVX2-NEXT:    je .LBB4_10
+; AVX2-NEXT:  .LBB4_9: # %cond.load10
+; AVX2-NEXT:    vmovq %xmm2, %rcx
+; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm4
+; AVX2-NEXT:    vpinsrd $0, (%rcx), %xmm4, %xmm4
+; AVX2-NEXT:    vinserti128 $1, %xmm4, %ymm0, %ymm0
+; AVX2-NEXT:    testb $32, %al
+; AVX2-NEXT:    je .LBB4_12
+; AVX2-NEXT:  .LBB4_11: # %cond.load13
+; AVX2-NEXT:    vpextrq $1, %xmm2, %rcx
+; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm2
+; AVX2-NEXT:    vpinsrd $1, (%rcx), %xmm2, %xmm2
+; AVX2-NEXT:    vinserti128 $1, %xmm2, %ymm0, %ymm0
+; AVX2-NEXT:    testb $64, %al
+; AVX2-NEXT:    je .LBB4_14
+; AVX2-NEXT:  .LBB4_13: # %cond.load16
+; AVX2-NEXT:    vmovq %xmm3, %rcx
+; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm2
+; AVX2-NEXT:    vpinsrd $2, (%rcx), %xmm2, %xmm2
+; AVX2-NEXT:    vinserti128 $1, %xmm2, %ymm0, %ymm0
+; AVX2-NEXT:    testb $-128, %al
+; AVX2-NEXT:    jne .LBB4_15
+; AVX2-NEXT:    jmp .LBB4_16
+; AVX2-NEXT:  .LBB4_21: # %cond.load35
+; AVX2-NEXT:    vmovq %xmm3, %rcx
+; AVX2-NEXT:    vpinsrd $2, (%rcx), %xmm1, %xmm4
+; AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm4[0,1,2,3],ymm1[4,5,6,7]
+; AVX2-NEXT:    testb $8, %al
+; AVX2-NEXT:    je .LBB4_24
+; AVX2-NEXT:  .LBB4_23: # %cond.load41
+; AVX2-NEXT:    vpextrq $1, %xmm3, %rcx
+; AVX2-NEXT:    vpinsrd $3, (%rcx), %xmm1, %xmm4
+; AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm4[0,1,2,3],ymm1[4,5,6,7]
+; AVX2-NEXT:    testb $16, %al
+; AVX2-NEXT:    je .LBB4_26
+; AVX2-NEXT:  .LBB4_25: # %cond.load47
+; AVX2-NEXT:    vmovq %xmm2, %rcx
+; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm4
+; AVX2-NEXT:    vpinsrd $0, (%rcx), %xmm4, %xmm4
+; AVX2-NEXT:    vinserti128 $1, %xmm4, %ymm1, %ymm1
+; AVX2-NEXT:    testb $32, %al
+; AVX2-NEXT:    je .LBB4_28
+; AVX2-NEXT:  .LBB4_27: # %cond.load53
+; AVX2-NEXT:    vpextrq $1, %xmm2, %rcx
+; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm2
+; AVX2-NEXT:    vpinsrd $1, (%rcx), %xmm2, %xmm2
+; AVX2-NEXT:    vinserti128 $1, %xmm2, %ymm1, %ymm1
+; AVX2-NEXT:    testb $64, %al
+; AVX2-NEXT:    je .LBB4_30
+; AVX2-NEXT:  .LBB4_29: # %cond.load59
+; AVX2-NEXT:    vmovq %xmm3, %rcx
+; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm2
+; AVX2-NEXT:    vpinsrd $2, (%rcx), %xmm2, %xmm2
+; AVX2-NEXT:    vinserti128 $1, %xmm2, %ymm1, %ymm1
+; AVX2-NEXT:    testb $-128, %al
+; AVX2-NEXT:    je .LBB4_32
+; AVX2-NEXT:  .LBB4_31: # %cond.load65
+; AVX2-NEXT:    vpextrq $1, %xmm3, %rax
+; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm2
+; AVX2-NEXT:    vpinsrd $3, (%rax), %xmm2, %xmm2
+; AVX2-NEXT:    vinserti128 $1, %xmm2, %ymm1, %ymm1
+; AVX2-NEXT:    vpaddd %ymm1, %ymm0, %ymm0
+; AVX2-NEXT:    retq
+;
+; AVX512-LABEL: gather_v8i32_v8i32:
+; AVX512:       # %bb.0:
+; AVX512-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512-NEXT:    movl $c, %eax
+; AVX512-NEXT:    vpbroadcastq %rax, %zmm1
+; AVX512-NEXT:    vmovdqa {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7]
+; AVX512-NEXT:    vpcmpeqd %zmm2, %zmm0, %k1
+; AVX512-NEXT:    kshiftlw $8, %k1, %k0
+; AVX512-NEXT:    kshiftrw $8, %k0, %k2
+; AVX512-NEXT:    vpbroadcastd {{.*#+}} zmm0 = [3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3]
+; AVX512-NEXT:    vpgatherdd c(,%zmm0,4), %zmm2 {%k2}
+; AVX512-NEXT:    vpaddq {{.*}}(%rip){1to8}, %zmm1, %zmm0
+; AVX512-NEXT:    vpgatherqd (,%zmm0), %ymm1 {%k1}
+; AVX512-NEXT:    vpaddd %ymm1, %ymm2, %ymm0
+; AVX512-NEXT:    retq
+  %1 = insertelement <8 x %struct.a*> undef, %struct.a* @c, i32 0
+  %2 = shufflevector <8 x %struct.a*> %1, <8 x %struct.a*> undef, <8 x i32> zeroinitializer
+  %3 = getelementptr %struct.a, <8 x %struct.a*> %2, <8 x i32> zeroinitializer, i32 0, i32 3
+  %4 = icmp eq <8 x i32> %trigger, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+  %5 = call <8 x i32> @llvm.masked.gather.v8i32.v8p0i32(<8 x i32*> %3, i32 4, <8 x i1> %4, <8 x i32> undef)
+  %6 = getelementptr %struct.a, <8 x %struct.a*> %2, <8 x i32> zeroinitializer, i32 3
+  %7 = call <8 x i32> @llvm.masked.gather.v8i32.v8p0i32(<8 x i32*> %6, i32 4, <8 x i1> %4, <8 x i32> undef)
+  %8 = add <8 x i32> %5, %7
+  ret <8 x i32> %8
+}
+
 declare <2 x double> @llvm.masked.gather.v2f64.v2p0f64(<2 x double*>, i32, <2 x i1>, <2 x double>)
 declare <4 x double> @llvm.masked.gather.v4f64.v4p0f64(<4 x double*>, i32, <4 x i1>, <4 x double>)
 
@@ -1023,3 +1522,5 @@
 declare <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*>, i32, <8 x i1>, <8 x float>)
 
 declare <16 x i8> @llvm.masked.gather.v16i8.v16p0i8(<16 x i8*>, i32, <16 x i1>, <16 x i8>)
+
+declare <8 x i32> @llvm.masked.gather.v8i32.v8p0i32(<8 x i32*>, i32, <8 x i1>, <8 x i32>)