Index: llvm/lib/Target/ARM/ARMInstrMVE.td
===================================================================
--- llvm/lib/Target/ARM/ARMInstrMVE.td
+++ llvm/lib/Target/ARM/ARMInstrMVE.td
@@ -5240,7 +5240,6 @@
   let Inst{4} = 0b0;
 
   let Defs = [VPR];
-  let validForTailPredication = 1;
 }
 
 class MVE_VPTt1<string suffix, bits<2> size, dag iops>
@@ -5252,7 +5251,6 @@
   let Inst{5} = Qm{3};
   let Inst{3-1} = Qm{2-0};
   let Inst{0} = fc{1};
-  let validForTailPredication = 1;
 }
 
 class MVE_VPTt1i<string suffix, bits<2> size>
@@ -5354,7 +5352,6 @@
 
   let Defs = [VPR];
   let Predicates = [HasMVEFloat];
-  let validForTailPredication = 1;
 }
 
 class MVE_VPTft1<string suffix, bit size>
Index: llvm/unittests/Target/ARM/MachineInstrTest.cpp
===================================================================
--- llvm/unittests/Target/ARM/MachineInstrTest.cpp
+++ llvm/unittests/Target/ARM/MachineInstrTest.cpp
@@ -272,28 +272,6 @@
     case MVE_VPNOT:
     case MVE_VPSEL:
     case MVE_VPST:	
-    case MVE_VPTv16i8:
-    case MVE_VPTv16i8r:
-    case MVE_VPTv16s8:
-    case MVE_VPTv16s8r:
-    case MVE_VPTv16u8:	
-    case MVE_VPTv16u8r:
-    case MVE_VPTv4f32:
-    case MVE_VPTv4f32r:
-    case MVE_VPTv4i32:
-    case MVE_VPTv4i32r:
-    case MVE_VPTv4s32:
-    case MVE_VPTv4s32r:
-    case MVE_VPTv4u32:
-    case MVE_VPTv4u32r:
-    case MVE_VPTv8f16:
-    case MVE_VPTv8f16r:
-    case MVE_VPTv8i16:
-    case MVE_VPTv8i16r:
-    case MVE_VPTv8s16:
-    case MVE_VPTv8s16r:
-    case MVE_VPTv8u16:
-    case MVE_VPTv8u16r:
     case MVE_VQABSs16:
     case MVE_VQABSs32:
     case MVE_VQABSs8: