diff --git a/llvm/lib/Analysis/LoopInfo.cpp b/llvm/lib/Analysis/LoopInfo.cpp
--- a/llvm/lib/Analysis/LoopInfo.cpp
+++ b/llvm/lib/Analysis/LoopInfo.cpp
@@ -367,6 +367,7 @@
 
   BasicBlock *Preheader = getLoopPreheader();
   BasicBlock *Latch = getLoopLatch();
+  (void)Latch;
   assert(Preheader && Latch &&
          "Expecting a loop with valid preheader and latch");
 
diff --git a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
--- a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -910,7 +910,8 @@
     // instruction.
     for (auto &MI :
          iterator_range<MachineInstrBundleIterator<llvm::MachineInstr>>(
-             std::next(I), std::next(Paired)))
+             std::next(I), std::next(Paired))){
+      (void)MI;
       assert(all_of(MI.operands(),
                     [this, &RenameReg](const MachineOperand &MOP) {
                       return !MOP.isReg() || MOP.isDebug() ||
@@ -918,6 +919,7 @@
                     }) &&
              "Rename register used between paired instruction, trashing the "
              "content");
+    }
   }
 
   // Insert our new paired instruction after whichever of the paired