diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -3352,16 +3352,7 @@ ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); } - // If this is an 8 or 16-bit value, it is really passed promoted to 32 - // bits. Insert an assert[sz]ext to capture this, then truncate to the - // right size. - if (VA.getLocInfo() == CCValAssign::SExt) - ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, - DAG.getValueType(VA.getValVT())); - else if (VA.getLocInfo() == CCValAssign::ZExt) - ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, - DAG.getValueType(VA.getValVT())); - else if (VA.getLocInfo() == CCValAssign::BCvt) + if (VA.getLocInfo() == CCValAssign::BCvt) ArgValue = DAG.getBitcast(VA.getValVT(), ArgValue); if (VA.isExtInLoc()) { diff --git a/llvm/test/CodeGen/X86/addr-mode-matcher-2.ll b/llvm/test/CodeGen/X86/addr-mode-matcher-2.ll --- a/llvm/test/CodeGen/X86/addr-mode-matcher-2.ll +++ b/llvm/test/CodeGen/X86/addr-mode-matcher-2.ll @@ -42,7 +42,7 @@ ; X64-LABEL: foo: ; X64: # %bb.0: ; X64-NEXT: pushq %rax -; X64-NEXT: testl %edi, %edi +; X64-NEXT: testb %dil, %dil ; X64-NEXT: je .LBB0_1 ; X64-NEXT: # %bb.3: ; X64-NEXT: popq %rax diff --git a/llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll b/llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll --- a/llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll +++ b/llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll @@ -1215,6 +1215,7 @@ ; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X32-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1 ; X32-NEXT: vaddsd %xmm0, %xmm1, %xmm0 +; X32-NEXT: movsbl %al, %eax ; X32-NEXT: vcvtsi2sd %eax, %xmm2, %xmm1 ; X32-NEXT: vaddsd %xmm1, %xmm0, %xmm0 ; X32-NEXT: vcvtsi2sd %ecx, %xmm2, %xmm1 @@ -1223,7 +1224,8 @@ ; X32-NEXT: vpinsrd $1, %edi, %xmm1, %xmm1 ; X32-NEXT: vcvtqq2pd %ymm1, %ymm1 ; X32-NEXT: vaddsd %xmm1, %xmm0, %xmm0 -; X32-NEXT: vcvtsi2sd %esi, %xmm2, %xmm1 +; X32-NEXT: movswl %si, %eax +; X32-NEXT: vcvtsi2sd %eax, %xmm2, %xmm1 ; X32-NEXT: vaddsd %xmm1, %xmm0, %xmm0 ; X32-NEXT: vcvtsi2sdl (%ebx), %xmm2, %xmm1 ; X32-NEXT: vaddsd %xmm1, %xmm0, %xmm0 @@ -1236,13 +1238,15 @@ ; WIN64: # %bb.0: ; WIN64-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1 ; WIN64-NEXT: vaddsd %xmm0, %xmm1, %xmm0 +; WIN64-NEXT: movsbl %al, %eax ; WIN64-NEXT: vcvtsi2sd %eax, %xmm2, %xmm1 ; WIN64-NEXT: vaddsd %xmm1, %xmm0, %xmm0 ; WIN64-NEXT: vcvtsi2sd %ecx, %xmm2, %xmm1 ; WIN64-NEXT: vaddsd %xmm1, %xmm0, %xmm0 ; WIN64-NEXT: vcvtsi2sd %rdx, %xmm2, %xmm1 ; WIN64-NEXT: vaddsd %xmm1, %xmm0, %xmm0 -; WIN64-NEXT: vcvtsi2sd %edi, %xmm2, %xmm1 +; WIN64-NEXT: movswl %di, %eax +; WIN64-NEXT: vcvtsi2sd %eax, %xmm2, %xmm1 ; WIN64-NEXT: vaddsd %xmm1, %xmm0, %xmm0 ; WIN64-NEXT: vcvtsi2sdl (%rsi), %xmm2, %xmm1 ; WIN64-NEXT: vaddsd %xmm1, %xmm0, %xmm0 @@ -1253,13 +1257,15 @@ ; LINUXOSX64: # %bb.0: ; LINUXOSX64-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1 ; LINUXOSX64-NEXT: vaddsd %xmm0, %xmm1, %xmm0 +; LINUXOSX64-NEXT: movsbl %al, %eax ; LINUXOSX64-NEXT: vcvtsi2sd %eax, %xmm2, %xmm1 ; LINUXOSX64-NEXT: vaddsd %xmm1, %xmm0, %xmm0 ; LINUXOSX64-NEXT: vcvtsi2sd %ecx, %xmm2, %xmm1 ; LINUXOSX64-NEXT: vaddsd %xmm1, %xmm0, %xmm0 ; LINUXOSX64-NEXT: vcvtsi2sd %rdx, %xmm2, %xmm1 ; LINUXOSX64-NEXT: vaddsd %xmm1, %xmm0, %xmm0 -; LINUXOSX64-NEXT: vcvtsi2sd %edi, %xmm2, %xmm1 +; LINUXOSX64-NEXT: movswl %di, %eax +; LINUXOSX64-NEXT: vcvtsi2sd %eax, %xmm2, %xmm1 ; LINUXOSX64-NEXT: vaddsd %xmm1, %xmm0, %xmm0 ; LINUXOSX64-NEXT: vcvtsi2sdl (%rsi), %xmm2, %xmm1 ; LINUXOSX64-NEXT: vaddsd %xmm1, %xmm0, %xmm0 diff --git a/llvm/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll b/llvm/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll --- a/llvm/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll +++ b/llvm/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll @@ -66,6 +66,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -94,6 +95,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -173,6 +175,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -201,6 +204,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -753,6 +757,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -782,6 +787,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -864,6 +870,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -893,6 +900,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -2400,6 +2408,7 @@ ; NoVLX-NEXT: vpcmpeqd %zmm1, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -2427,6 +2436,7 @@ ; NoVLX-NEXT: vpcmpeqd (%rsi), %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -2481,6 +2491,7 @@ ; NoVLX-NEXT: vpcmpeqd (%rsi){1to16}, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -2558,6 +2569,7 @@ ; NoVLX-NEXT: vpcmpeqd %zmm1, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -2585,6 +2597,7 @@ ; NoVLX-NEXT: vpcmpeqd (%rsi), %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -2639,6 +2652,7 @@ ; NoVLX-NEXT: vpcmpeqd (%rsi){1to16}, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -4870,6 +4884,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -4898,6 +4913,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -4977,6 +4993,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -5005,6 +5022,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -5557,6 +5575,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -5586,6 +5605,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -5668,6 +5688,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -5697,6 +5718,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -7204,6 +7226,7 @@ ; NoVLX-NEXT: vpcmpgtd %zmm1, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -7231,6 +7254,7 @@ ; NoVLX-NEXT: vpcmpgtd (%rsi), %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -7285,6 +7309,7 @@ ; NoVLX-NEXT: vpcmpgtd (%rsi){1to16}, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -7362,6 +7387,7 @@ ; NoVLX-NEXT: vpcmpgtd %zmm1, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -7389,6 +7415,7 @@ ; NoVLX-NEXT: vpcmpgtd (%rsi), %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -7443,6 +7470,7 @@ ; NoVLX-NEXT: vpcmpgtd (%rsi){1to16}, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -9678,6 +9706,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -9708,6 +9737,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -9791,6 +9821,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -9821,6 +9852,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -10401,6 +10433,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -10432,6 +10465,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -10518,6 +10552,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -10549,6 +10584,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -12068,6 +12104,7 @@ ; NoVLX-NEXT: vpcmpnltd %zmm1, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -12095,6 +12132,7 @@ ; NoVLX-NEXT: vpcmpnltd (%rsi), %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -12149,6 +12187,7 @@ ; NoVLX-NEXT: vpcmpnltd (%rsi){1to16}, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -12226,6 +12265,7 @@ ; NoVLX-NEXT: vpcmpnltd %zmm1, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -12253,6 +12293,7 @@ ; NoVLX-NEXT: vpcmpnltd (%rsi), %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -12307,6 +12348,7 @@ ; NoVLX-NEXT: vpcmpnltd (%rsi){1to16}, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -14544,6 +14586,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -14574,6 +14617,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -14659,6 +14703,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -14689,6 +14734,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -15279,6 +15325,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -15310,6 +15357,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -15398,6 +15446,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -15429,6 +15478,7 @@ ; NoVLX-NEXT: vptestmd %zmm0, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -16952,6 +17002,7 @@ ; NoVLX-NEXT: vpcmpltud %zmm1, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -16979,6 +17030,7 @@ ; NoVLX-NEXT: vpcmpltud (%rsi), %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -17033,6 +17085,7 @@ ; NoVLX-NEXT: vpcmpltud (%rsi){1to16}, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -17110,6 +17163,7 @@ ; NoVLX-NEXT: vpcmpltud %zmm1, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -17137,6 +17191,7 @@ ; NoVLX-NEXT: vpcmpltud (%rsi), %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -17191,6 +17246,7 @@ ; NoVLX-NEXT: vpcmpltud (%rsi){1to16}, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -20717,6 +20773,7 @@ ; NoVLX-NEXT: vcmpeqps %zmm1, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -20744,6 +20801,7 @@ ; NoVLX-NEXT: vcmpeqps (%rsi), %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -20772,6 +20830,7 @@ ; NoVLX-NEXT: vcmpeqps (%rsi){1to16}, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -20811,6 +20870,7 @@ ; VLX-NEXT: vcmpleps {sae}, %zmm1, %zmm0, %k0 ; VLX-NEXT: kmovd %k0, %eax ; VLX-NEXT: andl %edi, %eax +; VLX-NEXT: movzwl %ax, %eax ; VLX-NEXT: vzeroupper ; VLX-NEXT: retq ; @@ -20819,6 +20879,7 @@ ; NoVLX-NEXT: vcmpleps {sae}, %zmm1, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -20920,6 +20981,7 @@ ; NoVLX-NEXT: vcmpeqps %zmm1, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -20947,6 +21009,7 @@ ; NoVLX-NEXT: vcmpeqps (%rsi), %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -20975,6 +21038,7 @@ ; NoVLX-NEXT: vcmpeqps (%rsi){1to16}, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: @@ -21014,6 +21078,7 @@ ; VLX-NEXT: vcmpleps {sae}, %zmm1, %zmm0, %k0 ; VLX-NEXT: kmovd %k0, %eax ; VLX-NEXT: andl %edi, %eax +; VLX-NEXT: movzwl %ax, %eax ; VLX-NEXT: vzeroupper ; VLX-NEXT: retq ; @@ -21022,6 +21087,7 @@ ; NoVLX-NEXT: vcmpleps {sae}, %zmm1, %zmm0, %k0 ; NoVLX-NEXT: kmovw %k0, %eax ; NoVLX-NEXT: andl %edi, %eax +; NoVLX-NEXT: movzwl %ax, %eax ; NoVLX-NEXT: vzeroupper ; NoVLX-NEXT: retq entry: diff --git a/llvm/test/CodeGen/X86/bitcast-int-to-vector-bool.ll b/llvm/test/CodeGen/X86/bitcast-int-to-vector-bool.ll --- a/llvm/test/CodeGen/X86/bitcast-int-to-vector-bool.ll +++ b/llvm/test/CodeGen/X86/bitcast-int-to-vector-bool.ll @@ -8,7 +8,8 @@ define <2 x i1> @bitcast_i2_2i1(i2 zeroext %a0) { ; SSE2-SSSE3-LABEL: bitcast_i2_2i1: ; SSE2-SSSE3: # %bb.0: -; SSE2-SSSE3-NEXT: movd %edi, %xmm0 +; SSE2-SSSE3-NEXT: movzbl %dil, %eax +; SSE2-SSSE3-NEXT: movd %eax, %xmm0 ; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,0,1] ; SSE2-SSSE3-NEXT: movdqa {{.*#+}} xmm0 = [1,2] ; SSE2-SSSE3-NEXT: pand %xmm0, %xmm1 @@ -20,7 +21,8 @@ ; ; AVX1-LABEL: bitcast_i2_2i1: ; AVX1: # %bb.0: -; AVX1-NEXT: vmovd %edi, %xmm0 +; AVX1-NEXT: movzbl %dil, %eax +; AVX1-NEXT: vmovd %eax, %xmm0 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1] ; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2] ; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0 @@ -30,7 +32,8 @@ ; ; AVX2-LABEL: bitcast_i2_2i1: ; AVX2: # %bb.0: -; AVX2-NEXT: vmovd %edi, %xmm0 +; AVX2-NEXT: movzbl %dil, %eax +; AVX2-NEXT: vmovd %eax, %xmm0 ; AVX2-NEXT: vpbroadcastq %xmm0, %xmm0 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2] ; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0 @@ -51,7 +54,8 @@ define <4 x i1> @bitcast_i4_4i1(i4 zeroext %a0) { ; SSE2-SSSE3-LABEL: bitcast_i4_4i1: ; SSE2-SSSE3: # %bb.0: -; SSE2-SSSE3-NEXT: movd %edi, %xmm0 +; SSE2-SSSE3-NEXT: movzbl %dil, %eax +; SSE2-SSSE3-NEXT: movd %eax, %xmm0 ; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0] ; SSE2-SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [1,2,4,8] ; SSE2-SSSE3-NEXT: pand %xmm1, %xmm0 @@ -61,7 +65,8 @@ ; ; AVX1-LABEL: bitcast_i4_4i1: ; AVX1: # %bb.0: -; AVX1-NEXT: vmovd %edi, %xmm0 +; AVX1-NEXT: movzbl %dil, %eax +; AVX1-NEXT: vmovd %eax, %xmm0 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0] ; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,4,8] ; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0 @@ -71,7 +76,8 @@ ; ; AVX2-LABEL: bitcast_i4_4i1: ; AVX2: # %bb.0: -; AVX2-NEXT: vmovd %edi, %xmm0 +; AVX2-NEXT: movzbl %dil, %eax +; AVX2-NEXT: vmovd %eax, %xmm0 ; AVX2-NEXT: vpbroadcastd %xmm0, %xmm0 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,4,8] ; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0 diff --git a/llvm/test/CodeGen/X86/bool-ext-inc.ll b/llvm/test/CodeGen/X86/bool-ext-inc.ll --- a/llvm/test/CodeGen/X86/bool-ext-inc.ll +++ b/llvm/test/CodeGen/X86/bool-ext-inc.ll @@ -129,9 +129,10 @@ define i32 @assertsext_sub_1(i1 signext %cond, i32 %y) { ; CHECK-LABEL: assertsext_sub_1: ; CHECK: # %bb.0: -; CHECK-NEXT: # kill: def $esi killed $esi def $rsi -; CHECK-NEXT: # kill: def $edi killed $edi def $rdi -; CHECK-NEXT: leal (%rdi,%rsi), %eax +; CHECK-NEXT: movl %esi, %eax +; CHECK-NEXT: movzbl %dil, %ecx +; CHECK-NEXT: andl $1, %ecx +; CHECK-NEXT: subl %ecx, %eax ; CHECK-NEXT: retq %e = zext i1 %cond to i32 %r = sub i32 %y, %e @@ -141,8 +142,9 @@ define i32 @assertsext_add_1(i1 signext %cond, i32 %y) { ; CHECK-LABEL: assertsext_add_1: ; CHECK: # %bb.0: -; CHECK-NEXT: movl %esi, %eax -; CHECK-NEXT: subl %edi, %eax +; CHECK-NEXT: movzbl %dil, %eax +; CHECK-NEXT: andl $1, %eax +; CHECK-NEXT: addl %esi, %eax ; CHECK-NEXT: retq %e = zext i1 %cond to i32 %r = add i32 %e, %y @@ -152,8 +154,9 @@ define i32 @assertsext_add_1_commute(i1 signext %cond, i32 %y) { ; CHECK-LABEL: assertsext_add_1_commute: ; CHECK: # %bb.0: -; CHECK-NEXT: movl %esi, %eax -; CHECK-NEXT: subl %edi, %eax +; CHECK-NEXT: movzbl %dil, %eax +; CHECK-NEXT: andl $1, %eax +; CHECK-NEXT: addl %esi, %eax ; CHECK-NEXT: retq %e = zext i1 %cond to i32 %r = add i32 %y, %e diff --git a/llvm/test/CodeGen/X86/bool-zext.ll b/llvm/test/CodeGen/X86/bool-zext.ll --- a/llvm/test/CodeGen/X86/bool-zext.ll +++ b/llvm/test/CodeGen/X86/bool-zext.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X32 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64 -; It's not necessary to zero-extend the arg because it is specified 'zeroext'. +; It's not necessary to zero-extend the arg because it is specified 'zeroext'. define void @bar1(i1 zeroext %v1) nounwind ssp { ; X32-LABEL: bar1: ; X32: # %bb.0: @@ -14,6 +14,7 @@ ; ; X64-LABEL: bar1: ; X64: # %bb.0: +; X64-NEXT: movzbl %dil, %edi ; X64-NEXT: xorl %eax, %eax ; X64-NEXT: jmp foo1 # TAILCALL %conv = zext i1 %v1 to i32 @@ -33,6 +34,7 @@ ; ; X64-LABEL: bar2: ; X64: # %bb.0: +; X64-NEXT: movzbl %dil, %edi ; X64-NEXT: xorl %eax, %eax ; X64-NEXT: jmp foo1 # TAILCALL %conv = zext i8 %v1 to i32 diff --git a/llvm/test/CodeGen/X86/cmp.ll b/llvm/test/CodeGen/X86/cmp.ll --- a/llvm/test/CodeGen/X86/cmp.ll +++ b/llvm/test/CodeGen/X86/cmp.ll @@ -489,7 +489,8 @@ define i32 @pr42189(i16 signext %c) { ; CHECK-LABEL: pr42189: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: cmpl $32767, %edi # encoding: [0x81,0xff,0xff,0x7f,0x00,0x00] +; CHECK-NEXT: movzwl %di, %eax # encoding: [0x0f,0xb7,0xc7] +; CHECK-NEXT: cmpl $32767, %eax # encoding: [0x3d,0xff,0x7f,0x00,0x00] ; CHECK-NEXT: # imm = 0x7FFF ; CHECK-NEXT: jne .LBB26_2 # encoding: [0x75,A] ; CHECK-NEXT: # fixup A - offset: 1, value: .LBB26_2-1, kind: FK_PCRel_1 diff --git a/llvm/test/CodeGen/X86/commute-two-addr.ll b/llvm/test/CodeGen/X86/commute-two-addr.ll --- a/llvm/test/CodeGen/X86/commute-two-addr.ll +++ b/llvm/test/CodeGen/X86/commute-two-addr.ll @@ -40,6 +40,8 @@ ; DARWIN-LABEL: t3: ; DARWIN: shlq $32, %rcx ; DARWIN-NEXT: orq %rcx, %rax +; DARWIN-NEXT: movzbl %sil, %ecx +; DARWIN-NEXT: movzbl %r8b, %esi ; DARWIN-NEXT: shll $8 ; DARWIN-NOT: leaq %tmp21 = zext i32 %lb to i64 diff --git a/llvm/test/CodeGen/X86/critical-edge-split-2.ll b/llvm/test/CodeGen/X86/critical-edge-split-2.ll --- a/llvm/test/CodeGen/X86/critical-edge-split-2.ll +++ b/llvm/test/CodeGen/X86/critical-edge-split-2.ll @@ -12,7 +12,7 @@ ; CHECK-LABEL: test1: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movw $1, %ax -; CHECK-NEXT: testl %edi, %edi +; CHECK-NEXT: testb %dil, %dil ; CHECK-NEXT: jne .LBB0_2 ; CHECK-NEXT: # %bb.1: # %cond.false.i ; CHECK-NEXT: movl $g_4, %eax diff --git a/llvm/test/CodeGen/X86/dagcombine-shifts.ll b/llvm/test/CodeGen/X86/dagcombine-shifts.ll --- a/llvm/test/CodeGen/X86/dagcombine-shifts.ll +++ b/llvm/test/CodeGen/X86/dagcombine-shifts.ll @@ -14,7 +14,7 @@ ; CHECK-LABEL: fun1: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movl %edi, %eax -; CHECK-NEXT: andl $-16, %eax +; CHECK-NEXT: andl $240, %eax ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax ; CHECK-NEXT: retq entry: @@ -28,7 +28,7 @@ ; CHECK-LABEL: fun2: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movl %edi, %eax -; CHECK-NEXT: andl $-16, %eax +; CHECK-NEXT: andl $240, %eax ; CHECK-NEXT: retq entry: %shr = lshr i8 %v, 4 @@ -41,7 +41,7 @@ ; CHECK-LABEL: fun3: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movl %edi, %eax -; CHECK-NEXT: andl $-16, %eax +; CHECK-NEXT: andl $65520, %eax # imm = 0xFFF0 ; CHECK-NEXT: retq entry: %shr = lshr i16 %v, 4 @@ -54,7 +54,7 @@ ; CHECK-LABEL: fun4: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movl %edi, %eax -; CHECK-NEXT: andl $-16, %eax +; CHECK-NEXT: andl $240, %eax ; CHECK-NEXT: retq entry: %shr = lshr i8 %v, 4 @@ -67,7 +67,7 @@ ; CHECK-LABEL: fun5: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: movl %edi, %eax -; CHECK-NEXT: andl $-16, %eax +; CHECK-NEXT: andl $65520, %eax # imm = 0xFFF0 ; CHECK-NEXT: retq entry: %shr = lshr i16 %v, 4 @@ -157,11 +157,11 @@ define i64 @fun11(i16 zeroext %v) { ; CHECK-LABEL: fun11: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: # kill: def $edi killed $edi def $rdi -; CHECK-NEXT: shrl $4, %edi -; CHECK-NEXT: movq %rdi, %rax +; CHECK-NEXT: movzwl %di, %ecx +; CHECK-NEXT: shrl $4, %ecx +; CHECK-NEXT: movq %rcx, %rax ; CHECK-NEXT: shlq $4, %rax -; CHECK-NEXT: addq %rdi, %rax +; CHECK-NEXT: addq %rcx, %rax ; CHECK-NEXT: retq entry: %shr = lshr i16 %v, 4 diff --git a/llvm/test/CodeGen/X86/divide-by-constant.ll b/llvm/test/CodeGen/X86/divide-by-constant.ll --- a/llvm/test/CodeGen/X86/divide-by-constant.ll +++ b/llvm/test/CodeGen/X86/divide-by-constant.ll @@ -14,7 +14,8 @@ ; ; X64-LABEL: test1: ; X64: # %bb.0: # %entry -; X64-NEXT: imull $63551, %edi, %eax # imm = 0xF83F +; X64-NEXT: movzwl %di, %eax +; X64-NEXT: imull $63551, %eax, %eax # imm = 0xF83F ; X64-NEXT: shrl $21, %eax ; X64-NEXT: # kill: def $ax killed $ax killed $eax ; X64-NEXT: retq @@ -34,7 +35,8 @@ ; ; X64-LABEL: test2: ; X64: # %bb.0: # %entry -; X64-NEXT: imull $43691, %esi, %eax # imm = 0xAAAB +; X64-NEXT: movzwl %si, %eax +; X64-NEXT: imull $43691, %eax, %eax # imm = 0xAAAB ; X64-NEXT: shrl $17, %eax ; X64-NEXT: # kill: def $ax killed $ax killed $eax ; X64-NEXT: retq @@ -55,7 +57,8 @@ ; ; X64-LABEL: test3: ; X64: # %bb.0: # %entry -; X64-NEXT: imull $171, %esi, %eax +; X64-NEXT: movzbl %sil, %eax +; X64-NEXT: imull $171, %eax, %eax ; X64-NEXT: shrl $9, %eax ; X64-NEXT: # kill: def $al killed $al killed $eax ; X64-NEXT: retq @@ -78,7 +81,8 @@ ; ; X64-LABEL: test4: ; X64: # %bb.0: # %entry -; X64-NEXT: imull $1986, %edi, %eax # imm = 0x7C2 +; X64-NEXT: movswl %di, %eax +; X64-NEXT: imull $1986, %eax, %eax # imm = 0x7C2 ; X64-NEXT: movl %eax, %ecx ; X64-NEXT: shrl $31, %ecx ; X64-NEXT: shrl $16, %eax @@ -124,7 +128,8 @@ ; ; X64-LABEL: test6: ; X64: # %bb.0: # %entry -; X64-NEXT: imull $26215, %edi, %eax # imm = 0x6667 +; X64-NEXT: movswl %di, %eax +; X64-NEXT: imull $26215, %eax, %eax # imm = 0x6667 ; X64-NEXT: movl %eax, %ecx ; X64-NEXT: shrl $31, %ecx ; X64-NEXT: sarl $18, %eax diff --git a/llvm/test/CodeGen/X86/fdiv-combine.ll b/llvm/test/CodeGen/X86/fdiv-combine.ll --- a/llvm/test/CodeGen/X86/fdiv-combine.ll +++ b/llvm/test/CodeGen/X86/fdiv-combine.ll @@ -99,7 +99,7 @@ define float @div_select_constant_fold(i1 zeroext %arg) { ; CHECK-LABEL: div_select_constant_fold: ; CHECK: # %bb.0: -; CHECK-NEXT: testl %edi, %edi +; CHECK-NEXT: testb %dil, %dil ; CHECK-NEXT: jne .LBB6_1 ; CHECK-NEXT: # %bb.2: ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero diff --git a/llvm/test/CodeGen/X86/fp128-select.ll b/llvm/test/CodeGen/X86/fp128-select.ll --- a/llvm/test/CodeGen/X86/fp128-select.ll +++ b/llvm/test/CodeGen/X86/fp128-select.ll @@ -11,7 +11,7 @@ define void @test_select(fp128* %p, fp128* %q, i1 zeroext %c) { ; SSE-LABEL: test_select: ; SSE: # %bb.0: -; SSE-NEXT: testl %edx, %edx +; SSE-NEXT: testb %dl, %dl ; SSE-NEXT: jne .LBB0_1 ; SSE-NEXT: # %bb.2: ; SSE-NEXT: movaps {{.*}}(%rip), %xmm0 @@ -25,7 +25,7 @@ ; NOSSE-LABEL: test_select: ; NOSSE: # %bb.0: ; NOSSE-NEXT: xorl %eax, %eax -; NOSSE-NEXT: testl %edx, %edx +; NOSSE-NEXT: testb %dl, %dl ; NOSSE-NEXT: cmovneq (%rdi), %rax ; NOSSE-NEXT: movabsq $9223231299366420480, %rcx # imm = 0x7FFF800000000000 ; NOSSE-NEXT: cmovneq 8(%rdi), %rcx diff --git a/llvm/test/CodeGen/X86/illegal-bitfield-loadstore.ll b/llvm/test/CodeGen/X86/illegal-bitfield-loadstore.ll --- a/llvm/test/CodeGen/X86/illegal-bitfield-loadstore.ll +++ b/llvm/test/CodeGen/X86/illegal-bitfield-loadstore.ll @@ -86,15 +86,16 @@ ; ; X64-LABEL: i24_insert_bit: ; X64: # %bb.0: -; X64-NEXT: movzwl (%rdi), %eax -; X64-NEXT: movzbl 2(%rdi), %ecx -; X64-NEXT: movb %cl, 2(%rdi) -; X64-NEXT: shll $16, %ecx -; X64-NEXT: orl %eax, %ecx -; X64-NEXT: shll $13, %esi -; X64-NEXT: andl $16769023, %ecx # imm = 0xFFDFFF -; X64-NEXT: orl %esi, %ecx -; X64-NEXT: movw %cx, (%rdi) +; X64-NEXT: movzbl %sil, %eax +; X64-NEXT: movzwl (%rdi), %ecx +; X64-NEXT: movzbl 2(%rdi), %edx +; X64-NEXT: movb %dl, 2(%rdi) +; X64-NEXT: shll $16, %edx +; X64-NEXT: orl %ecx, %edx +; X64-NEXT: shll $13, %eax +; X64-NEXT: andl $16769023, %edx # imm = 0xFFDFFF +; X64-NEXT: orl %eax, %edx +; X64-NEXT: movw %dx, (%rdi) ; X64-NEXT: retq %extbit = zext i1 %bit to i24 %b = load i24, i24* %a, align 1 @@ -183,7 +184,7 @@ ; ; X64-LABEL: i56_insert_bit: ; X64: # %bb.0: -; X64-NEXT: movl %esi, %eax +; X64-NEXT: movzbl %sil, %eax ; X64-NEXT: movzwl 4(%rdi), %ecx ; X64-NEXT: movzbl 6(%rdi), %edx ; X64-NEXT: movb %dl, 6(%rdi) diff --git a/llvm/test/CodeGen/X86/known-signbits-vector.ll b/llvm/test/CodeGen/X86/known-signbits-vector.ll --- a/llvm/test/CodeGen/X86/known-signbits-vector.ll +++ b/llvm/test/CodeGen/X86/known-signbits-vector.ll @@ -36,8 +36,10 @@ ; ; X64-LABEL: signbits_sext_v4i64_sitofp_v4f32: ; X64: # %bb.0: -; X64-NEXT: vmovd %edi, %xmm0 -; X64-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0 +; X64-NEXT: movswl %si, %eax +; X64-NEXT: movsbl %dil, %esi +; X64-NEXT: vmovd %esi, %xmm0 +; X64-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0 ; X64-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0 ; X64-NEXT: vpinsrd $3, %ecx, %xmm0, %xmm0 ; X64-NEXT: vcvtdq2ps %xmm0, %xmm0 diff --git a/llvm/test/CodeGen/X86/mask-negated-bool.ll b/llvm/test/CodeGen/X86/mask-negated-bool.ll --- a/llvm/test/CodeGen/X86/mask-negated-bool.ll +++ b/llvm/test/CodeGen/X86/mask-negated-bool.ll @@ -16,7 +16,7 @@ define i32 @mask_negated_zext_bool2(i1 zeroext %x) { ; CHECK-LABEL: mask_negated_zext_bool2: ; CHECK: # %bb.0: -; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: movzbl %dil, %eax ; CHECK-NEXT: retq %ext = zext i1 %x to i32 %neg = sub i32 0, %ext @@ -50,7 +50,7 @@ define i32 @mask_negated_sext_bool2(i1 zeroext %x) { ; CHECK-LABEL: mask_negated_sext_bool2: ; CHECK: # %bb.0: -; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: movzbl %dil, %eax ; CHECK-NEXT: retq %ext = sext i1 %x to i32 %neg = sub i32 0, %ext diff --git a/llvm/test/CodeGen/X86/negate-i1.ll b/llvm/test/CodeGen/X86/negate-i1.ll --- a/llvm/test/CodeGen/X86/negate-i1.ll +++ b/llvm/test/CodeGen/X86/negate-i1.ll @@ -61,7 +61,7 @@ define i16 @select_i16_neg1_or_0_zeroext(i1 zeroext %a) { ; X64-LABEL: select_i16_neg1_or_0_zeroext: ; X64: # %bb.0: -; X64-NEXT: movl %edi, %eax +; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: negl %eax ; X64-NEXT: # kill: def $ax killed $ax killed $eax ; X64-NEXT: retq @@ -97,7 +97,7 @@ define i32 @select_i32_neg1_or_0_zeroext(i1 zeroext %a) { ; X64-LABEL: select_i32_neg1_or_0_zeroext: ; X64: # %bb.0: -; X64-NEXT: movl %edi, %eax +; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: negl %eax ; X64-NEXT: retq ; @@ -132,7 +132,7 @@ define i64 @select_i64_neg1_or_0_zeroext(i1 zeroext %a) { ; X64-LABEL: select_i64_neg1_or_0_zeroext: ; X64: # %bb.0: -; X64-NEXT: movl %edi, %eax +; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: negq %rax ; X64-NEXT: retq ; diff --git a/llvm/test/CodeGen/X86/select_const.ll b/llvm/test/CodeGen/X86/select_const.ll --- a/llvm/test/CodeGen/X86/select_const.ll +++ b/llvm/test/CodeGen/X86/select_const.ll @@ -53,7 +53,7 @@ define i32 @select_1_or_0_zeroext(i1 zeroext %cond) { ; CHECK-LABEL: select_1_or_0_zeroext: ; CHECK: # %bb.0: -; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: movzbl %dil, %eax ; CHECK-NEXT: retq %sel = select i1 %cond, i32 1, i32 0 ret i32 %sel @@ -62,7 +62,7 @@ define i32 @select_1_or_0_signext(i1 signext %cond) { ; CHECK-LABEL: select_1_or_0_signext: ; CHECK: # %bb.0: -; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: movzbl %dil, %eax ; CHECK-NEXT: andl $1, %eax ; CHECK-NEXT: retq %sel = select i1 %cond, i32 1, i32 0 @@ -85,8 +85,8 @@ define i32 @select_0_or_neg1_zeroext(i1 zeroext %cond) { ; CHECK-LABEL: select_0_or_neg1_zeroext: ; CHECK: # %bb.0: -; CHECK-NEXT: # kill: def $edi killed $edi def $rdi -; CHECK-NEXT: leal -1(%rdi), %eax +; CHECK-NEXT: movzbl %dil, %eax +; CHECK-NEXT: decl %eax ; CHECK-NEXT: retq %sel = select i1 %cond, i32 0, i32 -1 ret i32 %sel @@ -95,8 +95,9 @@ define i32 @select_0_or_neg1_signext(i1 signext %cond) { ; CHECK-LABEL: select_0_or_neg1_signext: ; CHECK: # %bb.0: -; CHECK-NEXT: movl %edi, %eax -; CHECK-NEXT: notl %eax +; CHECK-NEXT: movzbl %dil, %eax +; CHECK-NEXT: andl $1, %eax +; CHECK-NEXT: decl %eax ; CHECK-NEXT: retq %sel = select i1 %cond, i32 0, i32 -1 ret i32 %sel @@ -118,7 +119,7 @@ define i32 @select_neg1_or_0_zeroext(i1 zeroext %cond) { ; CHECK-LABEL: select_neg1_or_0_zeroext: ; CHECK: # %bb.0: -; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: movzbl %dil, %eax ; CHECK-NEXT: negl %eax ; CHECK-NEXT: retq %sel = select i1 %cond, i32 -1, i32 0 @@ -128,7 +129,7 @@ define i32 @select_neg1_or_0_signext(i1 signext %cond) { ; CHECK-LABEL: select_neg1_or_0_signext: ; CHECK: # %bb.0: -; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: movsbl %dil, %eax ; CHECK-NEXT: retq %sel = select i1 %cond, i32 -1, i32 0 ret i32 %sel @@ -150,8 +151,8 @@ define i32 @select_Cplus1_C_zeroext(i1 zeroext %cond) { ; CHECK-LABEL: select_Cplus1_C_zeroext: ; CHECK: # %bb.0: -; CHECK-NEXT: # kill: def $edi killed $edi def $rdi -; CHECK-NEXT: leal 41(%rdi), %eax +; CHECK-NEXT: movzbl %dil, %eax +; CHECK-NEXT: addl $41, %eax ; CHECK-NEXT: retq %sel = select i1 %cond, i32 42, i32 41 ret i32 %sel @@ -160,8 +161,9 @@ define i32 @select_Cplus1_C_signext(i1 signext %cond) { ; CHECK-LABEL: select_Cplus1_C_signext: ; CHECK: # %bb.0: -; CHECK-NEXT: movl $41, %eax -; CHECK-NEXT: subl %edi, %eax +; CHECK-NEXT: movzbl %dil, %eax +; CHECK-NEXT: andl $1, %eax +; CHECK-NEXT: addl $41, %eax ; CHECK-NEXT: retq %sel = select i1 %cond, i32 42, i32 41 ret i32 %sel @@ -183,8 +185,9 @@ define i32 @select_C_Cplus1_zeroext(i1 zeroext %cond) { ; CHECK-LABEL: select_C_Cplus1_zeroext: ; CHECK: # %bb.0: +; CHECK-NEXT: movzbl %dil, %ecx ; CHECK-NEXT: movl $42, %eax -; CHECK-NEXT: subl %edi, %eax +; CHECK-NEXT: subl %ecx, %eax ; CHECK-NEXT: retq %sel = select i1 %cond, i32 41, i32 42 ret i32 %sel @@ -193,8 +196,10 @@ define i32 @select_C_Cplus1_signext(i1 signext %cond) { ; CHECK-LABEL: select_C_Cplus1_signext: ; CHECK: # %bb.0: -; CHECK-NEXT: # kill: def $edi killed $edi def $rdi -; CHECK-NEXT: leal 42(%rdi), %eax +; CHECK-NEXT: movzbl %dil, %ecx +; CHECK-NEXT: andl $1, %ecx +; CHECK-NEXT: movl $42, %eax +; CHECK-NEXT: subl %ecx, %eax ; CHECK-NEXT: retq %sel = select i1 %cond, i32 41, i32 42 ret i32 %sel @@ -353,9 +358,9 @@ define i32 @select_pow2_diff_neg(i1 zeroext %cond) { ; CHECK-LABEL: select_pow2_diff_neg: ; CHECK: # %bb.0: -; CHECK-NEXT: # kill: def $edi killed $edi def $rdi -; CHECK-NEXT: shll $4, %edi -; CHECK-NEXT: leal -25(%rdi), %eax +; CHECK-NEXT: movzbl %dil, %eax +; CHECK-NEXT: shll $4, %eax +; CHECK-NEXT: orl $-25, %eax ; CHECK-NEXT: retq %sel = select i1 %cond, i32 -9, i32 -25 ret i32 %sel @@ -408,7 +413,7 @@ define i32 @select_C1_C2_zeroext(i1 zeroext %cond) { ; CHECK-LABEL: select_C1_C2_zeroext: ; CHECK: # %bb.0: -; CHECK-NEXT: testl %edi, %edi +; CHECK-NEXT: testb %dil, %dil ; CHECK-NEXT: movl $421, %ecx # imm = 0x1A5 ; CHECK-NEXT: movl $42, %eax ; CHECK-NEXT: cmovnel %ecx, %eax diff --git a/llvm/test/CodeGen/X86/sext-i1.ll b/llvm/test/CodeGen/X86/sext-i1.ll --- a/llvm/test/CodeGen/X86/sext-i1.ll +++ b/llvm/test/CodeGen/X86/sext-i1.ll @@ -145,8 +145,8 @@ ; ; X64-LABEL: select_0_or_1s_zeroext: ; X64: # %bb.0: -; X64-NEXT: # kill: def $edi killed $edi def $rdi -; X64-NEXT: leal -1(%rdi), %eax +; X64-NEXT: movzbl %dil, %eax +; X64-NEXT: decl %eax ; X64-NEXT: retq %not = xor i1 %cond, 1 %sext = sext i1 %not to i32 @@ -165,8 +165,9 @@ ; ; X64-LABEL: select_0_or_1s_signext: ; X64: # %bb.0: -; X64-NEXT: movl %edi, %eax -; X64-NEXT: notl %eax +; X64-NEXT: movzbl %dil, %eax +; X64-NEXT: andl $1, %eax +; X64-NEXT: decl %eax ; X64-NEXT: retq %not = xor i1 %cond, 1 %sext = sext i1 %not to i32 diff --git a/llvm/test/CodeGen/X86/shift_minsize.ll b/llvm/test/CodeGen/X86/shift_minsize.ll --- a/llvm/test/CodeGen/X86/shift_minsize.ll +++ b/llvm/test/CodeGen/X86/shift_minsize.ll @@ -92,6 +92,7 @@ ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: pushq %rax ; CHECK-NEXT: .cfi_def_cfa_offset 16 +; CHECK-NEXT: movsbl %dl, %edx ; CHECK-NEXT: callq __ashrti3 ; CHECK-NEXT: popq %rcx ; CHECK-NEXT: .cfi_def_cfa_offset 8 diff --git a/llvm/test/CodeGen/X86/split-store.ll b/llvm/test/CodeGen/X86/split-store.ll --- a/llvm/test/CodeGen/X86/split-store.ll +++ b/llvm/test/CodeGen/X86/split-store.ll @@ -197,11 +197,13 @@ define void @int7_int7_pair(i7 signext %tmp1, i7 signext %tmp2, i14* %ref.tmp) { ; CHECK-LABEL: int7_int7_pair: ; CHECK: # %bb.0: -; CHECK-NEXT: shll $7, %esi -; CHECK-NEXT: andl $127, %edi -; CHECK-NEXT: orl %esi, %edi -; CHECK-NEXT: andl $16383, %edi # imm = 0x3FFF -; CHECK-NEXT: movw %di, (%rdx) +; CHECK-NEXT: movzbl %sil, %eax +; CHECK-NEXT: shll $7, %eax +; CHECK-NEXT: movzbl %dil, %ecx +; CHECK-NEXT: andl $127, %ecx +; CHECK-NEXT: orl %eax, %ecx +; CHECK-NEXT: andl $16383, %ecx # imm = 0x3FFF +; CHECK-NEXT: movw %cx, (%rdx) ; CHECK-NEXT: retq %t1 = zext i7 %tmp2 to i14 %t2 = shl nuw i14 %t1, 7 diff --git a/llvm/test/CodeGen/X86/usub_sat.ll b/llvm/test/CodeGen/X86/usub_sat.ll --- a/llvm/test/CodeGen/X86/usub_sat.ll +++ b/llvm/test/CodeGen/X86/usub_sat.ll @@ -112,11 +112,13 @@ ; ; X64-LABEL: func3: ; X64: # %bb.0: -; X64-NEXT: cmpb %sil, %dil -; X64-NEXT: movl %esi, %eax -; X64-NEXT: cmoval %edi, %eax -; X64-NEXT: subb %sil, %al -; X64-NEXT: movzbl %al, %eax +; X64-NEXT: movzbl %dil, %eax +; X64-NEXT: movzbl %sil, %ecx +; X64-NEXT: cmpb %cl, %al +; X64-NEXT: movl %ecx, %edx +; X64-NEXT: cmoval %eax, %edx +; X64-NEXT: subb %cl, %dl +; X64-NEXT: movzbl %dl, %eax ; X64-NEXT: andl $15, %eax ; X64-NEXT: retq %tmp = call i4 @llvm.usub.sat.i4(i4 %x, i4 %y) diff --git a/llvm/test/CodeGen/X86/usub_sat_plus.ll b/llvm/test/CodeGen/X86/usub_sat_plus.ll --- a/llvm/test/CodeGen/X86/usub_sat_plus.ll +++ b/llvm/test/CodeGen/X86/usub_sat_plus.ll @@ -137,8 +137,9 @@ ; X64-NEXT: movl %eax, %ecx ; X64-NEXT: andb $15, %cl ; X64-NEXT: movzbl %cl, %ecx -; X64-NEXT: cmpb %cl, %dil -; X64-NEXT: cmoval %edi, %ecx +; X64-NEXT: movzbl %dil, %edx +; X64-NEXT: cmpb %cl, %dl +; X64-NEXT: cmoval %edx, %ecx ; X64-NEXT: subb %al, %cl ; X64-NEXT: movzbl %cl, %eax ; X64-NEXT: andl $15, %eax diff --git a/llvm/test/CodeGen/X86/x86-64-arg.ll b/llvm/test/CodeGen/X86/x86-64-arg.ll deleted file mode 100644 --- a/llvm/test/CodeGen/X86/x86-64-arg.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: llc < %s | grep "movl %edi, %eax" -; The input value is already sign extended, don't re-extend it. -; This testcase corresponds to: -; int test(short X) { return (int)X; } - -target datalayout = "e-p:64:64" -target triple = "x86_64-apple-darwin8" - - -define i32 @test(i16 signext %X) { -entry: - %tmp12 = sext i16 %X to i32 ; [#uses=1] - ret i32 %tmp12 -} -