diff --git a/llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp b/llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp --- a/llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp +++ b/llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp @@ -653,11 +653,20 @@ Value *createMulAdd(Value *Sum, Value *A, Value *B, bool UseFPOp, IRBuilder<> &Builder) { - Value *Mul = UseFPOp ? Builder.CreateFMul(A, B) : Builder.CreateMul(A, B); + if (!Sum) - return Mul; + return UseFPOp ? Builder.CreateFMul(A, B) : Builder.CreateMul(A, B); + + // Use fmuladd for floating point operations and let the backend decide if + // that's profitable. + if (UseFPOp) { + Value *FMulAdd = Intrinsic::getDeclaration( + Func.getParent(), Intrinsic::fmuladd, A->getType()); + return Builder.CreateCall(FMulAdd, {A, B, Sum}); + } - return UseFPOp ? Builder.CreateFAdd(Sum, Mul) : Builder.CreateAdd(Sum, Mul); + Value *Mul = Builder.CreateMul(A, B); + return Builder.CreateAdd(Sum, Mul); } /// Cache \p Matrix as result of \p Inst and update the uses of \p Inst. For diff --git a/llvm/test/Transforms/LowerMatrixIntrinsics/bigger-expressions-double.ll b/llvm/test/Transforms/LowerMatrixIntrinsics/bigger-expressions-double.ll --- a/llvm/test/Transforms/LowerMatrixIntrinsics/bigger-expressions-double.ll +++ b/llvm/test/Transforms/LowerMatrixIntrinsics/bigger-expressions-double.ll @@ -60,180 +60,162 @@ ; CHECK-NEXT: [[TMP38:%.*]] = extractelement <3 x double> [[TMP11]], i64 1 ; CHECK-NEXT: [[SPLAT_SPLATINSERT2:%.*]] = insertelement <1 x double> undef, double [[TMP38]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT3:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT2]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP39:%.*]] = fmul <1 x double> [[BLOCK1]], [[SPLAT_SPLAT3]] -; CHECK-NEXT: [[TMP40:%.*]] = fadd <1 x double> [[TMP37]], [[TMP39]] +; CHECK-NEXT: [[TMP39:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK1]], <1 x double> [[SPLAT_SPLAT3]], <1 x double> [[TMP37]]) ; CHECK-NEXT: [[BLOCK4:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP41:%.*]] = extractelement <3 x double> [[TMP11]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT5:%.*]] = insertelement <1 x double> undef, double [[TMP41]], i32 0 +; CHECK-NEXT: [[TMP40:%.*]] = extractelement <3 x double> [[TMP11]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT5:%.*]] = insertelement <1 x double> undef, double [[TMP40]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT6:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT5]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP42:%.*]] = fmul <1 x double> [[BLOCK4]], [[SPLAT_SPLAT6]] -; CHECK-NEXT: [[TMP43:%.*]] = fadd <1 x double> [[TMP40]], [[TMP42]] -; CHECK-NEXT: [[TMP44:%.*]] = shufflevector <1 x double> [[TMP43]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP45:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP44]], <3 x i32> +; CHECK-NEXT: [[TMP41:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK4]], <1 x double> [[SPLAT_SPLAT6]], <1 x double> [[TMP39]]) +; CHECK-NEXT: [[TMP42:%.*]] = shufflevector <1 x double> [[TMP41]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP43:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP42]], <3 x i32> ; CHECK-NEXT: [[BLOCK7:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP46:%.*]] = extractelement <3 x double> [[TMP11]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT8:%.*]] = insertelement <1 x double> undef, double [[TMP46]], i32 0 +; CHECK-NEXT: [[TMP44:%.*]] = extractelement <3 x double> [[TMP11]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT8:%.*]] = insertelement <1 x double> undef, double [[TMP44]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT9:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT8]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP47:%.*]] = fmul <1 x double> [[BLOCK7]], [[SPLAT_SPLAT9]] +; CHECK-NEXT: [[TMP45:%.*]] = fmul <1 x double> [[BLOCK7]], [[SPLAT_SPLAT9]] ; CHECK-NEXT: [[BLOCK10:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP48:%.*]] = extractelement <3 x double> [[TMP11]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT11:%.*]] = insertelement <1 x double> undef, double [[TMP48]], i32 0 +; CHECK-NEXT: [[TMP46:%.*]] = extractelement <3 x double> [[TMP11]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT11:%.*]] = insertelement <1 x double> undef, double [[TMP46]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT12:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT11]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP49:%.*]] = fmul <1 x double> [[BLOCK10]], [[SPLAT_SPLAT12]] -; CHECK-NEXT: [[TMP50:%.*]] = fadd <1 x double> [[TMP47]], [[TMP49]] +; CHECK-NEXT: [[TMP47:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK10]], <1 x double> [[SPLAT_SPLAT12]], <1 x double> [[TMP45]]) ; CHECK-NEXT: [[BLOCK13:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP51:%.*]] = extractelement <3 x double> [[TMP11]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT14:%.*]] = insertelement <1 x double> undef, double [[TMP51]], i32 0 +; CHECK-NEXT: [[TMP48:%.*]] = extractelement <3 x double> [[TMP11]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT14:%.*]] = insertelement <1 x double> undef, double [[TMP48]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT15:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT14]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP52:%.*]] = fmul <1 x double> [[BLOCK13]], [[SPLAT_SPLAT15]] -; CHECK-NEXT: [[TMP53:%.*]] = fadd <1 x double> [[TMP50]], [[TMP52]] -; CHECK-NEXT: [[TMP54:%.*]] = shufflevector <1 x double> [[TMP53]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP55:%.*]] = shufflevector <3 x double> [[TMP45]], <3 x double> [[TMP54]], <3 x i32> +; CHECK-NEXT: [[TMP49:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK13]], <1 x double> [[SPLAT_SPLAT15]], <1 x double> [[TMP47]]) +; CHECK-NEXT: [[TMP50:%.*]] = shufflevector <1 x double> [[TMP49]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP51:%.*]] = shufflevector <3 x double> [[TMP43]], <3 x double> [[TMP50]], <3 x i32> ; CHECK-NEXT: [[BLOCK16:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP56:%.*]] = extractelement <3 x double> [[TMP11]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT17:%.*]] = insertelement <1 x double> undef, double [[TMP56]], i32 0 +; CHECK-NEXT: [[TMP52:%.*]] = extractelement <3 x double> [[TMP11]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT17:%.*]] = insertelement <1 x double> undef, double [[TMP52]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT18:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT17]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP57:%.*]] = fmul <1 x double> [[BLOCK16]], [[SPLAT_SPLAT18]] +; CHECK-NEXT: [[TMP53:%.*]] = fmul <1 x double> [[BLOCK16]], [[SPLAT_SPLAT18]] ; CHECK-NEXT: [[BLOCK19:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP58:%.*]] = extractelement <3 x double> [[TMP11]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT20:%.*]] = insertelement <1 x double> undef, double [[TMP58]], i32 0 +; CHECK-NEXT: [[TMP54:%.*]] = extractelement <3 x double> [[TMP11]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT20:%.*]] = insertelement <1 x double> undef, double [[TMP54]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT21:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT20]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP59:%.*]] = fmul <1 x double> [[BLOCK19]], [[SPLAT_SPLAT21]] -; CHECK-NEXT: [[TMP60:%.*]] = fadd <1 x double> [[TMP57]], [[TMP59]] +; CHECK-NEXT: [[TMP55:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK19]], <1 x double> [[SPLAT_SPLAT21]], <1 x double> [[TMP53]]) ; CHECK-NEXT: [[BLOCK22:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP61:%.*]] = extractelement <3 x double> [[TMP11]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT23:%.*]] = insertelement <1 x double> undef, double [[TMP61]], i32 0 +; CHECK-NEXT: [[TMP56:%.*]] = extractelement <3 x double> [[TMP11]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT23:%.*]] = insertelement <1 x double> undef, double [[TMP56]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT24:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT23]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP62:%.*]] = fmul <1 x double> [[BLOCK22]], [[SPLAT_SPLAT24]] -; CHECK-NEXT: [[TMP63:%.*]] = fadd <1 x double> [[TMP60]], [[TMP62]] -; CHECK-NEXT: [[TMP64:%.*]] = shufflevector <1 x double> [[TMP63]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP65:%.*]] = shufflevector <3 x double> [[TMP55]], <3 x double> [[TMP64]], <3 x i32> +; CHECK-NEXT: [[TMP57:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK22]], <1 x double> [[SPLAT_SPLAT24]], <1 x double> [[TMP55]]) +; CHECK-NEXT: [[TMP58:%.*]] = shufflevector <1 x double> [[TMP57]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP59:%.*]] = shufflevector <3 x double> [[TMP51]], <3 x double> [[TMP58]], <3 x i32> ; CHECK-NEXT: [[BLOCK25:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP66:%.*]] = extractelement <3 x double> [[TMP14]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT26:%.*]] = insertelement <1 x double> undef, double [[TMP66]], i32 0 +; CHECK-NEXT: [[TMP60:%.*]] = extractelement <3 x double> [[TMP14]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT26:%.*]] = insertelement <1 x double> undef, double [[TMP60]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT27:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT26]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP67:%.*]] = fmul <1 x double> [[BLOCK25]], [[SPLAT_SPLAT27]] +; CHECK-NEXT: [[TMP61:%.*]] = fmul <1 x double> [[BLOCK25]], [[SPLAT_SPLAT27]] ; CHECK-NEXT: [[BLOCK28:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP68:%.*]] = extractelement <3 x double> [[TMP14]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT29:%.*]] = insertelement <1 x double> undef, double [[TMP68]], i32 0 +; CHECK-NEXT: [[TMP62:%.*]] = extractelement <3 x double> [[TMP14]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT29:%.*]] = insertelement <1 x double> undef, double [[TMP62]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT30:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT29]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP69:%.*]] = fmul <1 x double> [[BLOCK28]], [[SPLAT_SPLAT30]] -; CHECK-NEXT: [[TMP70:%.*]] = fadd <1 x double> [[TMP67]], [[TMP69]] +; CHECK-NEXT: [[TMP63:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK28]], <1 x double> [[SPLAT_SPLAT30]], <1 x double> [[TMP61]]) ; CHECK-NEXT: [[BLOCK31:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP71:%.*]] = extractelement <3 x double> [[TMP14]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT32:%.*]] = insertelement <1 x double> undef, double [[TMP71]], i32 0 +; CHECK-NEXT: [[TMP64:%.*]] = extractelement <3 x double> [[TMP14]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT32:%.*]] = insertelement <1 x double> undef, double [[TMP64]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT33:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT32]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP72:%.*]] = fmul <1 x double> [[BLOCK31]], [[SPLAT_SPLAT33]] -; CHECK-NEXT: [[TMP73:%.*]] = fadd <1 x double> [[TMP70]], [[TMP72]] -; CHECK-NEXT: [[TMP74:%.*]] = shufflevector <1 x double> [[TMP73]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP75:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP74]], <3 x i32> +; CHECK-NEXT: [[TMP65:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK31]], <1 x double> [[SPLAT_SPLAT33]], <1 x double> [[TMP63]]) +; CHECK-NEXT: [[TMP66:%.*]] = shufflevector <1 x double> [[TMP65]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP67:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP66]], <3 x i32> ; CHECK-NEXT: [[BLOCK34:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP76:%.*]] = extractelement <3 x double> [[TMP14]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT35:%.*]] = insertelement <1 x double> undef, double [[TMP76]], i32 0 +; CHECK-NEXT: [[TMP68:%.*]] = extractelement <3 x double> [[TMP14]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT35:%.*]] = insertelement <1 x double> undef, double [[TMP68]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT36:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT35]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP77:%.*]] = fmul <1 x double> [[BLOCK34]], [[SPLAT_SPLAT36]] +; CHECK-NEXT: [[TMP69:%.*]] = fmul <1 x double> [[BLOCK34]], [[SPLAT_SPLAT36]] ; CHECK-NEXT: [[BLOCK37:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP78:%.*]] = extractelement <3 x double> [[TMP14]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT38:%.*]] = insertelement <1 x double> undef, double [[TMP78]], i32 0 +; CHECK-NEXT: [[TMP70:%.*]] = extractelement <3 x double> [[TMP14]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT38:%.*]] = insertelement <1 x double> undef, double [[TMP70]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT39:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT38]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP79:%.*]] = fmul <1 x double> [[BLOCK37]], [[SPLAT_SPLAT39]] -; CHECK-NEXT: [[TMP80:%.*]] = fadd <1 x double> [[TMP77]], [[TMP79]] +; CHECK-NEXT: [[TMP71:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK37]], <1 x double> [[SPLAT_SPLAT39]], <1 x double> [[TMP69]]) ; CHECK-NEXT: [[BLOCK40:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP81:%.*]] = extractelement <3 x double> [[TMP14]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT41:%.*]] = insertelement <1 x double> undef, double [[TMP81]], i32 0 +; CHECK-NEXT: [[TMP72:%.*]] = extractelement <3 x double> [[TMP14]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT41:%.*]] = insertelement <1 x double> undef, double [[TMP72]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT42:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT41]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP82:%.*]] = fmul <1 x double> [[BLOCK40]], [[SPLAT_SPLAT42]] -; CHECK-NEXT: [[TMP83:%.*]] = fadd <1 x double> [[TMP80]], [[TMP82]] -; CHECK-NEXT: [[TMP84:%.*]] = shufflevector <1 x double> [[TMP83]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP85:%.*]] = shufflevector <3 x double> [[TMP75]], <3 x double> [[TMP84]], <3 x i32> +; CHECK-NEXT: [[TMP73:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK40]], <1 x double> [[SPLAT_SPLAT42]], <1 x double> [[TMP71]]) +; CHECK-NEXT: [[TMP74:%.*]] = shufflevector <1 x double> [[TMP73]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP75:%.*]] = shufflevector <3 x double> [[TMP67]], <3 x double> [[TMP74]], <3 x i32> ; CHECK-NEXT: [[BLOCK43:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP86:%.*]] = extractelement <3 x double> [[TMP14]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT44:%.*]] = insertelement <1 x double> undef, double [[TMP86]], i32 0 +; CHECK-NEXT: [[TMP76:%.*]] = extractelement <3 x double> [[TMP14]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT44:%.*]] = insertelement <1 x double> undef, double [[TMP76]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT45:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT44]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP87:%.*]] = fmul <1 x double> [[BLOCK43]], [[SPLAT_SPLAT45]] +; CHECK-NEXT: [[TMP77:%.*]] = fmul <1 x double> [[BLOCK43]], [[SPLAT_SPLAT45]] ; CHECK-NEXT: [[BLOCK46:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP88:%.*]] = extractelement <3 x double> [[TMP14]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT47:%.*]] = insertelement <1 x double> undef, double [[TMP88]], i32 0 +; CHECK-NEXT: [[TMP78:%.*]] = extractelement <3 x double> [[TMP14]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT47:%.*]] = insertelement <1 x double> undef, double [[TMP78]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT48:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT47]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP89:%.*]] = fmul <1 x double> [[BLOCK46]], [[SPLAT_SPLAT48]] -; CHECK-NEXT: [[TMP90:%.*]] = fadd <1 x double> [[TMP87]], [[TMP89]] +; CHECK-NEXT: [[TMP79:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK46]], <1 x double> [[SPLAT_SPLAT48]], <1 x double> [[TMP77]]) ; CHECK-NEXT: [[BLOCK49:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP91:%.*]] = extractelement <3 x double> [[TMP14]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT50:%.*]] = insertelement <1 x double> undef, double [[TMP91]], i32 0 +; CHECK-NEXT: [[TMP80:%.*]] = extractelement <3 x double> [[TMP14]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT50:%.*]] = insertelement <1 x double> undef, double [[TMP80]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT51:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT50]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP92:%.*]] = fmul <1 x double> [[BLOCK49]], [[SPLAT_SPLAT51]] -; CHECK-NEXT: [[TMP93:%.*]] = fadd <1 x double> [[TMP90]], [[TMP92]] -; CHECK-NEXT: [[TMP94:%.*]] = shufflevector <1 x double> [[TMP93]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP95:%.*]] = shufflevector <3 x double> [[TMP85]], <3 x double> [[TMP94]], <3 x i32> +; CHECK-NEXT: [[TMP81:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK49]], <1 x double> [[SPLAT_SPLAT51]], <1 x double> [[TMP79]]) +; CHECK-NEXT: [[TMP82:%.*]] = shufflevector <1 x double> [[TMP81]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP83:%.*]] = shufflevector <3 x double> [[TMP75]], <3 x double> [[TMP82]], <3 x i32> ; CHECK-NEXT: [[BLOCK52:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP96:%.*]] = extractelement <3 x double> [[TMP17]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT53:%.*]] = insertelement <1 x double> undef, double [[TMP96]], i32 0 +; CHECK-NEXT: [[TMP84:%.*]] = extractelement <3 x double> [[TMP17]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT53:%.*]] = insertelement <1 x double> undef, double [[TMP84]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT54:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT53]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP97:%.*]] = fmul <1 x double> [[BLOCK52]], [[SPLAT_SPLAT54]] +; CHECK-NEXT: [[TMP85:%.*]] = fmul <1 x double> [[BLOCK52]], [[SPLAT_SPLAT54]] ; CHECK-NEXT: [[BLOCK55:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP98:%.*]] = extractelement <3 x double> [[TMP17]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT56:%.*]] = insertelement <1 x double> undef, double [[TMP98]], i32 0 +; CHECK-NEXT: [[TMP86:%.*]] = extractelement <3 x double> [[TMP17]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT56:%.*]] = insertelement <1 x double> undef, double [[TMP86]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT57:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT56]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP99:%.*]] = fmul <1 x double> [[BLOCK55]], [[SPLAT_SPLAT57]] -; CHECK-NEXT: [[TMP100:%.*]] = fadd <1 x double> [[TMP97]], [[TMP99]] +; CHECK-NEXT: [[TMP87:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK55]], <1 x double> [[SPLAT_SPLAT57]], <1 x double> [[TMP85]]) ; CHECK-NEXT: [[BLOCK58:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP101:%.*]] = extractelement <3 x double> [[TMP17]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT59:%.*]] = insertelement <1 x double> undef, double [[TMP101]], i32 0 +; CHECK-NEXT: [[TMP88:%.*]] = extractelement <3 x double> [[TMP17]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT59:%.*]] = insertelement <1 x double> undef, double [[TMP88]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT60:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT59]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP102:%.*]] = fmul <1 x double> [[BLOCK58]], [[SPLAT_SPLAT60]] -; CHECK-NEXT: [[TMP103:%.*]] = fadd <1 x double> [[TMP100]], [[TMP102]] -; CHECK-NEXT: [[TMP104:%.*]] = shufflevector <1 x double> [[TMP103]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP105:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP104]], <3 x i32> +; CHECK-NEXT: [[TMP89:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK58]], <1 x double> [[SPLAT_SPLAT60]], <1 x double> [[TMP87]]) +; CHECK-NEXT: [[TMP90:%.*]] = shufflevector <1 x double> [[TMP89]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP91:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP90]], <3 x i32> ; CHECK-NEXT: [[BLOCK61:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP106:%.*]] = extractelement <3 x double> [[TMP17]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT62:%.*]] = insertelement <1 x double> undef, double [[TMP106]], i32 0 +; CHECK-NEXT: [[TMP92:%.*]] = extractelement <3 x double> [[TMP17]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT62:%.*]] = insertelement <1 x double> undef, double [[TMP92]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT63:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT62]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP107:%.*]] = fmul <1 x double> [[BLOCK61]], [[SPLAT_SPLAT63]] +; CHECK-NEXT: [[TMP93:%.*]] = fmul <1 x double> [[BLOCK61]], [[SPLAT_SPLAT63]] ; CHECK-NEXT: [[BLOCK64:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP108:%.*]] = extractelement <3 x double> [[TMP17]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT65:%.*]] = insertelement <1 x double> undef, double [[TMP108]], i32 0 +; CHECK-NEXT: [[TMP94:%.*]] = extractelement <3 x double> [[TMP17]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT65:%.*]] = insertelement <1 x double> undef, double [[TMP94]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT66:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT65]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP109:%.*]] = fmul <1 x double> [[BLOCK64]], [[SPLAT_SPLAT66]] -; CHECK-NEXT: [[TMP110:%.*]] = fadd <1 x double> [[TMP107]], [[TMP109]] +; CHECK-NEXT: [[TMP95:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK64]], <1 x double> [[SPLAT_SPLAT66]], <1 x double> [[TMP93]]) ; CHECK-NEXT: [[BLOCK67:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP111:%.*]] = extractelement <3 x double> [[TMP17]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT68:%.*]] = insertelement <1 x double> undef, double [[TMP111]], i32 0 +; CHECK-NEXT: [[TMP96:%.*]] = extractelement <3 x double> [[TMP17]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT68:%.*]] = insertelement <1 x double> undef, double [[TMP96]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT69:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT68]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP112:%.*]] = fmul <1 x double> [[BLOCK67]], [[SPLAT_SPLAT69]] -; CHECK-NEXT: [[TMP113:%.*]] = fadd <1 x double> [[TMP110]], [[TMP112]] -; CHECK-NEXT: [[TMP114:%.*]] = shufflevector <1 x double> [[TMP113]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP115:%.*]] = shufflevector <3 x double> [[TMP105]], <3 x double> [[TMP114]], <3 x i32> +; CHECK-NEXT: [[TMP97:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK67]], <1 x double> [[SPLAT_SPLAT69]], <1 x double> [[TMP95]]) +; CHECK-NEXT: [[TMP98:%.*]] = shufflevector <1 x double> [[TMP97]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP99:%.*]] = shufflevector <3 x double> [[TMP91]], <3 x double> [[TMP98]], <3 x i32> ; CHECK-NEXT: [[BLOCK70:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP116:%.*]] = extractelement <3 x double> [[TMP17]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT71:%.*]] = insertelement <1 x double> undef, double [[TMP116]], i32 0 +; CHECK-NEXT: [[TMP100:%.*]] = extractelement <3 x double> [[TMP17]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT71:%.*]] = insertelement <1 x double> undef, double [[TMP100]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT72:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT71]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP117:%.*]] = fmul <1 x double> [[BLOCK70]], [[SPLAT_SPLAT72]] +; CHECK-NEXT: [[TMP101:%.*]] = fmul <1 x double> [[BLOCK70]], [[SPLAT_SPLAT72]] ; CHECK-NEXT: [[BLOCK73:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP118:%.*]] = extractelement <3 x double> [[TMP17]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT74:%.*]] = insertelement <1 x double> undef, double [[TMP118]], i32 0 +; CHECK-NEXT: [[TMP102:%.*]] = extractelement <3 x double> [[TMP17]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT74:%.*]] = insertelement <1 x double> undef, double [[TMP102]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT75:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT74]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP119:%.*]] = fmul <1 x double> [[BLOCK73]], [[SPLAT_SPLAT75]] -; CHECK-NEXT: [[TMP120:%.*]] = fadd <1 x double> [[TMP117]], [[TMP119]] +; CHECK-NEXT: [[TMP103:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK73]], <1 x double> [[SPLAT_SPLAT75]], <1 x double> [[TMP101]]) ; CHECK-NEXT: [[BLOCK76:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP121:%.*]] = extractelement <3 x double> [[TMP17]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT77:%.*]] = insertelement <1 x double> undef, double [[TMP121]], i32 0 +; CHECK-NEXT: [[TMP104:%.*]] = extractelement <3 x double> [[TMP17]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT77:%.*]] = insertelement <1 x double> undef, double [[TMP104]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT78:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT77]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP122:%.*]] = fmul <1 x double> [[BLOCK76]], [[SPLAT_SPLAT78]] -; CHECK-NEXT: [[TMP123:%.*]] = fadd <1 x double> [[TMP120]], [[TMP122]] -; CHECK-NEXT: [[TMP124:%.*]] = shufflevector <1 x double> [[TMP123]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP125:%.*]] = shufflevector <3 x double> [[TMP115]], <3 x double> [[TMP124]], <3 x i32> +; CHECK-NEXT: [[TMP105:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK76]], <1 x double> [[SPLAT_SPLAT78]], <1 x double> [[TMP103]]) +; CHECK-NEXT: [[TMP106:%.*]] = shufflevector <1 x double> [[TMP105]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP107:%.*]] = shufflevector <3 x double> [[TMP99]], <3 x double> [[TMP106]], <3 x i32> ; Store result columns. -; CHECK-NEXT: [[TMP126:%.*]] = bitcast <9 x double>* [[C_PTR:%.*]] to double* -; CHECK-NEXT: [[TMP127:%.*]] = bitcast double* [[TMP126]] to <3 x double>* -; CHECK-NEXT: store <3 x double> [[TMP65]], <3 x double>* [[TMP127]], align 8 -; CHECK-NEXT: [[TMP128:%.*]] = getelementptr double, double* [[TMP126]], i32 3 -; CHECK-NEXT: [[TMP129:%.*]] = bitcast double* [[TMP128]] to <3 x double>* -; CHECK-NEXT: store <3 x double> [[TMP95]], <3 x double>* [[TMP129]], align 8 -; CHECK-NEXT: [[TMP130:%.*]] = getelementptr double, double* [[TMP126]], i32 6 -; CHECK-NEXT: [[TMP131:%.*]] = bitcast double* [[TMP130]] to <3 x double>* -; CHECK-NEXT: store <3 x double> [[TMP125]], <3 x double>* [[TMP131]], align 8 +; CHECK-NEXT: [[TMP108:%.*]] = bitcast <9 x double>* [[C_PTR:%.*]] to double* +; CHECK-NEXT: [[TMP109:%.*]] = bitcast double* [[TMP108]] to <3 x double>* +; CHECK-NEXT: store <3 x double> [[TMP59]], <3 x double>* [[TMP109]], align 8 +; CHECK-NEXT: [[TMP110:%.*]] = getelementptr double, double* [[TMP108]], i32 3 +; CHECK-NEXT: [[TMP111:%.*]] = bitcast double* [[TMP110]] to <3 x double>* +; CHECK-NEXT: store <3 x double> [[TMP83]], <3 x double>* [[TMP111]], align 8 +; CHECK-NEXT: [[TMP112:%.*]] = getelementptr double, double* [[TMP108]], i32 6 +; CHECK-NEXT: [[TMP113:%.*]] = bitcast double* [[TMP112]] to <3 x double>* +; CHECK-NEXT: store <3 x double> [[TMP107]], <3 x double>* [[TMP113]], align 8 ; CHECK-NEXT: ret void ; entry: @@ -305,198 +287,180 @@ ; CHECK-NEXT: [[TMP38:%.*]] = extractelement <3 x double> [[TMP11]], i64 1 ; CHECK-NEXT: [[SPLAT_SPLATINSERT2:%.*]] = insertelement <1 x double> undef, double [[TMP38]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT3:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT2]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP39:%.*]] = fmul <1 x double> [[BLOCK1]], [[SPLAT_SPLAT3]] -; CHECK-NEXT: [[TMP40:%.*]] = fadd <1 x double> [[TMP37]], [[TMP39]] +; CHECK-NEXT: [[TMP39:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK1]], <1 x double> [[SPLAT_SPLAT3]], <1 x double> [[TMP37]]) ; CHECK-NEXT: [[BLOCK4:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP41:%.*]] = extractelement <3 x double> [[TMP11]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT5:%.*]] = insertelement <1 x double> undef, double [[TMP41]], i32 0 +; CHECK-NEXT: [[TMP40:%.*]] = extractelement <3 x double> [[TMP11]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT5:%.*]] = insertelement <1 x double> undef, double [[TMP40]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT6:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT5]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP42:%.*]] = fmul <1 x double> [[BLOCK4]], [[SPLAT_SPLAT6]] -; CHECK-NEXT: [[TMP43:%.*]] = fadd <1 x double> [[TMP40]], [[TMP42]] -; CHECK-NEXT: [[TMP44:%.*]] = shufflevector <1 x double> [[TMP43]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP45:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP44]], <3 x i32> +; CHECK-NEXT: [[TMP41:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK4]], <1 x double> [[SPLAT_SPLAT6]], <1 x double> [[TMP39]]) +; CHECK-NEXT: [[TMP42:%.*]] = shufflevector <1 x double> [[TMP41]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP43:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP42]], <3 x i32> ; CHECK-NEXT: [[BLOCK7:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP46:%.*]] = extractelement <3 x double> [[TMP11]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT8:%.*]] = insertelement <1 x double> undef, double [[TMP46]], i32 0 +; CHECK-NEXT: [[TMP44:%.*]] = extractelement <3 x double> [[TMP11]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT8:%.*]] = insertelement <1 x double> undef, double [[TMP44]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT9:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT8]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP47:%.*]] = fmul <1 x double> [[BLOCK7]], [[SPLAT_SPLAT9]] +; CHECK-NEXT: [[TMP45:%.*]] = fmul <1 x double> [[BLOCK7]], [[SPLAT_SPLAT9]] ; CHECK-NEXT: [[BLOCK10:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP48:%.*]] = extractelement <3 x double> [[TMP11]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT11:%.*]] = insertelement <1 x double> undef, double [[TMP48]], i32 0 +; CHECK-NEXT: [[TMP46:%.*]] = extractelement <3 x double> [[TMP11]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT11:%.*]] = insertelement <1 x double> undef, double [[TMP46]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT12:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT11]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP49:%.*]] = fmul <1 x double> [[BLOCK10]], [[SPLAT_SPLAT12]] -; CHECK-NEXT: [[TMP50:%.*]] = fadd <1 x double> [[TMP47]], [[TMP49]] +; CHECK-NEXT: [[TMP47:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK10]], <1 x double> [[SPLAT_SPLAT12]], <1 x double> [[TMP45]]) ; CHECK-NEXT: [[BLOCK13:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP51:%.*]] = extractelement <3 x double> [[TMP11]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT14:%.*]] = insertelement <1 x double> undef, double [[TMP51]], i32 0 +; CHECK-NEXT: [[TMP48:%.*]] = extractelement <3 x double> [[TMP11]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT14:%.*]] = insertelement <1 x double> undef, double [[TMP48]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT15:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT14]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP52:%.*]] = fmul <1 x double> [[BLOCK13]], [[SPLAT_SPLAT15]] -; CHECK-NEXT: [[TMP53:%.*]] = fadd <1 x double> [[TMP50]], [[TMP52]] -; CHECK-NEXT: [[TMP54:%.*]] = shufflevector <1 x double> [[TMP53]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP55:%.*]] = shufflevector <3 x double> [[TMP45]], <3 x double> [[TMP54]], <3 x i32> +; CHECK-NEXT: [[TMP49:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK13]], <1 x double> [[SPLAT_SPLAT15]], <1 x double> [[TMP47]]) +; CHECK-NEXT: [[TMP50:%.*]] = shufflevector <1 x double> [[TMP49]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP51:%.*]] = shufflevector <3 x double> [[TMP43]], <3 x double> [[TMP50]], <3 x i32> ; CHECK-NEXT: [[BLOCK16:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP56:%.*]] = extractelement <3 x double> [[TMP11]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT17:%.*]] = insertelement <1 x double> undef, double [[TMP56]], i32 0 +; CHECK-NEXT: [[TMP52:%.*]] = extractelement <3 x double> [[TMP11]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT17:%.*]] = insertelement <1 x double> undef, double [[TMP52]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT18:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT17]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP57:%.*]] = fmul <1 x double> [[BLOCK16]], [[SPLAT_SPLAT18]] +; CHECK-NEXT: [[TMP53:%.*]] = fmul <1 x double> [[BLOCK16]], [[SPLAT_SPLAT18]] ; CHECK-NEXT: [[BLOCK19:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP58:%.*]] = extractelement <3 x double> [[TMP11]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT20:%.*]] = insertelement <1 x double> undef, double [[TMP58]], i32 0 +; CHECK-NEXT: [[TMP54:%.*]] = extractelement <3 x double> [[TMP11]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT20:%.*]] = insertelement <1 x double> undef, double [[TMP54]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT21:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT20]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP59:%.*]] = fmul <1 x double> [[BLOCK19]], [[SPLAT_SPLAT21]] -; CHECK-NEXT: [[TMP60:%.*]] = fadd <1 x double> [[TMP57]], [[TMP59]] +; CHECK-NEXT: [[TMP55:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK19]], <1 x double> [[SPLAT_SPLAT21]], <1 x double> [[TMP53]]) ; CHECK-NEXT: [[BLOCK22:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP61:%.*]] = extractelement <3 x double> [[TMP11]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT23:%.*]] = insertelement <1 x double> undef, double [[TMP61]], i32 0 +; CHECK-NEXT: [[TMP56:%.*]] = extractelement <3 x double> [[TMP11]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT23:%.*]] = insertelement <1 x double> undef, double [[TMP56]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT24:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT23]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP62:%.*]] = fmul <1 x double> [[BLOCK22]], [[SPLAT_SPLAT24]] -; CHECK-NEXT: [[TMP63:%.*]] = fadd <1 x double> [[TMP60]], [[TMP62]] -; CHECK-NEXT: [[TMP64:%.*]] = shufflevector <1 x double> [[TMP63]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP65:%.*]] = shufflevector <3 x double> [[TMP55]], <3 x double> [[TMP64]], <3 x i32> +; CHECK-NEXT: [[TMP57:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK22]], <1 x double> [[SPLAT_SPLAT24]], <1 x double> [[TMP55]]) +; CHECK-NEXT: [[TMP58:%.*]] = shufflevector <1 x double> [[TMP57]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP59:%.*]] = shufflevector <3 x double> [[TMP51]], <3 x double> [[TMP58]], <3 x i32> ; CHECK-NEXT: [[BLOCK25:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP66:%.*]] = extractelement <3 x double> [[TMP14]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT26:%.*]] = insertelement <1 x double> undef, double [[TMP66]], i32 0 +; CHECK-NEXT: [[TMP60:%.*]] = extractelement <3 x double> [[TMP14]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT26:%.*]] = insertelement <1 x double> undef, double [[TMP60]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT27:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT26]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP67:%.*]] = fmul <1 x double> [[BLOCK25]], [[SPLAT_SPLAT27]] +; CHECK-NEXT: [[TMP61:%.*]] = fmul <1 x double> [[BLOCK25]], [[SPLAT_SPLAT27]] ; CHECK-NEXT: [[BLOCK28:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP68:%.*]] = extractelement <3 x double> [[TMP14]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT29:%.*]] = insertelement <1 x double> undef, double [[TMP68]], i32 0 +; CHECK-NEXT: [[TMP62:%.*]] = extractelement <3 x double> [[TMP14]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT29:%.*]] = insertelement <1 x double> undef, double [[TMP62]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT30:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT29]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP69:%.*]] = fmul <1 x double> [[BLOCK28]], [[SPLAT_SPLAT30]] -; CHECK-NEXT: [[TMP70:%.*]] = fadd <1 x double> [[TMP67]], [[TMP69]] +; CHECK-NEXT: [[TMP63:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK28]], <1 x double> [[SPLAT_SPLAT30]], <1 x double> [[TMP61]]) ; CHECK-NEXT: [[BLOCK31:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP71:%.*]] = extractelement <3 x double> [[TMP14]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT32:%.*]] = insertelement <1 x double> undef, double [[TMP71]], i32 0 +; CHECK-NEXT: [[TMP64:%.*]] = extractelement <3 x double> [[TMP14]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT32:%.*]] = insertelement <1 x double> undef, double [[TMP64]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT33:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT32]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP72:%.*]] = fmul <1 x double> [[BLOCK31]], [[SPLAT_SPLAT33]] -; CHECK-NEXT: [[TMP73:%.*]] = fadd <1 x double> [[TMP70]], [[TMP72]] -; CHECK-NEXT: [[TMP74:%.*]] = shufflevector <1 x double> [[TMP73]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP75:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP74]], <3 x i32> +; CHECK-NEXT: [[TMP65:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK31]], <1 x double> [[SPLAT_SPLAT33]], <1 x double> [[TMP63]]) +; CHECK-NEXT: [[TMP66:%.*]] = shufflevector <1 x double> [[TMP65]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP67:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP66]], <3 x i32> ; CHECK-NEXT: [[BLOCK34:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP76:%.*]] = extractelement <3 x double> [[TMP14]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT35:%.*]] = insertelement <1 x double> undef, double [[TMP76]], i32 0 +; CHECK-NEXT: [[TMP68:%.*]] = extractelement <3 x double> [[TMP14]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT35:%.*]] = insertelement <1 x double> undef, double [[TMP68]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT36:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT35]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP77:%.*]] = fmul <1 x double> [[BLOCK34]], [[SPLAT_SPLAT36]] +; CHECK-NEXT: [[TMP69:%.*]] = fmul <1 x double> [[BLOCK34]], [[SPLAT_SPLAT36]] ; CHECK-NEXT: [[BLOCK37:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP78:%.*]] = extractelement <3 x double> [[TMP14]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT38:%.*]] = insertelement <1 x double> undef, double [[TMP78]], i32 0 +; CHECK-NEXT: [[TMP70:%.*]] = extractelement <3 x double> [[TMP14]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT38:%.*]] = insertelement <1 x double> undef, double [[TMP70]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT39:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT38]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP79:%.*]] = fmul <1 x double> [[BLOCK37]], [[SPLAT_SPLAT39]] -; CHECK-NEXT: [[TMP80:%.*]] = fadd <1 x double> [[TMP77]], [[TMP79]] +; CHECK-NEXT: [[TMP71:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK37]], <1 x double> [[SPLAT_SPLAT39]], <1 x double> [[TMP69]]) ; CHECK-NEXT: [[BLOCK40:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP81:%.*]] = extractelement <3 x double> [[TMP14]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT41:%.*]] = insertelement <1 x double> undef, double [[TMP81]], i32 0 +; CHECK-NEXT: [[TMP72:%.*]] = extractelement <3 x double> [[TMP14]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT41:%.*]] = insertelement <1 x double> undef, double [[TMP72]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT42:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT41]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP82:%.*]] = fmul <1 x double> [[BLOCK40]], [[SPLAT_SPLAT42]] -; CHECK-NEXT: [[TMP83:%.*]] = fadd <1 x double> [[TMP80]], [[TMP82]] -; CHECK-NEXT: [[TMP84:%.*]] = shufflevector <1 x double> [[TMP83]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP85:%.*]] = shufflevector <3 x double> [[TMP75]], <3 x double> [[TMP84]], <3 x i32> +; CHECK-NEXT: [[TMP73:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK40]], <1 x double> [[SPLAT_SPLAT42]], <1 x double> [[TMP71]]) +; CHECK-NEXT: [[TMP74:%.*]] = shufflevector <1 x double> [[TMP73]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP75:%.*]] = shufflevector <3 x double> [[TMP67]], <3 x double> [[TMP74]], <3 x i32> ; CHECK-NEXT: [[BLOCK43:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP86:%.*]] = extractelement <3 x double> [[TMP14]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT44:%.*]] = insertelement <1 x double> undef, double [[TMP86]], i32 0 +; CHECK-NEXT: [[TMP76:%.*]] = extractelement <3 x double> [[TMP14]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT44:%.*]] = insertelement <1 x double> undef, double [[TMP76]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT45:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT44]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP87:%.*]] = fmul <1 x double> [[BLOCK43]], [[SPLAT_SPLAT45]] +; CHECK-NEXT: [[TMP77:%.*]] = fmul <1 x double> [[BLOCK43]], [[SPLAT_SPLAT45]] ; CHECK-NEXT: [[BLOCK46:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP88:%.*]] = extractelement <3 x double> [[TMP14]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT47:%.*]] = insertelement <1 x double> undef, double [[TMP88]], i32 0 +; CHECK-NEXT: [[TMP78:%.*]] = extractelement <3 x double> [[TMP14]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT47:%.*]] = insertelement <1 x double> undef, double [[TMP78]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT48:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT47]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP89:%.*]] = fmul <1 x double> [[BLOCK46]], [[SPLAT_SPLAT48]] -; CHECK-NEXT: [[TMP90:%.*]] = fadd <1 x double> [[TMP87]], [[TMP89]] +; CHECK-NEXT: [[TMP79:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK46]], <1 x double> [[SPLAT_SPLAT48]], <1 x double> [[TMP77]]) ; CHECK-NEXT: [[BLOCK49:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP91:%.*]] = extractelement <3 x double> [[TMP14]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT50:%.*]] = insertelement <1 x double> undef, double [[TMP91]], i32 0 +; CHECK-NEXT: [[TMP80:%.*]] = extractelement <3 x double> [[TMP14]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT50:%.*]] = insertelement <1 x double> undef, double [[TMP80]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT51:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT50]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP92:%.*]] = fmul <1 x double> [[BLOCK49]], [[SPLAT_SPLAT51]] -; CHECK-NEXT: [[TMP93:%.*]] = fadd <1 x double> [[TMP90]], [[TMP92]] -; CHECK-NEXT: [[TMP94:%.*]] = shufflevector <1 x double> [[TMP93]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP95:%.*]] = shufflevector <3 x double> [[TMP85]], <3 x double> [[TMP94]], <3 x i32> +; CHECK-NEXT: [[TMP81:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK49]], <1 x double> [[SPLAT_SPLAT51]], <1 x double> [[TMP79]]) +; CHECK-NEXT: [[TMP82:%.*]] = shufflevector <1 x double> [[TMP81]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP83:%.*]] = shufflevector <3 x double> [[TMP75]], <3 x double> [[TMP82]], <3 x i32> ; CHECK-NEXT: [[BLOCK52:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP96:%.*]] = extractelement <3 x double> [[TMP17]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT53:%.*]] = insertelement <1 x double> undef, double [[TMP96]], i32 0 +; CHECK-NEXT: [[TMP84:%.*]] = extractelement <3 x double> [[TMP17]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT53:%.*]] = insertelement <1 x double> undef, double [[TMP84]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT54:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT53]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP97:%.*]] = fmul <1 x double> [[BLOCK52]], [[SPLAT_SPLAT54]] +; CHECK-NEXT: [[TMP85:%.*]] = fmul <1 x double> [[BLOCK52]], [[SPLAT_SPLAT54]] ; CHECK-NEXT: [[BLOCK55:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP98:%.*]] = extractelement <3 x double> [[TMP17]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT56:%.*]] = insertelement <1 x double> undef, double [[TMP98]], i32 0 +; CHECK-NEXT: [[TMP86:%.*]] = extractelement <3 x double> [[TMP17]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT56:%.*]] = insertelement <1 x double> undef, double [[TMP86]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT57:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT56]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP99:%.*]] = fmul <1 x double> [[BLOCK55]], [[SPLAT_SPLAT57]] -; CHECK-NEXT: [[TMP100:%.*]] = fadd <1 x double> [[TMP97]], [[TMP99]] +; CHECK-NEXT: [[TMP87:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK55]], <1 x double> [[SPLAT_SPLAT57]], <1 x double> [[TMP85]]) ; CHECK-NEXT: [[BLOCK58:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP101:%.*]] = extractelement <3 x double> [[TMP17]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT59:%.*]] = insertelement <1 x double> undef, double [[TMP101]], i32 0 +; CHECK-NEXT: [[TMP88:%.*]] = extractelement <3 x double> [[TMP17]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT59:%.*]] = insertelement <1 x double> undef, double [[TMP88]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT60:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT59]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP102:%.*]] = fmul <1 x double> [[BLOCK58]], [[SPLAT_SPLAT60]] -; CHECK-NEXT: [[TMP103:%.*]] = fadd <1 x double> [[TMP100]], [[TMP102]] -; CHECK-NEXT: [[TMP104:%.*]] = shufflevector <1 x double> [[TMP103]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP105:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP104]], <3 x i32> +; CHECK-NEXT: [[TMP89:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK58]], <1 x double> [[SPLAT_SPLAT60]], <1 x double> [[TMP87]]) +; CHECK-NEXT: [[TMP90:%.*]] = shufflevector <1 x double> [[TMP89]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP91:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP90]], <3 x i32> ; CHECK-NEXT: [[BLOCK61:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP106:%.*]] = extractelement <3 x double> [[TMP17]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT62:%.*]] = insertelement <1 x double> undef, double [[TMP106]], i32 0 +; CHECK-NEXT: [[TMP92:%.*]] = extractelement <3 x double> [[TMP17]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT62:%.*]] = insertelement <1 x double> undef, double [[TMP92]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT63:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT62]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP107:%.*]] = fmul <1 x double> [[BLOCK61]], [[SPLAT_SPLAT63]] +; CHECK-NEXT: [[TMP93:%.*]] = fmul <1 x double> [[BLOCK61]], [[SPLAT_SPLAT63]] ; CHECK-NEXT: [[BLOCK64:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP108:%.*]] = extractelement <3 x double> [[TMP17]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT65:%.*]] = insertelement <1 x double> undef, double [[TMP108]], i32 0 +; CHECK-NEXT: [[TMP94:%.*]] = extractelement <3 x double> [[TMP17]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT65:%.*]] = insertelement <1 x double> undef, double [[TMP94]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT66:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT65]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP109:%.*]] = fmul <1 x double> [[BLOCK64]], [[SPLAT_SPLAT66]] -; CHECK-NEXT: [[TMP110:%.*]] = fadd <1 x double> [[TMP107]], [[TMP109]] +; CHECK-NEXT: [[TMP95:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK64]], <1 x double> [[SPLAT_SPLAT66]], <1 x double> [[TMP93]]) ; CHECK-NEXT: [[BLOCK67:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP111:%.*]] = extractelement <3 x double> [[TMP17]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT68:%.*]] = insertelement <1 x double> undef, double [[TMP111]], i32 0 +; CHECK-NEXT: [[TMP96:%.*]] = extractelement <3 x double> [[TMP17]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT68:%.*]] = insertelement <1 x double> undef, double [[TMP96]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT69:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT68]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP112:%.*]] = fmul <1 x double> [[BLOCK67]], [[SPLAT_SPLAT69]] -; CHECK-NEXT: [[TMP113:%.*]] = fadd <1 x double> [[TMP110]], [[TMP112]] -; CHECK-NEXT: [[TMP114:%.*]] = shufflevector <1 x double> [[TMP113]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP115:%.*]] = shufflevector <3 x double> [[TMP105]], <3 x double> [[TMP114]], <3 x i32> +; CHECK-NEXT: [[TMP97:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK67]], <1 x double> [[SPLAT_SPLAT69]], <1 x double> [[TMP95]]) +; CHECK-NEXT: [[TMP98:%.*]] = shufflevector <1 x double> [[TMP97]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP99:%.*]] = shufflevector <3 x double> [[TMP91]], <3 x double> [[TMP98]], <3 x i32> ; CHECK-NEXT: [[BLOCK70:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP116:%.*]] = extractelement <3 x double> [[TMP17]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT71:%.*]] = insertelement <1 x double> undef, double [[TMP116]], i32 0 +; CHECK-NEXT: [[TMP100:%.*]] = extractelement <3 x double> [[TMP17]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT71:%.*]] = insertelement <1 x double> undef, double [[TMP100]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT72:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT71]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP117:%.*]] = fmul <1 x double> [[BLOCK70]], [[SPLAT_SPLAT72]] +; CHECK-NEXT: [[TMP101:%.*]] = fmul <1 x double> [[BLOCK70]], [[SPLAT_SPLAT72]] ; CHECK-NEXT: [[BLOCK73:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP118:%.*]] = extractelement <3 x double> [[TMP17]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT74:%.*]] = insertelement <1 x double> undef, double [[TMP118]], i32 0 +; CHECK-NEXT: [[TMP102:%.*]] = extractelement <3 x double> [[TMP17]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT74:%.*]] = insertelement <1 x double> undef, double [[TMP102]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT75:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT74]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP119:%.*]] = fmul <1 x double> [[BLOCK73]], [[SPLAT_SPLAT75]] -; CHECK-NEXT: [[TMP120:%.*]] = fadd <1 x double> [[TMP117]], [[TMP119]] +; CHECK-NEXT: [[TMP103:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK73]], <1 x double> [[SPLAT_SPLAT75]], <1 x double> [[TMP101]]) ; CHECK-NEXT: [[BLOCK76:%.*]] = shufflevector <3 x double> [[TMP35]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP121:%.*]] = extractelement <3 x double> [[TMP17]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT77:%.*]] = insertelement <1 x double> undef, double [[TMP121]], i32 0 +; CHECK-NEXT: [[TMP104:%.*]] = extractelement <3 x double> [[TMP17]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT77:%.*]] = insertelement <1 x double> undef, double [[TMP104]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT78:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT77]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP122:%.*]] = fmul <1 x double> [[BLOCK76]], [[SPLAT_SPLAT78]] -; CHECK-NEXT: [[TMP123:%.*]] = fadd <1 x double> [[TMP120]], [[TMP122]] -; CHECK-NEXT: [[TMP124:%.*]] = shufflevector <1 x double> [[TMP123]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP125:%.*]] = shufflevector <3 x double> [[TMP115]], <3 x double> [[TMP124]], <3 x i32> +; CHECK-NEXT: [[TMP105:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK76]], <1 x double> [[SPLAT_SPLAT78]], <1 x double> [[TMP103]]) +; CHECK-NEXT: [[TMP106:%.*]] = shufflevector <1 x double> [[TMP105]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP107:%.*]] = shufflevector <3 x double> [[TMP99]], <3 x double> [[TMP106]], <3 x i32> ; Load columns of matrix %C. -; CHECK-NEXT: [[TMP126:%.*]] = bitcast <9 x double>* [[C_PTR:%.*]] to double* -; CHECK-NEXT: [[TMP127:%.*]] = bitcast double* [[TMP126]] to <3 x double>* -; CHECK-NEXT: [[TMP128:%.*]] = load <3 x double>, <3 x double>* [[TMP127]], align 8 -; CHECK-NEXT: [[TMP129:%.*]] = getelementptr double, double* [[TMP126]], i32 3 -; CHECK-NEXT: [[TMP130:%.*]] = bitcast double* [[TMP129]] to <3 x double>* -; CHECK-NEXT: [[TMP131:%.*]] = load <3 x double>, <3 x double>* [[TMP130]], align 8 -; CHECK-NEXT: [[TMP132:%.*]] = getelementptr double, double* [[TMP126]], i32 6 -; CHECK-NEXT: [[TMP133:%.*]] = bitcast double* [[TMP132]] to <3 x double>* -; CHECK-NEXT: [[TMP134:%.*]] = load <3 x double>, <3 x double>* [[TMP133]], align 8 +; CHECK-NEXT: [[TMP108:%.*]] = bitcast <9 x double>* [[C_PTR:%.*]] to double* +; CHECK-NEXT: [[TMP109:%.*]] = bitcast double* [[TMP108]] to <3 x double>* +; CHECK-NEXT: [[TMP110:%.*]] = load <3 x double>, <3 x double>* [[TMP109]], align 8 +; CHECK-NEXT: [[TMP111:%.*]] = getelementptr double, double* [[TMP108]], i32 3 +; CHECK-NEXT: [[TMP112:%.*]] = bitcast double* [[TMP111]] to <3 x double>* +; CHECK-NEXT: [[TMP113:%.*]] = load <3 x double>, <3 x double>* [[TMP112]], align 8 +; CHECK-NEXT: [[TMP114:%.*]] = getelementptr double, double* [[TMP108]], i32 6 +; CHECK-NEXT: [[TMP115:%.*]] = bitcast double* [[TMP114]] to <3 x double>* +; CHECK-NEXT: [[TMP116:%.*]] = load <3 x double>, <3 x double>* [[TMP115]], align 8 ; Add column vectors. -; CHECK-NEXT: [[TMP135:%.*]] = fadd <3 x double> [[TMP128]], [[TMP65]] -; CHECK-NEXT: [[TMP136:%.*]] = fadd <3 x double> [[TMP131]], [[TMP95]] -; CHECK-NEXT: [[TMP137:%.*]] = fadd <3 x double> [[TMP134]], [[TMP125]] +; CHECK-NEXT: [[TMP117:%.*]] = fadd <3 x double> [[TMP110]], [[TMP59]] +; CHECK-NEXT: [[TMP118:%.*]] = fadd <3 x double> [[TMP113]], [[TMP83]] +; CHECK-NEXT: [[TMP119:%.*]] = fadd <3 x double> [[TMP116]], [[TMP107]] ; Store result columns. -; CHECK-NEXT: [[TMP138:%.*]] = bitcast <9 x double>* [[C_PTR]] to double* -; CHECK-NEXT: [[TMP139:%.*]] = bitcast double* [[TMP138]] to <3 x double>* -; CHECK-NEXT: store <3 x double> [[TMP135]], <3 x double>* [[TMP139]], align 8 -; CHECK-NEXT: [[TMP140:%.*]] = getelementptr double, double* [[TMP138]], i32 3 -; CHECK-NEXT: [[TMP141:%.*]] = bitcast double* [[TMP140]] to <3 x double>* -; CHECK-NEXT: store <3 x double> [[TMP136]], <3 x double>* [[TMP141]], align 8 -; CHECK-NEXT: [[TMP142:%.*]] = getelementptr double, double* [[TMP138]], i32 6 -; CHECK-NEXT: [[TMP143:%.*]] = bitcast double* [[TMP142]] to <3 x double>* -; CHECK-NEXT: store <3 x double> [[TMP137]], <3 x double>* [[TMP143]], align 8 +; CHECK-NEXT: [[TMP120:%.*]] = bitcast <9 x double>* [[C_PTR]] to double* +; CHECK-NEXT: [[TMP121:%.*]] = bitcast double* [[TMP120]] to <3 x double>* +; CHECK-NEXT: store <3 x double> [[TMP117]], <3 x double>* [[TMP121]], align 8 +; CHECK-NEXT: [[TMP122:%.*]] = getelementptr double, double* [[TMP120]], i32 3 +; CHECK-NEXT: [[TMP123:%.*]] = bitcast double* [[TMP122]] to <3 x double>* +; CHECK-NEXT: store <3 x double> [[TMP118]], <3 x double>* [[TMP123]], align 8 +; CHECK-NEXT: [[TMP124:%.*]] = getelementptr double, double* [[TMP120]], i32 6 +; CHECK-NEXT: [[TMP125:%.*]] = bitcast double* [[TMP124]] to <3 x double>* +; CHECK-NEXT: store <3 x double> [[TMP119]], <3 x double>* [[TMP125]], align 8 ; CHECK-NEXT: ret void ; entry: diff --git a/llvm/test/Transforms/LowerMatrixIntrinsics/multiply-double.ll b/llvm/test/Transforms/LowerMatrixIntrinsics/multiply-double.ll --- a/llvm/test/Transforms/LowerMatrixIntrinsics/multiply-double.ll +++ b/llvm/test/Transforms/LowerMatrixIntrinsics/multiply-double.ll @@ -19,51 +19,47 @@ ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x double> [[SPLIT2]], i64 1 ; CHECK-NEXT: [[SPLAT_SPLATINSERT5:%.*]] = insertelement <1 x double> undef, double [[TMP2]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT6:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT5]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP3:%.*]] = fmul <1 x double> [[BLOCK4]], [[SPLAT_SPLAT6]] -; CHECK-NEXT: [[TMP4:%.*]] = fadd <1 x double> [[TMP1]], [[TMP3]] -; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <1 x double> [[TMP4]], <1 x double> undef, <2 x i32> -; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <2 x double> undef, <2 x double> [[TMP5]], <2 x i32> +; CHECK-NEXT: [[TMP3:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK4]], <1 x double> [[SPLAT_SPLAT6]], <1 x double> [[TMP1]]) +; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <1 x double> [[TMP3]], <1 x double> undef, <2 x i32> +; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <2 x double> undef, <2 x double> [[TMP4]], <2 x i32> ; CHECK-NEXT: [[BLOCK7:%.*]] = shufflevector <2 x double> [[SPLIT]], <2 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x double> [[SPLIT2]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT8:%.*]] = insertelement <1 x double> undef, double [[TMP7]], i32 0 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x double> [[SPLIT2]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT8:%.*]] = insertelement <1 x double> undef, double [[TMP6]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT9:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT8]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP8:%.*]] = fmul <1 x double> [[BLOCK7]], [[SPLAT_SPLAT9]] +; CHECK-NEXT: [[TMP7:%.*]] = fmul <1 x double> [[BLOCK7]], [[SPLAT_SPLAT9]] ; CHECK-NEXT: [[BLOCK10:%.*]] = shufflevector <2 x double> [[SPLIT1]], <2 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x double> [[SPLIT2]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT11:%.*]] = insertelement <1 x double> undef, double [[TMP9]], i32 0 +; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x double> [[SPLIT2]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT11:%.*]] = insertelement <1 x double> undef, double [[TMP8]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT12:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT11]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP10:%.*]] = fmul <1 x double> [[BLOCK10]], [[SPLAT_SPLAT12]] -; CHECK-NEXT: [[TMP11:%.*]] = fadd <1 x double> [[TMP8]], [[TMP10]] -; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <1 x double> [[TMP11]], <1 x double> undef, <2 x i32> -; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <2 x double> [[TMP6]], <2 x double> [[TMP12]], <2 x i32> +; CHECK-NEXT: [[TMP9:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK10]], <1 x double> [[SPLAT_SPLAT12]], <1 x double> [[TMP7]]) +; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <1 x double> [[TMP9]], <1 x double> undef, <2 x i32> +; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <2 x double> [[TMP5]], <2 x double> [[TMP10]], <2 x i32> ; CHECK-NEXT: [[BLOCK13:%.*]] = shufflevector <2 x double> [[SPLIT]], <2 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT14:%.*]] = insertelement <1 x double> undef, double [[TMP14]], i32 0 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT14:%.*]] = insertelement <1 x double> undef, double [[TMP12]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT15:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT14]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP15:%.*]] = fmul <1 x double> [[BLOCK13]], [[SPLAT_SPLAT15]] +; CHECK-NEXT: [[TMP13:%.*]] = fmul <1 x double> [[BLOCK13]], [[SPLAT_SPLAT15]] ; CHECK-NEXT: [[BLOCK16:%.*]] = shufflevector <2 x double> [[SPLIT1]], <2 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP16:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT17:%.*]] = insertelement <1 x double> undef, double [[TMP16]], i32 0 +; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT17:%.*]] = insertelement <1 x double> undef, double [[TMP14]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT18:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT17]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP17:%.*]] = fmul <1 x double> [[BLOCK16]], [[SPLAT_SPLAT18]] -; CHECK-NEXT: [[TMP18:%.*]] = fadd <1 x double> [[TMP15]], [[TMP17]] -; CHECK-NEXT: [[TMP19:%.*]] = shufflevector <1 x double> [[TMP18]], <1 x double> undef, <2 x i32> -; CHECK-NEXT: [[TMP20:%.*]] = shufflevector <2 x double> undef, <2 x double> [[TMP19]], <2 x i32> +; CHECK-NEXT: [[TMP15:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK16]], <1 x double> [[SPLAT_SPLAT18]], <1 x double> [[TMP13]]) +; CHECK-NEXT: [[TMP16:%.*]] = shufflevector <1 x double> [[TMP15]], <1 x double> undef, <2 x i32> +; CHECK-NEXT: [[TMP17:%.*]] = shufflevector <2 x double> undef, <2 x double> [[TMP16]], <2 x i32> ; CHECK-NEXT: [[BLOCK19:%.*]] = shufflevector <2 x double> [[SPLIT]], <2 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP21:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT20:%.*]] = insertelement <1 x double> undef, double [[TMP21]], i32 0 +; CHECK-NEXT: [[TMP18:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT20:%.*]] = insertelement <1 x double> undef, double [[TMP18]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT21:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT20]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP22:%.*]] = fmul <1 x double> [[BLOCK19]], [[SPLAT_SPLAT21]] +; CHECK-NEXT: [[TMP19:%.*]] = fmul <1 x double> [[BLOCK19]], [[SPLAT_SPLAT21]] ; CHECK-NEXT: [[BLOCK22:%.*]] = shufflevector <2 x double> [[SPLIT1]], <2 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP23:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT23:%.*]] = insertelement <1 x double> undef, double [[TMP23]], i32 0 +; CHECK-NEXT: [[TMP20:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT23:%.*]] = insertelement <1 x double> undef, double [[TMP20]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT24:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT23]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP24:%.*]] = fmul <1 x double> [[BLOCK22]], [[SPLAT_SPLAT24]] -; CHECK-NEXT: [[TMP25:%.*]] = fadd <1 x double> [[TMP22]], [[TMP24]] -; CHECK-NEXT: [[TMP26:%.*]] = shufflevector <1 x double> [[TMP25]], <1 x double> undef, <2 x i32> -; CHECK-NEXT: [[TMP27:%.*]] = shufflevector <2 x double> [[TMP20]], <2 x double> [[TMP26]], <2 x i32> -; CHECK-NEXT: [[TMP28:%.*]] = shufflevector <2 x double> [[TMP13]], <2 x double> [[TMP27]], <4 x i32> -; CHECK-NEXT: ret <4 x double> [[TMP28]] +; CHECK-NEXT: [[TMP21:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK22]], <1 x double> [[SPLAT_SPLAT24]], <1 x double> [[TMP19]]) +; CHECK-NEXT: [[TMP22:%.*]] = shufflevector <1 x double> [[TMP21]], <1 x double> undef, <2 x i32> +; CHECK-NEXT: [[TMP23:%.*]] = shufflevector <2 x double> [[TMP17]], <2 x double> [[TMP22]], <2 x i32> +; CHECK-NEXT: [[TMP24:%.*]] = shufflevector <2 x double> [[TMP11]], <2 x double> [[TMP23]], <4 x i32> +; CHECK-NEXT: ret <4 x double> [[TMP24]] ; entry: %c = call <4 x double> @llvm.matrix.multiply.v4f64.v4f64.v4f64(<4 x double> %a, <4 x double> %b, i32 2, i32 2, i32 2) @@ -133,118 +129,109 @@ ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x double> [[SPLIT2]], i64 1 ; CHECK-NEXT: [[SPLAT_SPLATINSERT6:%.*]] = insertelement <1 x double> undef, double [[TMP2]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT7:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT6]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP3:%.*]] = fmul <1 x double> [[BLOCK5]], [[SPLAT_SPLAT7]] -; CHECK-NEXT: [[TMP4:%.*]] = fadd <1 x double> [[TMP1]], [[TMP3]] -; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <1 x double> [[TMP4]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP5]], <3 x i32> +; CHECK-NEXT: [[TMP3:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK5]], <1 x double> [[SPLAT_SPLAT7]], <1 x double> [[TMP1]]) +; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <1 x double> [[TMP3]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP4]], <3 x i32> ; CHECK-NEXT: [[BLOCK8:%.*]] = shufflevector <3 x double> [[SPLIT]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x double> [[SPLIT2]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT9:%.*]] = insertelement <1 x double> undef, double [[TMP7]], i32 0 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x double> [[SPLIT2]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT9:%.*]] = insertelement <1 x double> undef, double [[TMP6]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT10:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT9]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP8:%.*]] = fmul <1 x double> [[BLOCK8]], [[SPLAT_SPLAT10]] +; CHECK-NEXT: [[TMP7:%.*]] = fmul <1 x double> [[BLOCK8]], [[SPLAT_SPLAT10]] ; CHECK-NEXT: [[BLOCK11:%.*]] = shufflevector <3 x double> [[SPLIT1]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x double> [[SPLIT2]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT12:%.*]] = insertelement <1 x double> undef, double [[TMP9]], i32 0 +; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x double> [[SPLIT2]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT12:%.*]] = insertelement <1 x double> undef, double [[TMP8]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT13:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT12]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP10:%.*]] = fmul <1 x double> [[BLOCK11]], [[SPLAT_SPLAT13]] -; CHECK-NEXT: [[TMP11:%.*]] = fadd <1 x double> [[TMP8]], [[TMP10]] -; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <1 x double> [[TMP11]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <3 x double> [[TMP6]], <3 x double> [[TMP12]], <3 x i32> +; CHECK-NEXT: [[TMP9:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK11]], <1 x double> [[SPLAT_SPLAT13]], <1 x double> [[TMP7]]) +; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <1 x double> [[TMP9]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <3 x double> [[TMP5]], <3 x double> [[TMP10]], <3 x i32> ; CHECK-NEXT: [[BLOCK14:%.*]] = shufflevector <3 x double> [[SPLIT]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x double> [[SPLIT2]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT15:%.*]] = insertelement <1 x double> undef, double [[TMP14]], i32 0 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <2 x double> [[SPLIT2]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT15:%.*]] = insertelement <1 x double> undef, double [[TMP12]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT16:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT15]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP15:%.*]] = fmul <1 x double> [[BLOCK14]], [[SPLAT_SPLAT16]] +; CHECK-NEXT: [[TMP13:%.*]] = fmul <1 x double> [[BLOCK14]], [[SPLAT_SPLAT16]] ; CHECK-NEXT: [[BLOCK17:%.*]] = shufflevector <3 x double> [[SPLIT1]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP16:%.*]] = extractelement <2 x double> [[SPLIT2]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT18:%.*]] = insertelement <1 x double> undef, double [[TMP16]], i32 0 +; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x double> [[SPLIT2]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT18:%.*]] = insertelement <1 x double> undef, double [[TMP14]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT19:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT18]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP17:%.*]] = fmul <1 x double> [[BLOCK17]], [[SPLAT_SPLAT19]] -; CHECK-NEXT: [[TMP18:%.*]] = fadd <1 x double> [[TMP15]], [[TMP17]] -; CHECK-NEXT: [[TMP19:%.*]] = shufflevector <1 x double> [[TMP18]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP20:%.*]] = shufflevector <3 x double> [[TMP13]], <3 x double> [[TMP19]], <3 x i32> +; CHECK-NEXT: [[TMP15:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK17]], <1 x double> [[SPLAT_SPLAT19]], <1 x double> [[TMP13]]) +; CHECK-NEXT: [[TMP16:%.*]] = shufflevector <1 x double> [[TMP15]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP17:%.*]] = shufflevector <3 x double> [[TMP11]], <3 x double> [[TMP16]], <3 x i32> ; CHECK-NEXT: [[BLOCK20:%.*]] = shufflevector <3 x double> [[SPLIT]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP21:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT21:%.*]] = insertelement <1 x double> undef, double [[TMP21]], i32 0 +; CHECK-NEXT: [[TMP18:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT21:%.*]] = insertelement <1 x double> undef, double [[TMP18]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT22:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT21]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP22:%.*]] = fmul <1 x double> [[BLOCK20]], [[SPLAT_SPLAT22]] +; CHECK-NEXT: [[TMP19:%.*]] = fmul <1 x double> [[BLOCK20]], [[SPLAT_SPLAT22]] ; CHECK-NEXT: [[BLOCK23:%.*]] = shufflevector <3 x double> [[SPLIT1]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP23:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT24:%.*]] = insertelement <1 x double> undef, double [[TMP23]], i32 0 +; CHECK-NEXT: [[TMP20:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT24:%.*]] = insertelement <1 x double> undef, double [[TMP20]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT25:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT24]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP24:%.*]] = fmul <1 x double> [[BLOCK23]], [[SPLAT_SPLAT25]] -; CHECK-NEXT: [[TMP25:%.*]] = fadd <1 x double> [[TMP22]], [[TMP24]] -; CHECK-NEXT: [[TMP26:%.*]] = shufflevector <1 x double> [[TMP25]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP27:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP26]], <3 x i32> +; CHECK-NEXT: [[TMP21:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK23]], <1 x double> [[SPLAT_SPLAT25]], <1 x double> [[TMP19]]) +; CHECK-NEXT: [[TMP22:%.*]] = shufflevector <1 x double> [[TMP21]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP23:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP22]], <3 x i32> ; CHECK-NEXT: [[BLOCK26:%.*]] = shufflevector <3 x double> [[SPLIT]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP28:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT27:%.*]] = insertelement <1 x double> undef, double [[TMP28]], i32 0 +; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT27:%.*]] = insertelement <1 x double> undef, double [[TMP24]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT28:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT27]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP29:%.*]] = fmul <1 x double> [[BLOCK26]], [[SPLAT_SPLAT28]] +; CHECK-NEXT: [[TMP25:%.*]] = fmul <1 x double> [[BLOCK26]], [[SPLAT_SPLAT28]] ; CHECK-NEXT: [[BLOCK29:%.*]] = shufflevector <3 x double> [[SPLIT1]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP30:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT30:%.*]] = insertelement <1 x double> undef, double [[TMP30]], i32 0 +; CHECK-NEXT: [[TMP26:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT30:%.*]] = insertelement <1 x double> undef, double [[TMP26]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT31:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT30]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP31:%.*]] = fmul <1 x double> [[BLOCK29]], [[SPLAT_SPLAT31]] -; CHECK-NEXT: [[TMP32:%.*]] = fadd <1 x double> [[TMP29]], [[TMP31]] -; CHECK-NEXT: [[TMP33:%.*]] = shufflevector <1 x double> [[TMP32]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP34:%.*]] = shufflevector <3 x double> [[TMP27]], <3 x double> [[TMP33]], <3 x i32> +; CHECK-NEXT: [[TMP27:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK29]], <1 x double> [[SPLAT_SPLAT31]], <1 x double> [[TMP25]]) +; CHECK-NEXT: [[TMP28:%.*]] = shufflevector <1 x double> [[TMP27]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP29:%.*]] = shufflevector <3 x double> [[TMP23]], <3 x double> [[TMP28]], <3 x i32> ; CHECK-NEXT: [[BLOCK32:%.*]] = shufflevector <3 x double> [[SPLIT]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP35:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT33:%.*]] = insertelement <1 x double> undef, double [[TMP35]], i32 0 +; CHECK-NEXT: [[TMP30:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT33:%.*]] = insertelement <1 x double> undef, double [[TMP30]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT34:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT33]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP36:%.*]] = fmul <1 x double> [[BLOCK32]], [[SPLAT_SPLAT34]] +; CHECK-NEXT: [[TMP31:%.*]] = fmul <1 x double> [[BLOCK32]], [[SPLAT_SPLAT34]] ; CHECK-NEXT: [[BLOCK35:%.*]] = shufflevector <3 x double> [[SPLIT1]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP37:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT36:%.*]] = insertelement <1 x double> undef, double [[TMP37]], i32 0 +; CHECK-NEXT: [[TMP32:%.*]] = extractelement <2 x double> [[SPLIT3]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT36:%.*]] = insertelement <1 x double> undef, double [[TMP32]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT37:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT36]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP38:%.*]] = fmul <1 x double> [[BLOCK35]], [[SPLAT_SPLAT37]] -; CHECK-NEXT: [[TMP39:%.*]] = fadd <1 x double> [[TMP36]], [[TMP38]] -; CHECK-NEXT: [[TMP40:%.*]] = shufflevector <1 x double> [[TMP39]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP41:%.*]] = shufflevector <3 x double> [[TMP34]], <3 x double> [[TMP40]], <3 x i32> +; CHECK-NEXT: [[TMP33:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK35]], <1 x double> [[SPLAT_SPLAT37]], <1 x double> [[TMP31]]) +; CHECK-NEXT: [[TMP34:%.*]] = shufflevector <1 x double> [[TMP33]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP35:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> [[TMP34]], <3 x i32> ; CHECK-NEXT: [[BLOCK38:%.*]] = shufflevector <3 x double> [[SPLIT]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP42:%.*]] = extractelement <2 x double> [[SPLIT4]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT39:%.*]] = insertelement <1 x double> undef, double [[TMP42]], i32 0 +; CHECK-NEXT: [[TMP36:%.*]] = extractelement <2 x double> [[SPLIT4]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT39:%.*]] = insertelement <1 x double> undef, double [[TMP36]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT40:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT39]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP43:%.*]] = fmul <1 x double> [[BLOCK38]], [[SPLAT_SPLAT40]] +; CHECK-NEXT: [[TMP37:%.*]] = fmul <1 x double> [[BLOCK38]], [[SPLAT_SPLAT40]] ; CHECK-NEXT: [[BLOCK41:%.*]] = shufflevector <3 x double> [[SPLIT1]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP44:%.*]] = extractelement <2 x double> [[SPLIT4]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT42:%.*]] = insertelement <1 x double> undef, double [[TMP44]], i32 0 +; CHECK-NEXT: [[TMP38:%.*]] = extractelement <2 x double> [[SPLIT4]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT42:%.*]] = insertelement <1 x double> undef, double [[TMP38]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT43:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT42]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP45:%.*]] = fmul <1 x double> [[BLOCK41]], [[SPLAT_SPLAT43]] -; CHECK-NEXT: [[TMP46:%.*]] = fadd <1 x double> [[TMP43]], [[TMP45]] -; CHECK-NEXT: [[TMP47:%.*]] = shufflevector <1 x double> [[TMP46]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP48:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP47]], <3 x i32> +; CHECK-NEXT: [[TMP39:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK41]], <1 x double> [[SPLAT_SPLAT43]], <1 x double> [[TMP37]]) +; CHECK-NEXT: [[TMP40:%.*]] = shufflevector <1 x double> [[TMP39]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP41:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP40]], <3 x i32> ; CHECK-NEXT: [[BLOCK44:%.*]] = shufflevector <3 x double> [[SPLIT]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP49:%.*]] = extractelement <2 x double> [[SPLIT4]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT45:%.*]] = insertelement <1 x double> undef, double [[TMP49]], i32 0 +; CHECK-NEXT: [[TMP42:%.*]] = extractelement <2 x double> [[SPLIT4]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT45:%.*]] = insertelement <1 x double> undef, double [[TMP42]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT46:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT45]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP50:%.*]] = fmul <1 x double> [[BLOCK44]], [[SPLAT_SPLAT46]] +; CHECK-NEXT: [[TMP43:%.*]] = fmul <1 x double> [[BLOCK44]], [[SPLAT_SPLAT46]] ; CHECK-NEXT: [[BLOCK47:%.*]] = shufflevector <3 x double> [[SPLIT1]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP51:%.*]] = extractelement <2 x double> [[SPLIT4]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT48:%.*]] = insertelement <1 x double> undef, double [[TMP51]], i32 0 +; CHECK-NEXT: [[TMP44:%.*]] = extractelement <2 x double> [[SPLIT4]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT48:%.*]] = insertelement <1 x double> undef, double [[TMP44]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT49:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT48]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP52:%.*]] = fmul <1 x double> [[BLOCK47]], [[SPLAT_SPLAT49]] -; CHECK-NEXT: [[TMP53:%.*]] = fadd <1 x double> [[TMP50]], [[TMP52]] -; CHECK-NEXT: [[TMP54:%.*]] = shufflevector <1 x double> [[TMP53]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP55:%.*]] = shufflevector <3 x double> [[TMP48]], <3 x double> [[TMP54]], <3 x i32> +; CHECK-NEXT: [[TMP45:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK47]], <1 x double> [[SPLAT_SPLAT49]], <1 x double> [[TMP43]]) +; CHECK-NEXT: [[TMP46:%.*]] = shufflevector <1 x double> [[TMP45]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP47:%.*]] = shufflevector <3 x double> [[TMP41]], <3 x double> [[TMP46]], <3 x i32> ; CHECK-NEXT: [[BLOCK50:%.*]] = shufflevector <3 x double> [[SPLIT]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP56:%.*]] = extractelement <2 x double> [[SPLIT4]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT51:%.*]] = insertelement <1 x double> undef, double [[TMP56]], i32 0 +; CHECK-NEXT: [[TMP48:%.*]] = extractelement <2 x double> [[SPLIT4]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT51:%.*]] = insertelement <1 x double> undef, double [[TMP48]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT52:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT51]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP57:%.*]] = fmul <1 x double> [[BLOCK50]], [[SPLAT_SPLAT52]] +; CHECK-NEXT: [[TMP49:%.*]] = fmul <1 x double> [[BLOCK50]], [[SPLAT_SPLAT52]] ; CHECK-NEXT: [[BLOCK53:%.*]] = shufflevector <3 x double> [[SPLIT1]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP58:%.*]] = extractelement <2 x double> [[SPLIT4]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT54:%.*]] = insertelement <1 x double> undef, double [[TMP58]], i32 0 +; CHECK-NEXT: [[TMP50:%.*]] = extractelement <2 x double> [[SPLIT4]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT54:%.*]] = insertelement <1 x double> undef, double [[TMP50]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT55:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT54]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP59:%.*]] = fmul <1 x double> [[BLOCK53]], [[SPLAT_SPLAT55]] -; CHECK-NEXT: [[TMP60:%.*]] = fadd <1 x double> [[TMP57]], [[TMP59]] -; CHECK-NEXT: [[TMP61:%.*]] = shufflevector <1 x double> [[TMP60]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP62:%.*]] = shufflevector <3 x double> [[TMP55]], <3 x double> [[TMP61]], <3 x i32> -; CHECK-NEXT: [[TMP63:%.*]] = shufflevector <3 x double> [[TMP20]], <3 x double> [[TMP41]], <6 x i32> -; CHECK-NEXT: [[TMP64:%.*]] = shufflevector <3 x double> [[TMP62]], <3 x double> undef, <6 x i32> -; CHECK-NEXT: [[TMP65:%.*]] = shufflevector <6 x double> [[TMP63]], <6 x double> [[TMP64]], <9 x i32> -; CHECK-NEXT: ret <9 x double> [[TMP65]] +; CHECK-NEXT: [[TMP51:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK53]], <1 x double> [[SPLAT_SPLAT55]], <1 x double> [[TMP49]]) +; CHECK-NEXT: [[TMP52:%.*]] = shufflevector <1 x double> [[TMP51]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP53:%.*]] = shufflevector <3 x double> [[TMP47]], <3 x double> [[TMP52]], <3 x i32> +; CHECK-NEXT: [[TMP54:%.*]] = shufflevector <3 x double> [[TMP17]], <3 x double> [[TMP35]], <6 x i32> +; CHECK-NEXT: [[TMP55:%.*]] = shufflevector <3 x double> [[TMP53]], <3 x double> undef, <6 x i32> +; CHECK-NEXT: [[TMP56:%.*]] = shufflevector <6 x double> [[TMP54]], <6 x double> [[TMP55]], <9 x i32> +; CHECK-NEXT: ret <9 x double> [[TMP56]] ; entry: %c = call <9 x double> @llvm.matrix.multiply.v6f64.v6f64.v6f64(<6 x double> %a, <6 x double> %b, i32 3, i32 2, i32 3) diff --git a/llvm/test/Transforms/LowerMatrixIntrinsics/multiply-float.ll b/llvm/test/Transforms/LowerMatrixIntrinsics/multiply-float.ll --- a/llvm/test/Transforms/LowerMatrixIntrinsics/multiply-float.ll +++ b/llvm/test/Transforms/LowerMatrixIntrinsics/multiply-float.ll @@ -19,51 +19,47 @@ ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x float> [[SPLIT2]], i64 1 ; CHECK-NEXT: [[SPLAT_SPLATINSERT5:%.*]] = insertelement <1 x float> undef, float [[TMP2]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT6:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT5]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP3:%.*]] = fmul <1 x float> [[BLOCK4]], [[SPLAT_SPLAT6]] -; CHECK-NEXT: [[TMP4:%.*]] = fadd <1 x float> [[TMP1]], [[TMP3]] -; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <1 x float> [[TMP4]], <1 x float> undef, <2 x i32> -; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> undef, <2 x float> [[TMP5]], <2 x i32> +; CHECK-NEXT: [[TMP3:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK4]], <1 x float> [[SPLAT_SPLAT6]], <1 x float> [[TMP1]]) +; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <1 x float> [[TMP3]], <1 x float> undef, <2 x i32> +; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <2 x float> undef, <2 x float> [[TMP4]], <2 x i32> ; CHECK-NEXT: [[BLOCK7:%.*]] = shufflevector <2 x float> [[SPLIT]], <2 x float> undef, <1 x i32> -; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x float> [[SPLIT2]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT8:%.*]] = insertelement <1 x float> undef, float [[TMP7]], i32 0 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x float> [[SPLIT2]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT8:%.*]] = insertelement <1 x float> undef, float [[TMP6]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT9:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT8]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP8:%.*]] = fmul <1 x float> [[BLOCK7]], [[SPLAT_SPLAT9]] +; CHECK-NEXT: [[TMP7:%.*]] = fmul <1 x float> [[BLOCK7]], [[SPLAT_SPLAT9]] ; CHECK-NEXT: [[BLOCK10:%.*]] = shufflevector <2 x float> [[SPLIT1]], <2 x float> undef, <1 x i32> -; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x float> [[SPLIT2]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT11:%.*]] = insertelement <1 x float> undef, float [[TMP9]], i32 0 +; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x float> [[SPLIT2]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT11:%.*]] = insertelement <1 x float> undef, float [[TMP8]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT12:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT11]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP10:%.*]] = fmul <1 x float> [[BLOCK10]], [[SPLAT_SPLAT12]] -; CHECK-NEXT: [[TMP11:%.*]] = fadd <1 x float> [[TMP8]], [[TMP10]] -; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <1 x float> [[TMP11]], <1 x float> undef, <2 x i32> -; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <2 x float> [[TMP6]], <2 x float> [[TMP12]], <2 x i32> +; CHECK-NEXT: [[TMP9:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK10]], <1 x float> [[SPLAT_SPLAT12]], <1 x float> [[TMP7]]) +; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <1 x float> [[TMP9]], <1 x float> undef, <2 x i32> +; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> [[TMP10]], <2 x i32> ; CHECK-NEXT: [[BLOCK13:%.*]] = shufflevector <2 x float> [[SPLIT]], <2 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT14:%.*]] = insertelement <1 x float> undef, float [[TMP14]], i32 0 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT14:%.*]] = insertelement <1 x float> undef, float [[TMP12]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT15:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT14]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP15:%.*]] = fmul <1 x float> [[BLOCK13]], [[SPLAT_SPLAT15]] +; CHECK-NEXT: [[TMP13:%.*]] = fmul <1 x float> [[BLOCK13]], [[SPLAT_SPLAT15]] ; CHECK-NEXT: [[BLOCK16:%.*]] = shufflevector <2 x float> [[SPLIT1]], <2 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP16:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT17:%.*]] = insertelement <1 x float> undef, float [[TMP16]], i32 0 +; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT17:%.*]] = insertelement <1 x float> undef, float [[TMP14]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT18:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT17]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP17:%.*]] = fmul <1 x float> [[BLOCK16]], [[SPLAT_SPLAT18]] -; CHECK-NEXT: [[TMP18:%.*]] = fadd <1 x float> [[TMP15]], [[TMP17]] -; CHECK-NEXT: [[TMP19:%.*]] = shufflevector <1 x float> [[TMP18]], <1 x float> undef, <2 x i32> -; CHECK-NEXT: [[TMP20:%.*]] = shufflevector <2 x float> undef, <2 x float> [[TMP19]], <2 x i32> +; CHECK-NEXT: [[TMP15:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK16]], <1 x float> [[SPLAT_SPLAT18]], <1 x float> [[TMP13]]) +; CHECK-NEXT: [[TMP16:%.*]] = shufflevector <1 x float> [[TMP15]], <1 x float> undef, <2 x i32> +; CHECK-NEXT: [[TMP17:%.*]] = shufflevector <2 x float> undef, <2 x float> [[TMP16]], <2 x i32> ; CHECK-NEXT: [[BLOCK19:%.*]] = shufflevector <2 x float> [[SPLIT]], <2 x float> undef, <1 x i32> -; CHECK-NEXT: [[TMP21:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT20:%.*]] = insertelement <1 x float> undef, float [[TMP21]], i32 0 +; CHECK-NEXT: [[TMP18:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT20:%.*]] = insertelement <1 x float> undef, float [[TMP18]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT21:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT20]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP22:%.*]] = fmul <1 x float> [[BLOCK19]], [[SPLAT_SPLAT21]] +; CHECK-NEXT: [[TMP19:%.*]] = fmul <1 x float> [[BLOCK19]], [[SPLAT_SPLAT21]] ; CHECK-NEXT: [[BLOCK22:%.*]] = shufflevector <2 x float> [[SPLIT1]], <2 x float> undef, <1 x i32> -; CHECK-NEXT: [[TMP23:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT23:%.*]] = insertelement <1 x float> undef, float [[TMP23]], i32 0 +; CHECK-NEXT: [[TMP20:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT23:%.*]] = insertelement <1 x float> undef, float [[TMP20]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT24:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT23]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP24:%.*]] = fmul <1 x float> [[BLOCK22]], [[SPLAT_SPLAT24]] -; CHECK-NEXT: [[TMP25:%.*]] = fadd <1 x float> [[TMP22]], [[TMP24]] -; CHECK-NEXT: [[TMP26:%.*]] = shufflevector <1 x float> [[TMP25]], <1 x float> undef, <2 x i32> -; CHECK-NEXT: [[TMP27:%.*]] = shufflevector <2 x float> [[TMP20]], <2 x float> [[TMP26]], <2 x i32> -; CHECK-NEXT: [[TMP28:%.*]] = shufflevector <2 x float> [[TMP13]], <2 x float> [[TMP27]], <4 x i32> -; CHECK-NEXT: ret <4 x float> [[TMP28]] +; CHECK-NEXT: [[TMP21:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK22]], <1 x float> [[SPLAT_SPLAT24]], <1 x float> [[TMP19]]) +; CHECK-NEXT: [[TMP22:%.*]] = shufflevector <1 x float> [[TMP21]], <1 x float> undef, <2 x i32> +; CHECK-NEXT: [[TMP23:%.*]] = shufflevector <2 x float> [[TMP17]], <2 x float> [[TMP22]], <2 x i32> +; CHECK-NEXT: [[TMP24:%.*]] = shufflevector <2 x float> [[TMP11]], <2 x float> [[TMP23]], <4 x i32> +; CHECK-NEXT: ret <4 x float> [[TMP24]] ; entry: %c = call <4 x float> @llvm.matrix.multiply.v4f32.v4f32.v4f32(<4 x float> %a, <4 x float> %b, i32 2, i32 2, i32 2) @@ -133,118 +129,109 @@ ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x float> [[SPLIT2]], i64 1 ; CHECK-NEXT: [[SPLAT_SPLATINSERT6:%.*]] = insertelement <1 x float> undef, float [[TMP2]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT7:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT6]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP3:%.*]] = fmul <1 x float> [[BLOCK5]], [[SPLAT_SPLAT7]] -; CHECK-NEXT: [[TMP4:%.*]] = fadd <1 x float> [[TMP1]], [[TMP3]] -; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <1 x float> [[TMP4]], <1 x float> undef, <3 x i32> -; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <3 x float> undef, <3 x float> [[TMP5]], <3 x i32> +; CHECK-NEXT: [[TMP3:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK5]], <1 x float> [[SPLAT_SPLAT7]], <1 x float> [[TMP1]]) +; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <1 x float> [[TMP3]], <1 x float> undef, <3 x i32> +; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <3 x float> undef, <3 x float> [[TMP4]], <3 x i32> ; CHECK-NEXT: [[BLOCK8:%.*]] = shufflevector <3 x float> [[SPLIT]], <3 x float> undef, <1 x i32> -; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x float> [[SPLIT2]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT9:%.*]] = insertelement <1 x float> undef, float [[TMP7]], i32 0 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x float> [[SPLIT2]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT9:%.*]] = insertelement <1 x float> undef, float [[TMP6]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT10:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT9]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP8:%.*]] = fmul <1 x float> [[BLOCK8]], [[SPLAT_SPLAT10]] +; CHECK-NEXT: [[TMP7:%.*]] = fmul <1 x float> [[BLOCK8]], [[SPLAT_SPLAT10]] ; CHECK-NEXT: [[BLOCK11:%.*]] = shufflevector <3 x float> [[SPLIT1]], <3 x float> undef, <1 x i32> -; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x float> [[SPLIT2]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT12:%.*]] = insertelement <1 x float> undef, float [[TMP9]], i32 0 +; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x float> [[SPLIT2]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT12:%.*]] = insertelement <1 x float> undef, float [[TMP8]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT13:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT12]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP10:%.*]] = fmul <1 x float> [[BLOCK11]], [[SPLAT_SPLAT13]] -; CHECK-NEXT: [[TMP11:%.*]] = fadd <1 x float> [[TMP8]], [[TMP10]] -; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <1 x float> [[TMP11]], <1 x float> undef, <3 x i32> -; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <3 x float> [[TMP6]], <3 x float> [[TMP12]], <3 x i32> +; CHECK-NEXT: [[TMP9:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK11]], <1 x float> [[SPLAT_SPLAT13]], <1 x float> [[TMP7]]) +; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <1 x float> [[TMP9]], <1 x float> undef, <3 x i32> +; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <3 x float> [[TMP5]], <3 x float> [[TMP10]], <3 x i32> ; CHECK-NEXT: [[BLOCK14:%.*]] = shufflevector <3 x float> [[SPLIT]], <3 x float> undef, <1 x i32> -; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x float> [[SPLIT2]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT15:%.*]] = insertelement <1 x float> undef, float [[TMP14]], i32 0 +; CHECK-NEXT: [[TMP12:%.*]] = extractelement <2 x float> [[SPLIT2]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT15:%.*]] = insertelement <1 x float> undef, float [[TMP12]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT16:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT15]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP15:%.*]] = fmul <1 x float> [[BLOCK14]], [[SPLAT_SPLAT16]] +; CHECK-NEXT: [[TMP13:%.*]] = fmul <1 x float> [[BLOCK14]], [[SPLAT_SPLAT16]] ; CHECK-NEXT: [[BLOCK17:%.*]] = shufflevector <3 x float> [[SPLIT1]], <3 x float> undef, <1 x i32> -; CHECK-NEXT: [[TMP16:%.*]] = extractelement <2 x float> [[SPLIT2]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT18:%.*]] = insertelement <1 x float> undef, float [[TMP16]], i32 0 +; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x float> [[SPLIT2]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT18:%.*]] = insertelement <1 x float> undef, float [[TMP14]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT19:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT18]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP17:%.*]] = fmul <1 x float> [[BLOCK17]], [[SPLAT_SPLAT19]] -; CHECK-NEXT: [[TMP18:%.*]] = fadd <1 x float> [[TMP15]], [[TMP17]] -; CHECK-NEXT: [[TMP19:%.*]] = shufflevector <1 x float> [[TMP18]], <1 x float> undef, <3 x i32> -; CHECK-NEXT: [[TMP20:%.*]] = shufflevector <3 x float> [[TMP13]], <3 x float> [[TMP19]], <3 x i32> +; CHECK-NEXT: [[TMP15:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK17]], <1 x float> [[SPLAT_SPLAT19]], <1 x float> [[TMP13]]) +; CHECK-NEXT: [[TMP16:%.*]] = shufflevector <1 x float> [[TMP15]], <1 x float> undef, <3 x i32> +; CHECK-NEXT: [[TMP17:%.*]] = shufflevector <3 x float> [[TMP11]], <3 x float> [[TMP16]], <3 x i32> ; CHECK-NEXT: [[BLOCK20:%.*]] = shufflevector <3 x float> [[SPLIT]], <3 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP21:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT21:%.*]] = insertelement <1 x float> undef, float [[TMP21]], i32 0 +; CHECK-NEXT: [[TMP18:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT21:%.*]] = insertelement <1 x float> undef, float [[TMP18]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT22:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT21]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP22:%.*]] = fmul <1 x float> [[BLOCK20]], [[SPLAT_SPLAT22]] +; CHECK-NEXT: [[TMP19:%.*]] = fmul <1 x float> [[BLOCK20]], [[SPLAT_SPLAT22]] ; CHECK-NEXT: [[BLOCK23:%.*]] = shufflevector <3 x float> [[SPLIT1]], <3 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP23:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT24:%.*]] = insertelement <1 x float> undef, float [[TMP23]], i32 0 +; CHECK-NEXT: [[TMP20:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT24:%.*]] = insertelement <1 x float> undef, float [[TMP20]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT25:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT24]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP24:%.*]] = fmul <1 x float> [[BLOCK23]], [[SPLAT_SPLAT25]] -; CHECK-NEXT: [[TMP25:%.*]] = fadd <1 x float> [[TMP22]], [[TMP24]] -; CHECK-NEXT: [[TMP26:%.*]] = shufflevector <1 x float> [[TMP25]], <1 x float> undef, <3 x i32> -; CHECK-NEXT: [[TMP27:%.*]] = shufflevector <3 x float> undef, <3 x float> [[TMP26]], <3 x i32> +; CHECK-NEXT: [[TMP21:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK23]], <1 x float> [[SPLAT_SPLAT25]], <1 x float> [[TMP19]]) +; CHECK-NEXT: [[TMP22:%.*]] = shufflevector <1 x float> [[TMP21]], <1 x float> undef, <3 x i32> +; CHECK-NEXT: [[TMP23:%.*]] = shufflevector <3 x float> undef, <3 x float> [[TMP22]], <3 x i32> ; CHECK-NEXT: [[BLOCK26:%.*]] = shufflevector <3 x float> [[SPLIT]], <3 x float> undef, <1 x i32> -; CHECK-NEXT: [[TMP28:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT27:%.*]] = insertelement <1 x float> undef, float [[TMP28]], i32 0 +; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT27:%.*]] = insertelement <1 x float> undef, float [[TMP24]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT28:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT27]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP29:%.*]] = fmul <1 x float> [[BLOCK26]], [[SPLAT_SPLAT28]] +; CHECK-NEXT: [[TMP25:%.*]] = fmul <1 x float> [[BLOCK26]], [[SPLAT_SPLAT28]] ; CHECK-NEXT: [[BLOCK29:%.*]] = shufflevector <3 x float> [[SPLIT1]], <3 x float> undef, <1 x i32> -; CHECK-NEXT: [[TMP30:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT30:%.*]] = insertelement <1 x float> undef, float [[TMP30]], i32 0 +; CHECK-NEXT: [[TMP26:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT30:%.*]] = insertelement <1 x float> undef, float [[TMP26]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT31:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT30]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP31:%.*]] = fmul <1 x float> [[BLOCK29]], [[SPLAT_SPLAT31]] -; CHECK-NEXT: [[TMP32:%.*]] = fadd <1 x float> [[TMP29]], [[TMP31]] -; CHECK-NEXT: [[TMP33:%.*]] = shufflevector <1 x float> [[TMP32]], <1 x float> undef, <3 x i32> -; CHECK-NEXT: [[TMP34:%.*]] = shufflevector <3 x float> [[TMP27]], <3 x float> [[TMP33]], <3 x i32> +; CHECK-NEXT: [[TMP27:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK29]], <1 x float> [[SPLAT_SPLAT31]], <1 x float> [[TMP25]]) +; CHECK-NEXT: [[TMP28:%.*]] = shufflevector <1 x float> [[TMP27]], <1 x float> undef, <3 x i32> +; CHECK-NEXT: [[TMP29:%.*]] = shufflevector <3 x float> [[TMP23]], <3 x float> [[TMP28]], <3 x i32> ; CHECK-NEXT: [[BLOCK32:%.*]] = shufflevector <3 x float> [[SPLIT]], <3 x float> undef, <1 x i32> -; CHECK-NEXT: [[TMP35:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT33:%.*]] = insertelement <1 x float> undef, float [[TMP35]], i32 0 +; CHECK-NEXT: [[TMP30:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT33:%.*]] = insertelement <1 x float> undef, float [[TMP30]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT34:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT33]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP36:%.*]] = fmul <1 x float> [[BLOCK32]], [[SPLAT_SPLAT34]] +; CHECK-NEXT: [[TMP31:%.*]] = fmul <1 x float> [[BLOCK32]], [[SPLAT_SPLAT34]] ; CHECK-NEXT: [[BLOCK35:%.*]] = shufflevector <3 x float> [[SPLIT1]], <3 x float> undef, <1 x i32> -; CHECK-NEXT: [[TMP37:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT36:%.*]] = insertelement <1 x float> undef, float [[TMP37]], i32 0 +; CHECK-NEXT: [[TMP32:%.*]] = extractelement <2 x float> [[SPLIT3]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT36:%.*]] = insertelement <1 x float> undef, float [[TMP32]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT37:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT36]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP38:%.*]] = fmul <1 x float> [[BLOCK35]], [[SPLAT_SPLAT37]] -; CHECK-NEXT: [[TMP39:%.*]] = fadd <1 x float> [[TMP36]], [[TMP38]] -; CHECK-NEXT: [[TMP40:%.*]] = shufflevector <1 x float> [[TMP39]], <1 x float> undef, <3 x i32> -; CHECK-NEXT: [[TMP41:%.*]] = shufflevector <3 x float> [[TMP34]], <3 x float> [[TMP40]], <3 x i32> +; CHECK-NEXT: [[TMP33:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK35]], <1 x float> [[SPLAT_SPLAT37]], <1 x float> [[TMP31]]) +; CHECK-NEXT: [[TMP34:%.*]] = shufflevector <1 x float> [[TMP33]], <1 x float> undef, <3 x i32> +; CHECK-NEXT: [[TMP35:%.*]] = shufflevector <3 x float> [[TMP29]], <3 x float> [[TMP34]], <3 x i32> ; CHECK-NEXT: [[BLOCK38:%.*]] = shufflevector <3 x float> [[SPLIT]], <3 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP42:%.*]] = extractelement <2 x float> [[SPLIT4]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT39:%.*]] = insertelement <1 x float> undef, float [[TMP42]], i32 0 +; CHECK-NEXT: [[TMP36:%.*]] = extractelement <2 x float> [[SPLIT4]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT39:%.*]] = insertelement <1 x float> undef, float [[TMP36]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT40:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT39]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP43:%.*]] = fmul <1 x float> [[BLOCK38]], [[SPLAT_SPLAT40]] +; CHECK-NEXT: [[TMP37:%.*]] = fmul <1 x float> [[BLOCK38]], [[SPLAT_SPLAT40]] ; CHECK-NEXT: [[BLOCK41:%.*]] = shufflevector <3 x float> [[SPLIT1]], <3 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP44:%.*]] = extractelement <2 x float> [[SPLIT4]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT42:%.*]] = insertelement <1 x float> undef, float [[TMP44]], i32 0 +; CHECK-NEXT: [[TMP38:%.*]] = extractelement <2 x float> [[SPLIT4]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT42:%.*]] = insertelement <1 x float> undef, float [[TMP38]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT43:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT42]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP45:%.*]] = fmul <1 x float> [[BLOCK41]], [[SPLAT_SPLAT43]] -; CHECK-NEXT: [[TMP46:%.*]] = fadd <1 x float> [[TMP43]], [[TMP45]] -; CHECK-NEXT: [[TMP47:%.*]] = shufflevector <1 x float> [[TMP46]], <1 x float> undef, <3 x i32> -; CHECK-NEXT: [[TMP48:%.*]] = shufflevector <3 x float> undef, <3 x float> [[TMP47]], <3 x i32> +; CHECK-NEXT: [[TMP39:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK41]], <1 x float> [[SPLAT_SPLAT43]], <1 x float> [[TMP37]]) +; CHECK-NEXT: [[TMP40:%.*]] = shufflevector <1 x float> [[TMP39]], <1 x float> undef, <3 x i32> +; CHECK-NEXT: [[TMP41:%.*]] = shufflevector <3 x float> undef, <3 x float> [[TMP40]], <3 x i32> ; CHECK-NEXT: [[BLOCK44:%.*]] = shufflevector <3 x float> [[SPLIT]], <3 x float> undef, <1 x i32> -; CHECK-NEXT: [[TMP49:%.*]] = extractelement <2 x float> [[SPLIT4]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT45:%.*]] = insertelement <1 x float> undef, float [[TMP49]], i32 0 +; CHECK-NEXT: [[TMP42:%.*]] = extractelement <2 x float> [[SPLIT4]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT45:%.*]] = insertelement <1 x float> undef, float [[TMP42]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT46:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT45]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP50:%.*]] = fmul <1 x float> [[BLOCK44]], [[SPLAT_SPLAT46]] +; CHECK-NEXT: [[TMP43:%.*]] = fmul <1 x float> [[BLOCK44]], [[SPLAT_SPLAT46]] ; CHECK-NEXT: [[BLOCK47:%.*]] = shufflevector <3 x float> [[SPLIT1]], <3 x float> undef, <1 x i32> -; CHECK-NEXT: [[TMP51:%.*]] = extractelement <2 x float> [[SPLIT4]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT48:%.*]] = insertelement <1 x float> undef, float [[TMP51]], i32 0 +; CHECK-NEXT: [[TMP44:%.*]] = extractelement <2 x float> [[SPLIT4]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT48:%.*]] = insertelement <1 x float> undef, float [[TMP44]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT49:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT48]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP52:%.*]] = fmul <1 x float> [[BLOCK47]], [[SPLAT_SPLAT49]] -; CHECK-NEXT: [[TMP53:%.*]] = fadd <1 x float> [[TMP50]], [[TMP52]] -; CHECK-NEXT: [[TMP54:%.*]] = shufflevector <1 x float> [[TMP53]], <1 x float> undef, <3 x i32> -; CHECK-NEXT: [[TMP55:%.*]] = shufflevector <3 x float> [[TMP48]], <3 x float> [[TMP54]], <3 x i32> +; CHECK-NEXT: [[TMP45:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK47]], <1 x float> [[SPLAT_SPLAT49]], <1 x float> [[TMP43]]) +; CHECK-NEXT: [[TMP46:%.*]] = shufflevector <1 x float> [[TMP45]], <1 x float> undef, <3 x i32> +; CHECK-NEXT: [[TMP47:%.*]] = shufflevector <3 x float> [[TMP41]], <3 x float> [[TMP46]], <3 x i32> ; CHECK-NEXT: [[BLOCK50:%.*]] = shufflevector <3 x float> [[SPLIT]], <3 x float> undef, <1 x i32> -; CHECK-NEXT: [[TMP56:%.*]] = extractelement <2 x float> [[SPLIT4]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT51:%.*]] = insertelement <1 x float> undef, float [[TMP56]], i32 0 +; CHECK-NEXT: [[TMP48:%.*]] = extractelement <2 x float> [[SPLIT4]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT51:%.*]] = insertelement <1 x float> undef, float [[TMP48]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT52:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT51]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP57:%.*]] = fmul <1 x float> [[BLOCK50]], [[SPLAT_SPLAT52]] +; CHECK-NEXT: [[TMP49:%.*]] = fmul <1 x float> [[BLOCK50]], [[SPLAT_SPLAT52]] ; CHECK-NEXT: [[BLOCK53:%.*]] = shufflevector <3 x float> [[SPLIT1]], <3 x float> undef, <1 x i32> -; CHECK-NEXT: [[TMP58:%.*]] = extractelement <2 x float> [[SPLIT4]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT54:%.*]] = insertelement <1 x float> undef, float [[TMP58]], i32 0 +; CHECK-NEXT: [[TMP50:%.*]] = extractelement <2 x float> [[SPLIT4]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT54:%.*]] = insertelement <1 x float> undef, float [[TMP50]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT55:%.*]] = shufflevector <1 x float> [[SPLAT_SPLATINSERT54]], <1 x float> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP59:%.*]] = fmul <1 x float> [[BLOCK53]], [[SPLAT_SPLAT55]] -; CHECK-NEXT: [[TMP60:%.*]] = fadd <1 x float> [[TMP57]], [[TMP59]] -; CHECK-NEXT: [[TMP61:%.*]] = shufflevector <1 x float> [[TMP60]], <1 x float> undef, <3 x i32> -; CHECK-NEXT: [[TMP62:%.*]] = shufflevector <3 x float> [[TMP55]], <3 x float> [[TMP61]], <3 x i32> -; CHECK-NEXT: [[TMP63:%.*]] = shufflevector <3 x float> [[TMP20]], <3 x float> [[TMP41]], <6 x i32> -; CHECK-NEXT: [[TMP64:%.*]] = shufflevector <3 x float> [[TMP62]], <3 x float> undef, <6 x i32> -; CHECK-NEXT: [[TMP65:%.*]] = shufflevector <6 x float> [[TMP63]], <6 x float> [[TMP64]], <9 x i32> -; CHECK-NEXT: ret <9 x float> [[TMP65]] +; CHECK-NEXT: [[TMP51:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK53]], <1 x float> [[SPLAT_SPLAT55]], <1 x float> [[TMP49]]) +; CHECK-NEXT: [[TMP52:%.*]] = shufflevector <1 x float> [[TMP51]], <1 x float> undef, <3 x i32> +; CHECK-NEXT: [[TMP53:%.*]] = shufflevector <3 x float> [[TMP47]], <3 x float> [[TMP52]], <3 x i32> +; CHECK-NEXT: [[TMP54:%.*]] = shufflevector <3 x float> [[TMP17]], <3 x float> [[TMP35]], <6 x i32> +; CHECK-NEXT: [[TMP55:%.*]] = shufflevector <3 x float> [[TMP53]], <3 x float> undef, <6 x i32> +; CHECK-NEXT: [[TMP56:%.*]] = shufflevector <6 x float> [[TMP54]], <6 x float> [[TMP55]], <9 x i32> +; CHECK-NEXT: ret <9 x float> [[TMP56]] ; entry: %c = call <9 x float> @llvm.matrix.multiply.v6f32.v6f32.v6f32(<6 x float> %a, <6 x float> %b, i32 3, i32 2, i32 3) diff --git a/llvm/test/Transforms/LowerMatrixIntrinsics/propagate-backwards-unsupported.ll b/llvm/test/Transforms/LowerMatrixIntrinsics/propagate-backwards-unsupported.ll --- a/llvm/test/Transforms/LowerMatrixIntrinsics/propagate-backwards-unsupported.ll +++ b/llvm/test/Transforms/LowerMatrixIntrinsics/propagate-backwards-unsupported.ll @@ -75,172 +75,154 @@ ; CHECK-NEXT: [[TMP44:%.*]] = extractelement <3 x double> [[SPLIT9]], i64 1 ; CHECK-NEXT: [[SPLAT_SPLATINSERT13:%.*]] = insertelement <1 x double> undef, double [[TMP44]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT14:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT13]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP45:%.*]] = fmul <1 x double> [[BLOCK12]], [[SPLAT_SPLAT14]] -; CHECK-NEXT: [[TMP46:%.*]] = fadd <1 x double> [[TMP43]], [[TMP45]] +; CHECK-NEXT: [[TMP45:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK12]], <1 x double> [[SPLAT_SPLAT14]], <1 x double> [[TMP43]]) ; CHECK-NEXT: [[BLOCK15:%.*]] = shufflevector <3 x double> [[SPLIT8]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP47:%.*]] = extractelement <3 x double> [[SPLIT9]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT16:%.*]] = insertelement <1 x double> undef, double [[TMP47]], i32 0 +; CHECK-NEXT: [[TMP46:%.*]] = extractelement <3 x double> [[SPLIT9]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT16:%.*]] = insertelement <1 x double> undef, double [[TMP46]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT17:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT16]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP48:%.*]] = fmul <1 x double> [[BLOCK15]], [[SPLAT_SPLAT17]] -; CHECK-NEXT: [[TMP49:%.*]] = fadd <1 x double> [[TMP46]], [[TMP48]] -; CHECK-NEXT: [[TMP50:%.*]] = shufflevector <1 x double> [[TMP49]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP51:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP50]], <3 x i32> +; CHECK-NEXT: [[TMP47:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK15]], <1 x double> [[SPLAT_SPLAT17]], <1 x double> [[TMP45]]) +; CHECK-NEXT: [[TMP48:%.*]] = shufflevector <1 x double> [[TMP47]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP49:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP48]], <3 x i32> ; CHECK-NEXT: [[BLOCK18:%.*]] = shufflevector <3 x double> [[SPLIT6]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP52:%.*]] = extractelement <3 x double> [[SPLIT9]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT19:%.*]] = insertelement <1 x double> undef, double [[TMP52]], i32 0 +; CHECK-NEXT: [[TMP50:%.*]] = extractelement <3 x double> [[SPLIT9]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT19:%.*]] = insertelement <1 x double> undef, double [[TMP50]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT20:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT19]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP53:%.*]] = fmul <1 x double> [[BLOCK18]], [[SPLAT_SPLAT20]] +; CHECK-NEXT: [[TMP51:%.*]] = fmul <1 x double> [[BLOCK18]], [[SPLAT_SPLAT20]] ; CHECK-NEXT: [[BLOCK21:%.*]] = shufflevector <3 x double> [[SPLIT7]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP54:%.*]] = extractelement <3 x double> [[SPLIT9]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT22:%.*]] = insertelement <1 x double> undef, double [[TMP54]], i32 0 +; CHECK-NEXT: [[TMP52:%.*]] = extractelement <3 x double> [[SPLIT9]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT22:%.*]] = insertelement <1 x double> undef, double [[TMP52]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT23:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT22]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP55:%.*]] = fmul <1 x double> [[BLOCK21]], [[SPLAT_SPLAT23]] -; CHECK-NEXT: [[TMP56:%.*]] = fadd <1 x double> [[TMP53]], [[TMP55]] +; CHECK-NEXT: [[TMP53:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK21]], <1 x double> [[SPLAT_SPLAT23]], <1 x double> [[TMP51]]) ; CHECK-NEXT: [[BLOCK24:%.*]] = shufflevector <3 x double> [[SPLIT8]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP57:%.*]] = extractelement <3 x double> [[SPLIT9]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT25:%.*]] = insertelement <1 x double> undef, double [[TMP57]], i32 0 +; CHECK-NEXT: [[TMP54:%.*]] = extractelement <3 x double> [[SPLIT9]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT25:%.*]] = insertelement <1 x double> undef, double [[TMP54]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT26:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT25]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP58:%.*]] = fmul <1 x double> [[BLOCK24]], [[SPLAT_SPLAT26]] -; CHECK-NEXT: [[TMP59:%.*]] = fadd <1 x double> [[TMP56]], [[TMP58]] -; CHECK-NEXT: [[TMP60:%.*]] = shufflevector <1 x double> [[TMP59]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP61:%.*]] = shufflevector <3 x double> [[TMP51]], <3 x double> [[TMP60]], <3 x i32> +; CHECK-NEXT: [[TMP55:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK24]], <1 x double> [[SPLAT_SPLAT26]], <1 x double> [[TMP53]]) +; CHECK-NEXT: [[TMP56:%.*]] = shufflevector <1 x double> [[TMP55]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP57:%.*]] = shufflevector <3 x double> [[TMP49]], <3 x double> [[TMP56]], <3 x i32> ; CHECK-NEXT: [[BLOCK27:%.*]] = shufflevector <3 x double> [[SPLIT6]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP62:%.*]] = extractelement <3 x double> [[SPLIT9]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT28:%.*]] = insertelement <1 x double> undef, double [[TMP62]], i32 0 +; CHECK-NEXT: [[TMP58:%.*]] = extractelement <3 x double> [[SPLIT9]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT28:%.*]] = insertelement <1 x double> undef, double [[TMP58]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT29:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT28]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP63:%.*]] = fmul <1 x double> [[BLOCK27]], [[SPLAT_SPLAT29]] +; CHECK-NEXT: [[TMP59:%.*]] = fmul <1 x double> [[BLOCK27]], [[SPLAT_SPLAT29]] ; CHECK-NEXT: [[BLOCK30:%.*]] = shufflevector <3 x double> [[SPLIT7]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP64:%.*]] = extractelement <3 x double> [[SPLIT9]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT31:%.*]] = insertelement <1 x double> undef, double [[TMP64]], i32 0 +; CHECK-NEXT: [[TMP60:%.*]] = extractelement <3 x double> [[SPLIT9]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT31:%.*]] = insertelement <1 x double> undef, double [[TMP60]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT32:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT31]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP65:%.*]] = fmul <1 x double> [[BLOCK30]], [[SPLAT_SPLAT32]] -; CHECK-NEXT: [[TMP66:%.*]] = fadd <1 x double> [[TMP63]], [[TMP65]] +; CHECK-NEXT: [[TMP61:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK30]], <1 x double> [[SPLAT_SPLAT32]], <1 x double> [[TMP59]]) ; CHECK-NEXT: [[BLOCK33:%.*]] = shufflevector <3 x double> [[SPLIT8]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP67:%.*]] = extractelement <3 x double> [[SPLIT9]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT34:%.*]] = insertelement <1 x double> undef, double [[TMP67]], i32 0 +; CHECK-NEXT: [[TMP62:%.*]] = extractelement <3 x double> [[SPLIT9]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT34:%.*]] = insertelement <1 x double> undef, double [[TMP62]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT35:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT34]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP68:%.*]] = fmul <1 x double> [[BLOCK33]], [[SPLAT_SPLAT35]] -; CHECK-NEXT: [[TMP69:%.*]] = fadd <1 x double> [[TMP66]], [[TMP68]] -; CHECK-NEXT: [[TMP70:%.*]] = shufflevector <1 x double> [[TMP69]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP71:%.*]] = shufflevector <3 x double> [[TMP61]], <3 x double> [[TMP70]], <3 x i32> +; CHECK-NEXT: [[TMP63:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK33]], <1 x double> [[SPLAT_SPLAT35]], <1 x double> [[TMP61]]) +; CHECK-NEXT: [[TMP64:%.*]] = shufflevector <1 x double> [[TMP63]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP65:%.*]] = shufflevector <3 x double> [[TMP57]], <3 x double> [[TMP64]], <3 x i32> ; CHECK-NEXT: [[BLOCK36:%.*]] = shufflevector <3 x double> [[SPLIT6]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP72:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT37:%.*]] = insertelement <1 x double> undef, double [[TMP72]], i32 0 +; CHECK-NEXT: [[TMP66:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT37:%.*]] = insertelement <1 x double> undef, double [[TMP66]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT38:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT37]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP73:%.*]] = fmul <1 x double> [[BLOCK36]], [[SPLAT_SPLAT38]] +; CHECK-NEXT: [[TMP67:%.*]] = fmul <1 x double> [[BLOCK36]], [[SPLAT_SPLAT38]] ; CHECK-NEXT: [[BLOCK39:%.*]] = shufflevector <3 x double> [[SPLIT7]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP74:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT40:%.*]] = insertelement <1 x double> undef, double [[TMP74]], i32 0 +; CHECK-NEXT: [[TMP68:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT40:%.*]] = insertelement <1 x double> undef, double [[TMP68]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT41:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT40]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP75:%.*]] = fmul <1 x double> [[BLOCK39]], [[SPLAT_SPLAT41]] -; CHECK-NEXT: [[TMP76:%.*]] = fadd <1 x double> [[TMP73]], [[TMP75]] +; CHECK-NEXT: [[TMP69:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK39]], <1 x double> [[SPLAT_SPLAT41]], <1 x double> [[TMP67]]) ; CHECK-NEXT: [[BLOCK42:%.*]] = shufflevector <3 x double> [[SPLIT8]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP77:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT43:%.*]] = insertelement <1 x double> undef, double [[TMP77]], i32 0 +; CHECK-NEXT: [[TMP70:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT43:%.*]] = insertelement <1 x double> undef, double [[TMP70]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT44:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT43]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP78:%.*]] = fmul <1 x double> [[BLOCK42]], [[SPLAT_SPLAT44]] -; CHECK-NEXT: [[TMP79:%.*]] = fadd <1 x double> [[TMP76]], [[TMP78]] -; CHECK-NEXT: [[TMP80:%.*]] = shufflevector <1 x double> [[TMP79]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP81:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP80]], <3 x i32> +; CHECK-NEXT: [[TMP71:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK42]], <1 x double> [[SPLAT_SPLAT44]], <1 x double> [[TMP69]]) +; CHECK-NEXT: [[TMP72:%.*]] = shufflevector <1 x double> [[TMP71]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP73:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP72]], <3 x i32> ; CHECK-NEXT: [[BLOCK45:%.*]] = shufflevector <3 x double> [[SPLIT6]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP82:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT46:%.*]] = insertelement <1 x double> undef, double [[TMP82]], i32 0 +; CHECK-NEXT: [[TMP74:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT46:%.*]] = insertelement <1 x double> undef, double [[TMP74]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT47:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT46]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP83:%.*]] = fmul <1 x double> [[BLOCK45]], [[SPLAT_SPLAT47]] +; CHECK-NEXT: [[TMP75:%.*]] = fmul <1 x double> [[BLOCK45]], [[SPLAT_SPLAT47]] ; CHECK-NEXT: [[BLOCK48:%.*]] = shufflevector <3 x double> [[SPLIT7]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP84:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT49:%.*]] = insertelement <1 x double> undef, double [[TMP84]], i32 0 +; CHECK-NEXT: [[TMP76:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT49:%.*]] = insertelement <1 x double> undef, double [[TMP76]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT50:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT49]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP85:%.*]] = fmul <1 x double> [[BLOCK48]], [[SPLAT_SPLAT50]] -; CHECK-NEXT: [[TMP86:%.*]] = fadd <1 x double> [[TMP83]], [[TMP85]] +; CHECK-NEXT: [[TMP77:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK48]], <1 x double> [[SPLAT_SPLAT50]], <1 x double> [[TMP75]]) ; CHECK-NEXT: [[BLOCK51:%.*]] = shufflevector <3 x double> [[SPLIT8]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP87:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT52:%.*]] = insertelement <1 x double> undef, double [[TMP87]], i32 0 +; CHECK-NEXT: [[TMP78:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT52:%.*]] = insertelement <1 x double> undef, double [[TMP78]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT53:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT52]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP88:%.*]] = fmul <1 x double> [[BLOCK51]], [[SPLAT_SPLAT53]] -; CHECK-NEXT: [[TMP89:%.*]] = fadd <1 x double> [[TMP86]], [[TMP88]] -; CHECK-NEXT: [[TMP90:%.*]] = shufflevector <1 x double> [[TMP89]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP91:%.*]] = shufflevector <3 x double> [[TMP81]], <3 x double> [[TMP90]], <3 x i32> +; CHECK-NEXT: [[TMP79:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK51]], <1 x double> [[SPLAT_SPLAT53]], <1 x double> [[TMP77]]) +; CHECK-NEXT: [[TMP80:%.*]] = shufflevector <1 x double> [[TMP79]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP81:%.*]] = shufflevector <3 x double> [[TMP73]], <3 x double> [[TMP80]], <3 x i32> ; CHECK-NEXT: [[BLOCK54:%.*]] = shufflevector <3 x double> [[SPLIT6]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP92:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT55:%.*]] = insertelement <1 x double> undef, double [[TMP92]], i32 0 +; CHECK-NEXT: [[TMP82:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT55:%.*]] = insertelement <1 x double> undef, double [[TMP82]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT56:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT55]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP93:%.*]] = fmul <1 x double> [[BLOCK54]], [[SPLAT_SPLAT56]] +; CHECK-NEXT: [[TMP83:%.*]] = fmul <1 x double> [[BLOCK54]], [[SPLAT_SPLAT56]] ; CHECK-NEXT: [[BLOCK57:%.*]] = shufflevector <3 x double> [[SPLIT7]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP94:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT58:%.*]] = insertelement <1 x double> undef, double [[TMP94]], i32 0 +; CHECK-NEXT: [[TMP84:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT58:%.*]] = insertelement <1 x double> undef, double [[TMP84]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT59:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT58]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP95:%.*]] = fmul <1 x double> [[BLOCK57]], [[SPLAT_SPLAT59]] -; CHECK-NEXT: [[TMP96:%.*]] = fadd <1 x double> [[TMP93]], [[TMP95]] +; CHECK-NEXT: [[TMP85:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK57]], <1 x double> [[SPLAT_SPLAT59]], <1 x double> [[TMP83]]) ; CHECK-NEXT: [[BLOCK60:%.*]] = shufflevector <3 x double> [[SPLIT8]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP97:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT61:%.*]] = insertelement <1 x double> undef, double [[TMP97]], i32 0 +; CHECK-NEXT: [[TMP86:%.*]] = extractelement <3 x double> [[SPLIT10]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT61:%.*]] = insertelement <1 x double> undef, double [[TMP86]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT62:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT61]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP98:%.*]] = fmul <1 x double> [[BLOCK60]], [[SPLAT_SPLAT62]] -; CHECK-NEXT: [[TMP99:%.*]] = fadd <1 x double> [[TMP96]], [[TMP98]] -; CHECK-NEXT: [[TMP100:%.*]] = shufflevector <1 x double> [[TMP99]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP101:%.*]] = shufflevector <3 x double> [[TMP91]], <3 x double> [[TMP100]], <3 x i32> +; CHECK-NEXT: [[TMP87:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK60]], <1 x double> [[SPLAT_SPLAT62]], <1 x double> [[TMP85]]) +; CHECK-NEXT: [[TMP88:%.*]] = shufflevector <1 x double> [[TMP87]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP89:%.*]] = shufflevector <3 x double> [[TMP81]], <3 x double> [[TMP88]], <3 x i32> ; CHECK-NEXT: [[BLOCK63:%.*]] = shufflevector <3 x double> [[SPLIT6]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP102:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT64:%.*]] = insertelement <1 x double> undef, double [[TMP102]], i32 0 +; CHECK-NEXT: [[TMP90:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT64:%.*]] = insertelement <1 x double> undef, double [[TMP90]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT65:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT64]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP103:%.*]] = fmul <1 x double> [[BLOCK63]], [[SPLAT_SPLAT65]] +; CHECK-NEXT: [[TMP91:%.*]] = fmul <1 x double> [[BLOCK63]], [[SPLAT_SPLAT65]] ; CHECK-NEXT: [[BLOCK66:%.*]] = shufflevector <3 x double> [[SPLIT7]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP104:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT67:%.*]] = insertelement <1 x double> undef, double [[TMP104]], i32 0 +; CHECK-NEXT: [[TMP92:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT67:%.*]] = insertelement <1 x double> undef, double [[TMP92]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT68:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT67]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP105:%.*]] = fmul <1 x double> [[BLOCK66]], [[SPLAT_SPLAT68]] -; CHECK-NEXT: [[TMP106:%.*]] = fadd <1 x double> [[TMP103]], [[TMP105]] +; CHECK-NEXT: [[TMP93:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK66]], <1 x double> [[SPLAT_SPLAT68]], <1 x double> [[TMP91]]) ; CHECK-NEXT: [[BLOCK69:%.*]] = shufflevector <3 x double> [[SPLIT8]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP107:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT70:%.*]] = insertelement <1 x double> undef, double [[TMP107]], i32 0 +; CHECK-NEXT: [[TMP94:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT70:%.*]] = insertelement <1 x double> undef, double [[TMP94]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT71:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT70]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP108:%.*]] = fmul <1 x double> [[BLOCK69]], [[SPLAT_SPLAT71]] -; CHECK-NEXT: [[TMP109:%.*]] = fadd <1 x double> [[TMP106]], [[TMP108]] -; CHECK-NEXT: [[TMP110:%.*]] = shufflevector <1 x double> [[TMP109]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP111:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP110]], <3 x i32> +; CHECK-NEXT: [[TMP95:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK69]], <1 x double> [[SPLAT_SPLAT71]], <1 x double> [[TMP93]]) +; CHECK-NEXT: [[TMP96:%.*]] = shufflevector <1 x double> [[TMP95]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP97:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP96]], <3 x i32> ; CHECK-NEXT: [[BLOCK72:%.*]] = shufflevector <3 x double> [[SPLIT6]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP112:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT73:%.*]] = insertelement <1 x double> undef, double [[TMP112]], i32 0 +; CHECK-NEXT: [[TMP98:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT73:%.*]] = insertelement <1 x double> undef, double [[TMP98]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT74:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT73]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP113:%.*]] = fmul <1 x double> [[BLOCK72]], [[SPLAT_SPLAT74]] +; CHECK-NEXT: [[TMP99:%.*]] = fmul <1 x double> [[BLOCK72]], [[SPLAT_SPLAT74]] ; CHECK-NEXT: [[BLOCK75:%.*]] = shufflevector <3 x double> [[SPLIT7]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP114:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT76:%.*]] = insertelement <1 x double> undef, double [[TMP114]], i32 0 +; CHECK-NEXT: [[TMP100:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT76:%.*]] = insertelement <1 x double> undef, double [[TMP100]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT77:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT76]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP115:%.*]] = fmul <1 x double> [[BLOCK75]], [[SPLAT_SPLAT77]] -; CHECK-NEXT: [[TMP116:%.*]] = fadd <1 x double> [[TMP113]], [[TMP115]] +; CHECK-NEXT: [[TMP101:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK75]], <1 x double> [[SPLAT_SPLAT77]], <1 x double> [[TMP99]]) ; CHECK-NEXT: [[BLOCK78:%.*]] = shufflevector <3 x double> [[SPLIT8]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP117:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT79:%.*]] = insertelement <1 x double> undef, double [[TMP117]], i32 0 +; CHECK-NEXT: [[TMP102:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT79:%.*]] = insertelement <1 x double> undef, double [[TMP102]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT80:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT79]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP118:%.*]] = fmul <1 x double> [[BLOCK78]], [[SPLAT_SPLAT80]] -; CHECK-NEXT: [[TMP119:%.*]] = fadd <1 x double> [[TMP116]], [[TMP118]] -; CHECK-NEXT: [[TMP120:%.*]] = shufflevector <1 x double> [[TMP119]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP121:%.*]] = shufflevector <3 x double> [[TMP111]], <3 x double> [[TMP120]], <3 x i32> +; CHECK-NEXT: [[TMP103:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK78]], <1 x double> [[SPLAT_SPLAT80]], <1 x double> [[TMP101]]) +; CHECK-NEXT: [[TMP104:%.*]] = shufflevector <1 x double> [[TMP103]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP105:%.*]] = shufflevector <3 x double> [[TMP97]], <3 x double> [[TMP104]], <3 x i32> ; CHECK-NEXT: [[BLOCK81:%.*]] = shufflevector <3 x double> [[SPLIT6]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP122:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT82:%.*]] = insertelement <1 x double> undef, double [[TMP122]], i32 0 +; CHECK-NEXT: [[TMP106:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT82:%.*]] = insertelement <1 x double> undef, double [[TMP106]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT83:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT82]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP123:%.*]] = fmul <1 x double> [[BLOCK81]], [[SPLAT_SPLAT83]] +; CHECK-NEXT: [[TMP107:%.*]] = fmul <1 x double> [[BLOCK81]], [[SPLAT_SPLAT83]] ; CHECK-NEXT: [[BLOCK84:%.*]] = shufflevector <3 x double> [[SPLIT7]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP124:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT85:%.*]] = insertelement <1 x double> undef, double [[TMP124]], i32 0 +; CHECK-NEXT: [[TMP108:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT85:%.*]] = insertelement <1 x double> undef, double [[TMP108]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT86:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT85]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP125:%.*]] = fmul <1 x double> [[BLOCK84]], [[SPLAT_SPLAT86]] -; CHECK-NEXT: [[TMP126:%.*]] = fadd <1 x double> [[TMP123]], [[TMP125]] +; CHECK-NEXT: [[TMP109:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK84]], <1 x double> [[SPLAT_SPLAT86]], <1 x double> [[TMP107]]) ; CHECK-NEXT: [[BLOCK87:%.*]] = shufflevector <3 x double> [[SPLIT8]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP127:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT88:%.*]] = insertelement <1 x double> undef, double [[TMP127]], i32 0 +; CHECK-NEXT: [[TMP110:%.*]] = extractelement <3 x double> [[SPLIT11]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT88:%.*]] = insertelement <1 x double> undef, double [[TMP110]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT89:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT88]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP128:%.*]] = fmul <1 x double> [[BLOCK87]], [[SPLAT_SPLAT89]] -; CHECK-NEXT: [[TMP129:%.*]] = fadd <1 x double> [[TMP126]], [[TMP128]] -; CHECK-NEXT: [[TMP130:%.*]] = shufflevector <1 x double> [[TMP129]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP131:%.*]] = shufflevector <3 x double> [[TMP121]], <3 x double> [[TMP130]], <3 x i32> -; CHECK-NEXT: [[TMP132:%.*]] = shufflevector <3 x double> [[TMP71]], <3 x double> [[TMP101]], <6 x i32> -; CHECK-NEXT: [[TMP133:%.*]] = shufflevector <3 x double> [[TMP131]], <3 x double> undef, <6 x i32> -; CHECK-NEXT: [[TMP134:%.*]] = shufflevector <6 x double> [[TMP132]], <6 x double> [[TMP133]], <9 x i32> -; CHECK-NEXT: ret <9 x double> [[TMP134]] +; CHECK-NEXT: [[TMP111:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK87]], <1 x double> [[SPLAT_SPLAT89]], <1 x double> [[TMP109]]) +; CHECK-NEXT: [[TMP112:%.*]] = shufflevector <1 x double> [[TMP111]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP113:%.*]] = shufflevector <3 x double> [[TMP105]], <3 x double> [[TMP112]], <3 x i32> +; CHECK-NEXT: [[TMP114:%.*]] = shufflevector <3 x double> [[TMP65]], <3 x double> [[TMP89]], <6 x i32> +; CHECK-NEXT: [[TMP115:%.*]] = shufflevector <3 x double> [[TMP113]], <3 x double> undef, <6 x i32> +; CHECK-NEXT: [[TMP116:%.*]] = shufflevector <6 x double> [[TMP114]], <6 x double> [[TMP115]], <9 x i32> +; CHECK-NEXT: ret <9 x double> [[TMP116]] ; entry: br i1 %cond, label %if.then, label %if.else @@ -302,172 +284,154 @@ ; CHECK-NEXT: [[TMP24:%.*]] = extractelement <3 x double> [[SPLIT6]], i64 1 ; CHECK-NEXT: [[SPLAT_SPLATINSERT10:%.*]] = insertelement <1 x double> undef, double [[TMP24]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT11:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT10]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP25:%.*]] = fmul <1 x double> [[BLOCK9]], [[SPLAT_SPLAT11]] -; CHECK-NEXT: [[TMP26:%.*]] = fadd <1 x double> [[TMP23]], [[TMP25]] +; CHECK-NEXT: [[TMP25:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK9]], <1 x double> [[SPLAT_SPLAT11]], <1 x double> [[TMP23]]) ; CHECK-NEXT: [[BLOCK12:%.*]] = shufflevector <3 x double> [[SPLIT5]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP27:%.*]] = extractelement <3 x double> [[SPLIT6]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT13:%.*]] = insertelement <1 x double> undef, double [[TMP27]], i32 0 +; CHECK-NEXT: [[TMP26:%.*]] = extractelement <3 x double> [[SPLIT6]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT13:%.*]] = insertelement <1 x double> undef, double [[TMP26]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT14:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT13]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP28:%.*]] = fmul <1 x double> [[BLOCK12]], [[SPLAT_SPLAT14]] -; CHECK-NEXT: [[TMP29:%.*]] = fadd <1 x double> [[TMP26]], [[TMP28]] -; CHECK-NEXT: [[TMP30:%.*]] = shufflevector <1 x double> [[TMP29]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP31:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP30]], <3 x i32> +; CHECK-NEXT: [[TMP27:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK12]], <1 x double> [[SPLAT_SPLAT14]], <1 x double> [[TMP25]]) +; CHECK-NEXT: [[TMP28:%.*]] = shufflevector <1 x double> [[TMP27]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP29:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP28]], <3 x i32> ; CHECK-NEXT: [[BLOCK15:%.*]] = shufflevector <3 x double> [[SPLIT3]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP32:%.*]] = extractelement <3 x double> [[SPLIT6]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT16:%.*]] = insertelement <1 x double> undef, double [[TMP32]], i32 0 +; CHECK-NEXT: [[TMP30:%.*]] = extractelement <3 x double> [[SPLIT6]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT16:%.*]] = insertelement <1 x double> undef, double [[TMP30]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT17:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT16]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP33:%.*]] = fmul <1 x double> [[BLOCK15]], [[SPLAT_SPLAT17]] +; CHECK-NEXT: [[TMP31:%.*]] = fmul <1 x double> [[BLOCK15]], [[SPLAT_SPLAT17]] ; CHECK-NEXT: [[BLOCK18:%.*]] = shufflevector <3 x double> [[SPLIT4]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP34:%.*]] = extractelement <3 x double> [[SPLIT6]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT19:%.*]] = insertelement <1 x double> undef, double [[TMP34]], i32 0 +; CHECK-NEXT: [[TMP32:%.*]] = extractelement <3 x double> [[SPLIT6]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT19:%.*]] = insertelement <1 x double> undef, double [[TMP32]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT20:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT19]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP35:%.*]] = fmul <1 x double> [[BLOCK18]], [[SPLAT_SPLAT20]] -; CHECK-NEXT: [[TMP36:%.*]] = fadd <1 x double> [[TMP33]], [[TMP35]] +; CHECK-NEXT: [[TMP33:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK18]], <1 x double> [[SPLAT_SPLAT20]], <1 x double> [[TMP31]]) ; CHECK-NEXT: [[BLOCK21:%.*]] = shufflevector <3 x double> [[SPLIT5]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP37:%.*]] = extractelement <3 x double> [[SPLIT6]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT22:%.*]] = insertelement <1 x double> undef, double [[TMP37]], i32 0 +; CHECK-NEXT: [[TMP34:%.*]] = extractelement <3 x double> [[SPLIT6]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT22:%.*]] = insertelement <1 x double> undef, double [[TMP34]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT23:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT22]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP38:%.*]] = fmul <1 x double> [[BLOCK21]], [[SPLAT_SPLAT23]] -; CHECK-NEXT: [[TMP39:%.*]] = fadd <1 x double> [[TMP36]], [[TMP38]] -; CHECK-NEXT: [[TMP40:%.*]] = shufflevector <1 x double> [[TMP39]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP41:%.*]] = shufflevector <3 x double> [[TMP31]], <3 x double> [[TMP40]], <3 x i32> +; CHECK-NEXT: [[TMP35:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK21]], <1 x double> [[SPLAT_SPLAT23]], <1 x double> [[TMP33]]) +; CHECK-NEXT: [[TMP36:%.*]] = shufflevector <1 x double> [[TMP35]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP37:%.*]] = shufflevector <3 x double> [[TMP29]], <3 x double> [[TMP36]], <3 x i32> ; CHECK-NEXT: [[BLOCK24:%.*]] = shufflevector <3 x double> [[SPLIT3]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP42:%.*]] = extractelement <3 x double> [[SPLIT6]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT25:%.*]] = insertelement <1 x double> undef, double [[TMP42]], i32 0 +; CHECK-NEXT: [[TMP38:%.*]] = extractelement <3 x double> [[SPLIT6]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT25:%.*]] = insertelement <1 x double> undef, double [[TMP38]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT26:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT25]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP43:%.*]] = fmul <1 x double> [[BLOCK24]], [[SPLAT_SPLAT26]] +; CHECK-NEXT: [[TMP39:%.*]] = fmul <1 x double> [[BLOCK24]], [[SPLAT_SPLAT26]] ; CHECK-NEXT: [[BLOCK27:%.*]] = shufflevector <3 x double> [[SPLIT4]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP44:%.*]] = extractelement <3 x double> [[SPLIT6]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT28:%.*]] = insertelement <1 x double> undef, double [[TMP44]], i32 0 +; CHECK-NEXT: [[TMP40:%.*]] = extractelement <3 x double> [[SPLIT6]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT28:%.*]] = insertelement <1 x double> undef, double [[TMP40]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT29:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT28]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP45:%.*]] = fmul <1 x double> [[BLOCK27]], [[SPLAT_SPLAT29]] -; CHECK-NEXT: [[TMP46:%.*]] = fadd <1 x double> [[TMP43]], [[TMP45]] +; CHECK-NEXT: [[TMP41:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK27]], <1 x double> [[SPLAT_SPLAT29]], <1 x double> [[TMP39]]) ; CHECK-NEXT: [[BLOCK30:%.*]] = shufflevector <3 x double> [[SPLIT5]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP47:%.*]] = extractelement <3 x double> [[SPLIT6]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT31:%.*]] = insertelement <1 x double> undef, double [[TMP47]], i32 0 +; CHECK-NEXT: [[TMP42:%.*]] = extractelement <3 x double> [[SPLIT6]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT31:%.*]] = insertelement <1 x double> undef, double [[TMP42]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT32:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT31]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP48:%.*]] = fmul <1 x double> [[BLOCK30]], [[SPLAT_SPLAT32]] -; CHECK-NEXT: [[TMP49:%.*]] = fadd <1 x double> [[TMP46]], [[TMP48]] -; CHECK-NEXT: [[TMP50:%.*]] = shufflevector <1 x double> [[TMP49]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP51:%.*]] = shufflevector <3 x double> [[TMP41]], <3 x double> [[TMP50]], <3 x i32> +; CHECK-NEXT: [[TMP43:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK30]], <1 x double> [[SPLAT_SPLAT32]], <1 x double> [[TMP41]]) +; CHECK-NEXT: [[TMP44:%.*]] = shufflevector <1 x double> [[TMP43]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP45:%.*]] = shufflevector <3 x double> [[TMP37]], <3 x double> [[TMP44]], <3 x i32> ; CHECK-NEXT: [[BLOCK33:%.*]] = shufflevector <3 x double> [[SPLIT3]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP52:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT34:%.*]] = insertelement <1 x double> undef, double [[TMP52]], i32 0 +; CHECK-NEXT: [[TMP46:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT34:%.*]] = insertelement <1 x double> undef, double [[TMP46]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT35:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT34]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP53:%.*]] = fmul <1 x double> [[BLOCK33]], [[SPLAT_SPLAT35]] +; CHECK-NEXT: [[TMP47:%.*]] = fmul <1 x double> [[BLOCK33]], [[SPLAT_SPLAT35]] ; CHECK-NEXT: [[BLOCK36:%.*]] = shufflevector <3 x double> [[SPLIT4]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP54:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT37:%.*]] = insertelement <1 x double> undef, double [[TMP54]], i32 0 +; CHECK-NEXT: [[TMP48:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT37:%.*]] = insertelement <1 x double> undef, double [[TMP48]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT38:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT37]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP55:%.*]] = fmul <1 x double> [[BLOCK36]], [[SPLAT_SPLAT38]] -; CHECK-NEXT: [[TMP56:%.*]] = fadd <1 x double> [[TMP53]], [[TMP55]] +; CHECK-NEXT: [[TMP49:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK36]], <1 x double> [[SPLAT_SPLAT38]], <1 x double> [[TMP47]]) ; CHECK-NEXT: [[BLOCK39:%.*]] = shufflevector <3 x double> [[SPLIT5]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP57:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT40:%.*]] = insertelement <1 x double> undef, double [[TMP57]], i32 0 +; CHECK-NEXT: [[TMP50:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT40:%.*]] = insertelement <1 x double> undef, double [[TMP50]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT41:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT40]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP58:%.*]] = fmul <1 x double> [[BLOCK39]], [[SPLAT_SPLAT41]] -; CHECK-NEXT: [[TMP59:%.*]] = fadd <1 x double> [[TMP56]], [[TMP58]] -; CHECK-NEXT: [[TMP60:%.*]] = shufflevector <1 x double> [[TMP59]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP61:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP60]], <3 x i32> +; CHECK-NEXT: [[TMP51:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK39]], <1 x double> [[SPLAT_SPLAT41]], <1 x double> [[TMP49]]) +; CHECK-NEXT: [[TMP52:%.*]] = shufflevector <1 x double> [[TMP51]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP53:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP52]], <3 x i32> ; CHECK-NEXT: [[BLOCK42:%.*]] = shufflevector <3 x double> [[SPLIT3]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP62:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT43:%.*]] = insertelement <1 x double> undef, double [[TMP62]], i32 0 +; CHECK-NEXT: [[TMP54:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT43:%.*]] = insertelement <1 x double> undef, double [[TMP54]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT44:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT43]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP63:%.*]] = fmul <1 x double> [[BLOCK42]], [[SPLAT_SPLAT44]] +; CHECK-NEXT: [[TMP55:%.*]] = fmul <1 x double> [[BLOCK42]], [[SPLAT_SPLAT44]] ; CHECK-NEXT: [[BLOCK45:%.*]] = shufflevector <3 x double> [[SPLIT4]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP64:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT46:%.*]] = insertelement <1 x double> undef, double [[TMP64]], i32 0 +; CHECK-NEXT: [[TMP56:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT46:%.*]] = insertelement <1 x double> undef, double [[TMP56]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT47:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT46]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP65:%.*]] = fmul <1 x double> [[BLOCK45]], [[SPLAT_SPLAT47]] -; CHECK-NEXT: [[TMP66:%.*]] = fadd <1 x double> [[TMP63]], [[TMP65]] +; CHECK-NEXT: [[TMP57:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK45]], <1 x double> [[SPLAT_SPLAT47]], <1 x double> [[TMP55]]) ; CHECK-NEXT: [[BLOCK48:%.*]] = shufflevector <3 x double> [[SPLIT5]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP67:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT49:%.*]] = insertelement <1 x double> undef, double [[TMP67]], i32 0 +; CHECK-NEXT: [[TMP58:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT49:%.*]] = insertelement <1 x double> undef, double [[TMP58]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT50:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT49]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP68:%.*]] = fmul <1 x double> [[BLOCK48]], [[SPLAT_SPLAT50]] -; CHECK-NEXT: [[TMP69:%.*]] = fadd <1 x double> [[TMP66]], [[TMP68]] -; CHECK-NEXT: [[TMP70:%.*]] = shufflevector <1 x double> [[TMP69]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP71:%.*]] = shufflevector <3 x double> [[TMP61]], <3 x double> [[TMP70]], <3 x i32> +; CHECK-NEXT: [[TMP59:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK48]], <1 x double> [[SPLAT_SPLAT50]], <1 x double> [[TMP57]]) +; CHECK-NEXT: [[TMP60:%.*]] = shufflevector <1 x double> [[TMP59]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP61:%.*]] = shufflevector <3 x double> [[TMP53]], <3 x double> [[TMP60]], <3 x i32> ; CHECK-NEXT: [[BLOCK51:%.*]] = shufflevector <3 x double> [[SPLIT3]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP72:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT52:%.*]] = insertelement <1 x double> undef, double [[TMP72]], i32 0 +; CHECK-NEXT: [[TMP62:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT52:%.*]] = insertelement <1 x double> undef, double [[TMP62]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT53:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT52]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP73:%.*]] = fmul <1 x double> [[BLOCK51]], [[SPLAT_SPLAT53]] +; CHECK-NEXT: [[TMP63:%.*]] = fmul <1 x double> [[BLOCK51]], [[SPLAT_SPLAT53]] ; CHECK-NEXT: [[BLOCK54:%.*]] = shufflevector <3 x double> [[SPLIT4]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP74:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT55:%.*]] = insertelement <1 x double> undef, double [[TMP74]], i32 0 +; CHECK-NEXT: [[TMP64:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT55:%.*]] = insertelement <1 x double> undef, double [[TMP64]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT56:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT55]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP75:%.*]] = fmul <1 x double> [[BLOCK54]], [[SPLAT_SPLAT56]] -; CHECK-NEXT: [[TMP76:%.*]] = fadd <1 x double> [[TMP73]], [[TMP75]] +; CHECK-NEXT: [[TMP65:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK54]], <1 x double> [[SPLAT_SPLAT56]], <1 x double> [[TMP63]]) ; CHECK-NEXT: [[BLOCK57:%.*]] = shufflevector <3 x double> [[SPLIT5]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP77:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT58:%.*]] = insertelement <1 x double> undef, double [[TMP77]], i32 0 +; CHECK-NEXT: [[TMP66:%.*]] = extractelement <3 x double> [[SPLIT7]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT58:%.*]] = insertelement <1 x double> undef, double [[TMP66]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT59:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT58]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP78:%.*]] = fmul <1 x double> [[BLOCK57]], [[SPLAT_SPLAT59]] -; CHECK-NEXT: [[TMP79:%.*]] = fadd <1 x double> [[TMP76]], [[TMP78]] -; CHECK-NEXT: [[TMP80:%.*]] = shufflevector <1 x double> [[TMP79]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP81:%.*]] = shufflevector <3 x double> [[TMP71]], <3 x double> [[TMP80]], <3 x i32> +; CHECK-NEXT: [[TMP67:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK57]], <1 x double> [[SPLAT_SPLAT59]], <1 x double> [[TMP65]]) +; CHECK-NEXT: [[TMP68:%.*]] = shufflevector <1 x double> [[TMP67]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP69:%.*]] = shufflevector <3 x double> [[TMP61]], <3 x double> [[TMP68]], <3 x i32> ; CHECK-NEXT: [[BLOCK60:%.*]] = shufflevector <3 x double> [[SPLIT3]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP82:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT61:%.*]] = insertelement <1 x double> undef, double [[TMP82]], i32 0 +; CHECK-NEXT: [[TMP70:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT61:%.*]] = insertelement <1 x double> undef, double [[TMP70]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT62:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT61]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP83:%.*]] = fmul <1 x double> [[BLOCK60]], [[SPLAT_SPLAT62]] +; CHECK-NEXT: [[TMP71:%.*]] = fmul <1 x double> [[BLOCK60]], [[SPLAT_SPLAT62]] ; CHECK-NEXT: [[BLOCK63:%.*]] = shufflevector <3 x double> [[SPLIT4]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP84:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT64:%.*]] = insertelement <1 x double> undef, double [[TMP84]], i32 0 +; CHECK-NEXT: [[TMP72:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT64:%.*]] = insertelement <1 x double> undef, double [[TMP72]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT65:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT64]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP85:%.*]] = fmul <1 x double> [[BLOCK63]], [[SPLAT_SPLAT65]] -; CHECK-NEXT: [[TMP86:%.*]] = fadd <1 x double> [[TMP83]], [[TMP85]] +; CHECK-NEXT: [[TMP73:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK63]], <1 x double> [[SPLAT_SPLAT65]], <1 x double> [[TMP71]]) ; CHECK-NEXT: [[BLOCK66:%.*]] = shufflevector <3 x double> [[SPLIT5]], <3 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP87:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT67:%.*]] = insertelement <1 x double> undef, double [[TMP87]], i32 0 +; CHECK-NEXT: [[TMP74:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT67:%.*]] = insertelement <1 x double> undef, double [[TMP74]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT68:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT67]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP88:%.*]] = fmul <1 x double> [[BLOCK66]], [[SPLAT_SPLAT68]] -; CHECK-NEXT: [[TMP89:%.*]] = fadd <1 x double> [[TMP86]], [[TMP88]] -; CHECK-NEXT: [[TMP90:%.*]] = shufflevector <1 x double> [[TMP89]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP91:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP90]], <3 x i32> +; CHECK-NEXT: [[TMP75:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK66]], <1 x double> [[SPLAT_SPLAT68]], <1 x double> [[TMP73]]) +; CHECK-NEXT: [[TMP76:%.*]] = shufflevector <1 x double> [[TMP75]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP77:%.*]] = shufflevector <3 x double> undef, <3 x double> [[TMP76]], <3 x i32> ; CHECK-NEXT: [[BLOCK69:%.*]] = shufflevector <3 x double> [[SPLIT3]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP92:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT70:%.*]] = insertelement <1 x double> undef, double [[TMP92]], i32 0 +; CHECK-NEXT: [[TMP78:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT70:%.*]] = insertelement <1 x double> undef, double [[TMP78]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT71:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT70]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP93:%.*]] = fmul <1 x double> [[BLOCK69]], [[SPLAT_SPLAT71]] +; CHECK-NEXT: [[TMP79:%.*]] = fmul <1 x double> [[BLOCK69]], [[SPLAT_SPLAT71]] ; CHECK-NEXT: [[BLOCK72:%.*]] = shufflevector <3 x double> [[SPLIT4]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP94:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT73:%.*]] = insertelement <1 x double> undef, double [[TMP94]], i32 0 +; CHECK-NEXT: [[TMP80:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT73:%.*]] = insertelement <1 x double> undef, double [[TMP80]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT74:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT73]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP95:%.*]] = fmul <1 x double> [[BLOCK72]], [[SPLAT_SPLAT74]] -; CHECK-NEXT: [[TMP96:%.*]] = fadd <1 x double> [[TMP93]], [[TMP95]] +; CHECK-NEXT: [[TMP81:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK72]], <1 x double> [[SPLAT_SPLAT74]], <1 x double> [[TMP79]]) ; CHECK-NEXT: [[BLOCK75:%.*]] = shufflevector <3 x double> [[SPLIT5]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP97:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT76:%.*]] = insertelement <1 x double> undef, double [[TMP97]], i32 0 +; CHECK-NEXT: [[TMP82:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT76:%.*]] = insertelement <1 x double> undef, double [[TMP82]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT77:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT76]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP98:%.*]] = fmul <1 x double> [[BLOCK75]], [[SPLAT_SPLAT77]] -; CHECK-NEXT: [[TMP99:%.*]] = fadd <1 x double> [[TMP96]], [[TMP98]] -; CHECK-NEXT: [[TMP100:%.*]] = shufflevector <1 x double> [[TMP99]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP101:%.*]] = shufflevector <3 x double> [[TMP91]], <3 x double> [[TMP100]], <3 x i32> +; CHECK-NEXT: [[TMP83:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK75]], <1 x double> [[SPLAT_SPLAT77]], <1 x double> [[TMP81]]) +; CHECK-NEXT: [[TMP84:%.*]] = shufflevector <1 x double> [[TMP83]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP85:%.*]] = shufflevector <3 x double> [[TMP77]], <3 x double> [[TMP84]], <3 x i32> ; CHECK-NEXT: [[BLOCK78:%.*]] = shufflevector <3 x double> [[SPLIT3]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP102:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 0 -; CHECK-NEXT: [[SPLAT_SPLATINSERT79:%.*]] = insertelement <1 x double> undef, double [[TMP102]], i32 0 +; CHECK-NEXT: [[TMP86:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 0 +; CHECK-NEXT: [[SPLAT_SPLATINSERT79:%.*]] = insertelement <1 x double> undef, double [[TMP86]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT80:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT79]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP103:%.*]] = fmul <1 x double> [[BLOCK78]], [[SPLAT_SPLAT80]] +; CHECK-NEXT: [[TMP87:%.*]] = fmul <1 x double> [[BLOCK78]], [[SPLAT_SPLAT80]] ; CHECK-NEXT: [[BLOCK81:%.*]] = shufflevector <3 x double> [[SPLIT4]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP104:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 1 -; CHECK-NEXT: [[SPLAT_SPLATINSERT82:%.*]] = insertelement <1 x double> undef, double [[TMP104]], i32 0 +; CHECK-NEXT: [[TMP88:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 1 +; CHECK-NEXT: [[SPLAT_SPLATINSERT82:%.*]] = insertelement <1 x double> undef, double [[TMP88]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT83:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT82]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP105:%.*]] = fmul <1 x double> [[BLOCK81]], [[SPLAT_SPLAT83]] -; CHECK-NEXT: [[TMP106:%.*]] = fadd <1 x double> [[TMP103]], [[TMP105]] +; CHECK-NEXT: [[TMP89:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK81]], <1 x double> [[SPLAT_SPLAT83]], <1 x double> [[TMP87]]) ; CHECK-NEXT: [[BLOCK84:%.*]] = shufflevector <3 x double> [[SPLIT5]], <3 x double> undef, <1 x i32> -; CHECK-NEXT: [[TMP107:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 2 -; CHECK-NEXT: [[SPLAT_SPLATINSERT85:%.*]] = insertelement <1 x double> undef, double [[TMP107]], i32 0 +; CHECK-NEXT: [[TMP90:%.*]] = extractelement <3 x double> [[SPLIT8]], i64 2 +; CHECK-NEXT: [[SPLAT_SPLATINSERT85:%.*]] = insertelement <1 x double> undef, double [[TMP90]], i32 0 ; CHECK-NEXT: [[SPLAT_SPLAT86:%.*]] = shufflevector <1 x double> [[SPLAT_SPLATINSERT85]], <1 x double> undef, <1 x i32> zeroinitializer -; CHECK-NEXT: [[TMP108:%.*]] = fmul <1 x double> [[BLOCK84]], [[SPLAT_SPLAT86]] -; CHECK-NEXT: [[TMP109:%.*]] = fadd <1 x double> [[TMP106]], [[TMP108]] -; CHECK-NEXT: [[TMP110:%.*]] = shufflevector <1 x double> [[TMP109]], <1 x double> undef, <3 x i32> -; CHECK-NEXT: [[TMP111:%.*]] = shufflevector <3 x double> [[TMP101]], <3 x double> [[TMP110]], <3 x i32> -; CHECK-NEXT: [[TMP112:%.*]] = shufflevector <3 x double> [[TMP51]], <3 x double> [[TMP81]], <6 x i32> -; CHECK-NEXT: [[TMP113:%.*]] = shufflevector <3 x double> [[TMP111]], <3 x double> undef, <6 x i32> -; CHECK-NEXT: [[TMP114:%.*]] = shufflevector <6 x double> [[TMP112]], <6 x double> [[TMP113]], <9 x i32> -; CHECK-NEXT: ret <9 x double> [[TMP114]] +; CHECK-NEXT: [[TMP91:%.*]] = call <1 x double> @llvm.fmuladd.v1f64(<1 x double> [[BLOCK84]], <1 x double> [[SPLAT_SPLAT86]], <1 x double> [[TMP89]]) +; CHECK-NEXT: [[TMP92:%.*]] = shufflevector <1 x double> [[TMP91]], <1 x double> undef, <3 x i32> +; CHECK-NEXT: [[TMP93:%.*]] = shufflevector <3 x double> [[TMP85]], <3 x double> [[TMP92]], <3 x i32> +; CHECK-NEXT: [[TMP94:%.*]] = shufflevector <3 x double> [[TMP45]], <3 x double> [[TMP69]], <6 x i32> +; CHECK-NEXT: [[TMP95:%.*]] = shufflevector <3 x double> [[TMP93]], <3 x double> undef, <6 x i32> +; CHECK-NEXT: [[TMP96:%.*]] = shufflevector <6 x double> [[TMP94]], <6 x double> [[TMP95]], <9 x i32> +; CHECK-NEXT: ret <9 x double> [[TMP96]] ; %A.trans = tail call <9 x double> @llvm.matrix.transpose.v9f64(<9 x double> %A, i32 3, i32 3) %A.foo = call <9 x double> @foo(<9 x double> %A.trans) diff --git a/llvm/test/Transforms/LowerMatrixIntrinsics/propagate-multiple-iterations.ll b/llvm/test/Transforms/LowerMatrixIntrinsics/propagate-multiple-iterations.ll --- a/llvm/test/Transforms/LowerMatrixIntrinsics/propagate-multiple-iterations.ll +++ b/llvm/test/Transforms/LowerMatrixIntrinsics/propagate-multiple-iterations.ll @@ -11,67 +11,67 @@ ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x double>* [[A_PTR:%.*]] to double* ; CHECK-NEXT: [[TMP2:%.*]] = bitcast double* [[TMP1]] to <4 x double>* ; CHECK-NEXT: [[TMP3:%.*]] = load <4 x double>, <4 x double>* [[TMP2]], align 8 -; CHECK-NEXT: [[TMP5:%.*]] = getelementptr double, double* [[TMP1]], i32 4 -; CHECK-NEXT: [[TMP6:%.*]] = bitcast double* [[TMP5]] to <4 x double>* -; CHECK-NEXT: [[TMP7:%.*]] = load <4 x double>, <4 x double>* [[TMP6]], align 8 -; CHECK-NEXT: [[TMP9:%.*]] = getelementptr double, double* [[TMP1]], i32 8 -; CHECK-NEXT: [[TMP10:%.*]] = bitcast double* [[TMP9]] to <4 x double>* -; CHECK-NEXT: [[TMP11:%.*]] = load <4 x double>, <4 x double>* [[TMP10]], align 8 -; CHECK-NEXT: [[TMP13:%.*]] = getelementptr double, double* [[TMP1]], i32 12 -; CHECK-NEXT: [[TMP14:%.*]] = bitcast double* [[TMP13]] to <4 x double>* -; CHECK-NEXT: [[TMP15:%.*]] = load <4 x double>, <4 x double>* [[TMP14]], align 8 -; CHECK-NEXT: [[TMP16:%.*]] = extractelement <4 x double> [[TMP3]], i64 0 -; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x double> undef, double [[TMP16]], i64 0 -; CHECK-NEXT: [[TMP18:%.*]] = extractelement <4 x double> [[TMP7]], i64 0 -; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x double> [[TMP17]], double [[TMP18]], i64 1 -; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x double> [[TMP11]], i64 0 -; CHECK-NEXT: [[TMP21:%.*]] = insertelement <4 x double> [[TMP19]], double [[TMP20]], i64 2 -; CHECK-NEXT: [[TMP22:%.*]] = extractelement <4 x double> [[TMP15]], i64 0 -; CHECK-NEXT: [[TMP23:%.*]] = insertelement <4 x double> [[TMP21]], double [[TMP22]], i64 3 -; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x double> [[TMP3]], i64 1 -; CHECK-NEXT: [[TMP25:%.*]] = insertelement <4 x double> undef, double [[TMP24]], i64 0 -; CHECK-NEXT: [[TMP26:%.*]] = extractelement <4 x double> [[TMP7]], i64 1 -; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x double> [[TMP25]], double [[TMP26]], i64 1 -; CHECK-NEXT: [[TMP28:%.*]] = extractelement <4 x double> [[TMP11]], i64 1 -; CHECK-NEXT: [[TMP29:%.*]] = insertelement <4 x double> [[TMP27]], double [[TMP28]], i64 2 -; CHECK-NEXT: [[TMP30:%.*]] = extractelement <4 x double> [[TMP15]], i64 1 -; CHECK-NEXT: [[TMP31:%.*]] = insertelement <4 x double> [[TMP29]], double [[TMP30]], i64 3 -; CHECK-NEXT: [[TMP32:%.*]] = extractelement <4 x double> [[TMP3]], i64 2 -; CHECK-NEXT: [[TMP33:%.*]] = insertelement <4 x double> undef, double [[TMP32]], i64 0 -; CHECK-NEXT: [[TMP34:%.*]] = extractelement <4 x double> [[TMP7]], i64 2 -; CHECK-NEXT: [[TMP35:%.*]] = insertelement <4 x double> [[TMP33]], double [[TMP34]], i64 1 -; CHECK-NEXT: [[TMP36:%.*]] = extractelement <4 x double> [[TMP11]], i64 2 -; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x double> [[TMP35]], double [[TMP36]], i64 2 -; CHECK-NEXT: [[TMP38:%.*]] = extractelement <4 x double> [[TMP15]], i64 2 -; CHECK-NEXT: [[TMP39:%.*]] = insertelement <4 x double> [[TMP37]], double [[TMP38]], i64 3 -; CHECK-NEXT: [[TMP40:%.*]] = extractelement <4 x double> [[TMP3]], i64 3 -; CHECK-NEXT: [[TMP41:%.*]] = insertelement <4 x double> undef, double [[TMP40]], i64 0 -; CHECK-NEXT: [[TMP42:%.*]] = extractelement <4 x double> [[TMP7]], i64 3 -; CHECK-NEXT: [[TMP43:%.*]] = insertelement <4 x double> [[TMP41]], double [[TMP42]], i64 1 -; CHECK-NEXT: [[TMP44:%.*]] = extractelement <4 x double> [[TMP11]], i64 3 -; CHECK-NEXT: [[TMP45:%.*]] = insertelement <4 x double> [[TMP43]], double [[TMP44]], i64 2 -; CHECK-NEXT: [[TMP46:%.*]] = extractelement <4 x double> [[TMP15]], i64 3 -; CHECK-NEXT: [[TMP47:%.*]] = insertelement <4 x double> [[TMP45]], double [[TMP46]], i64 3 -; CHECK-NEXT: [[TMP48:%.*]] = bitcast <16 x double>* [[B_PTR:%.*]] to double* +; CHECK-NEXT: [[TMP4:%.*]] = getelementptr double, double* [[TMP1]], i32 4 +; CHECK-NEXT: [[TMP5:%.*]] = bitcast double* [[TMP4]] to <4 x double>* +; CHECK-NEXT: [[TMP6:%.*]] = load <4 x double>, <4 x double>* [[TMP5]], align 8 +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr double, double* [[TMP1]], i32 8 +; CHECK-NEXT: [[TMP8:%.*]] = bitcast double* [[TMP7]] to <4 x double>* +; CHECK-NEXT: [[TMP9:%.*]] = load <4 x double>, <4 x double>* [[TMP8]], align 8 +; CHECK-NEXT: [[TMP10:%.*]] = getelementptr double, double* [[TMP1]], i32 12 +; CHECK-NEXT: [[TMP11:%.*]] = bitcast double* [[TMP10]] to <4 x double>* +; CHECK-NEXT: [[TMP12:%.*]] = load <4 x double>, <4 x double>* [[TMP11]], align 8 +; CHECK-NEXT: [[TMP13:%.*]] = extractelement <4 x double> [[TMP3]], i64 0 +; CHECK-NEXT: [[TMP14:%.*]] = insertelement <4 x double> undef, double [[TMP13]], i64 0 +; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x double> [[TMP6]], i64 0 +; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x double> [[TMP14]], double [[TMP15]], i64 1 +; CHECK-NEXT: [[TMP17:%.*]] = extractelement <4 x double> [[TMP9]], i64 0 +; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x double> [[TMP16]], double [[TMP17]], i64 2 +; CHECK-NEXT: [[TMP19:%.*]] = extractelement <4 x double> [[TMP12]], i64 0 +; CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x double> [[TMP18]], double [[TMP19]], i64 3 +; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x double> [[TMP3]], i64 1 +; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x double> undef, double [[TMP21]], i64 0 +; CHECK-NEXT: [[TMP23:%.*]] = extractelement <4 x double> [[TMP6]], i64 1 +; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x double> [[TMP22]], double [[TMP23]], i64 1 +; CHECK-NEXT: [[TMP25:%.*]] = extractelement <4 x double> [[TMP9]], i64 1 +; CHECK-NEXT: [[TMP26:%.*]] = insertelement <4 x double> [[TMP24]], double [[TMP25]], i64 2 +; CHECK-NEXT: [[TMP27:%.*]] = extractelement <4 x double> [[TMP12]], i64 1 +; CHECK-NEXT: [[TMP28:%.*]] = insertelement <4 x double> [[TMP26]], double [[TMP27]], i64 3 +; CHECK-NEXT: [[TMP29:%.*]] = extractelement <4 x double> [[TMP3]], i64 2 +; CHECK-NEXT: [[TMP30:%.*]] = insertelement <4 x double> undef, double [[TMP29]], i64 0 +; CHECK-NEXT: [[TMP31:%.*]] = extractelement <4 x double> [[TMP6]], i64 2 +; CHECK-NEXT: [[TMP32:%.*]] = insertelement <4 x double> [[TMP30]], double [[TMP31]], i64 1 +; CHECK-NEXT: [[TMP33:%.*]] = extractelement <4 x double> [[TMP9]], i64 2 +; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x double> [[TMP32]], double [[TMP33]], i64 2 +; CHECK-NEXT: [[TMP35:%.*]] = extractelement <4 x double> [[TMP12]], i64 2 +; CHECK-NEXT: [[TMP36:%.*]] = insertelement <4 x double> [[TMP34]], double [[TMP35]], i64 3 +; CHECK-NEXT: [[TMP37:%.*]] = extractelement <4 x double> [[TMP3]], i64 3 +; CHECK-NEXT: [[TMP38:%.*]] = insertelement <4 x double> undef, double [[TMP37]], i64 0 +; CHECK-NEXT: [[TMP39:%.*]] = extractelement <4 x double> [[TMP6]], i64 3 +; CHECK-NEXT: [[TMP40:%.*]] = insertelement <4 x double> [[TMP38]], double [[TMP39]], i64 1 +; CHECK-NEXT: [[TMP41:%.*]] = extractelement <4 x double> [[TMP9]], i64 3 +; CHECK-NEXT: [[TMP42:%.*]] = insertelement <4 x double> [[TMP40]], double [[TMP41]], i64 2 +; CHECK-NEXT: [[TMP43:%.*]] = extractelement <4 x double> [[TMP12]], i64 3 +; CHECK-NEXT: [[TMP44:%.*]] = insertelement <4 x double> [[TMP42]], double [[TMP43]], i64 3 +; CHECK-NEXT: [[TMP45:%.*]] = bitcast <16 x double>* [[B_PTR:%.*]] to double* +; CHECK-NEXT: [[TMP46:%.*]] = bitcast double* [[TMP45]] to <4 x double>* +; CHECK-NEXT: [[TMP47:%.*]] = load <4 x double>, <4 x double>* [[TMP46]], align 8 +; CHECK-NEXT: [[TMP48:%.*]] = getelementptr double, double* [[TMP45]], i32 4 ; CHECK-NEXT: [[TMP49:%.*]] = bitcast double* [[TMP48]] to <4 x double>* ; CHECK-NEXT: [[TMP50:%.*]] = load <4 x double>, <4 x double>* [[TMP49]], align 8 -; CHECK-NEXT: [[TMP52:%.*]] = getelementptr double, double* [[TMP48]], i32 4 -; CHECK-NEXT: [[TMP53:%.*]] = bitcast double* [[TMP52]] to <4 x double>* -; CHECK-NEXT: [[TMP54:%.*]] = load <4 x double>, <4 x double>* [[TMP53]], align 8 -; CHECK-NEXT: [[TMP56:%.*]] = getelementptr double, double* [[TMP48]], i32 8 -; CHECK-NEXT: [[TMP57:%.*]] = bitcast double* [[TMP56]] to <4 x double>* -; CHECK-NEXT: [[TMP58:%.*]] = load <4 x double>, <4 x double>* [[TMP57]], align 8 -; CHECK-NEXT: [[TMP60:%.*]] = getelementptr double, double* [[TMP48]], i32 12 -; CHECK-NEXT: [[TMP61:%.*]] = bitcast double* [[TMP60]] to <4 x double>* -; CHECK-NEXT: [[TMP62:%.*]] = load <4 x double>, <4 x double>* [[TMP61]], align 8 -; CHECK-NEXT: [[TMP63:%.*]] = fmul <4 x double> [[TMP3]], [[TMP50]] -; CHECK-NEXT: [[TMP64:%.*]] = fmul <4 x double> [[TMP7]], [[TMP54]] -; CHECK-NEXT: [[TMP65:%.*]] = fmul <4 x double> [[TMP11]], [[TMP58]] -; CHECK-NEXT: [[TMP66:%.*]] = fmul <4 x double> [[TMP15]], [[TMP62]] -; CHECK-NEXT: [[TMP67:%.*]] = shufflevector <4 x double> [[TMP63]], <4 x double> [[TMP64]], <8 x i32> -; CHECK-NEXT: [[TMP68:%.*]] = shufflevector <4 x double> [[TMP65]], <4 x double> [[TMP66]], <8 x i32> -; CHECK-NEXT: [[TMP69:%.*]] = shufflevector <8 x double> [[TMP67]], <8 x double> [[TMP68]], <16 x i32> -; CHECK-NEXT: ret <16 x double> [[TMP69]] +; CHECK-NEXT: [[TMP51:%.*]] = getelementptr double, double* [[TMP45]], i32 8 +; CHECK-NEXT: [[TMP52:%.*]] = bitcast double* [[TMP51]] to <4 x double>* +; CHECK-NEXT: [[TMP53:%.*]] = load <4 x double>, <4 x double>* [[TMP52]], align 8 +; CHECK-NEXT: [[TMP54:%.*]] = getelementptr double, double* [[TMP45]], i32 12 +; CHECK-NEXT: [[TMP55:%.*]] = bitcast double* [[TMP54]] to <4 x double>* +; CHECK-NEXT: [[TMP56:%.*]] = load <4 x double>, <4 x double>* [[TMP55]], align 8 +; CHECK-NEXT: [[TMP57:%.*]] = fmul <4 x double> [[TMP3]], [[TMP47]] +; CHECK-NEXT: [[TMP58:%.*]] = fmul <4 x double> [[TMP6]], [[TMP50]] +; CHECK-NEXT: [[TMP59:%.*]] = fmul <4 x double> [[TMP9]], [[TMP53]] +; CHECK-NEXT: [[TMP60:%.*]] = fmul <4 x double> [[TMP12]], [[TMP56]] +; CHECK-NEXT: [[TMP61:%.*]] = shufflevector <4 x double> [[TMP57]], <4 x double> [[TMP58]], <8 x i32> +; CHECK-NEXT: [[TMP62:%.*]] = shufflevector <4 x double> [[TMP59]], <4 x double> [[TMP60]], <8 x i32> +; CHECK-NEXT: [[TMP63:%.*]] = shufflevector <8 x double> [[TMP61]], <8 x double> [[TMP62]], <16 x i32> +; CHECK-NEXT: ret <16 x double> [[TMP63]] ; %A = load <16 x double>, <16 x double>* %A.Ptr %A.trans = tail call <16 x double> @llvm.matrix.transpose.v16f64(<16 x double> %A, i32 4, i32 4)