diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -50,6 +50,16 @@
   RISCVABI::ABI ABI = Subtarget.getTargetABI();
   assert(ABI != RISCVABI::ABI_Unknown && "Improperly initialised target ABI");
 
+  if ((ABI == RISCVABI::ABI_ILP32F || ABI == RISCVABI::ABI_LP64F) &&
+      !Subtarget.hasStdExtF()) {
+    report_fatal_error("Hard-float 'f' ABI can't be used for a target that "
+                       "doesn't support the F instruction set extension");
+  } else if ((ABI == RISCVABI::ABI_ILP32D || ABI == RISCVABI::ABI_LP64D) &&
+             !Subtarget.hasStdExtD()) {
+    report_fatal_error("Hard-float 'd' ABI can't be used for a target that "
+                       "doesn't support the D instruction set extension");
+  }
+
   switch (ABI) {
   default:
     report_fatal_error("Don't know how to lower this ABI");
diff --git a/llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp b/llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp
--- a/llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp
+++ b/llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp
@@ -37,17 +37,8 @@
     errs() << "64-bit ABIs are not supported for 32-bit targets (ignoring "
               "target-abi)\n";
     TargetABI = ABI_Unknown;
-  } else if (ABIName.endswith("f") && !FeatureBits[RISCV::FeatureStdExtF]) {
-    errs() << "Hard-float 'f' ABI can't be used for a target that "
-              "doesn't support the F instruction set extension (ignoring "
-              "target-abi)\n";
-    TargetABI = ABI_Unknown;
-  } else if (ABIName.endswith("d") && !FeatureBits[RISCV::FeatureStdExtD]) {
-    errs() << "Hard-float 'd' ABI can't be used for a target that "
-              "doesn't support the D instruction set extension (ignoring "
-              "target-abi)\n";
-    TargetABI = ABI_Unknown;
   } else if (IsRV32E && TargetABI != ABI_ILP32E && TargetABI != ABI_Unknown) {
+    // TODO: move this checking to RISCVTargetLowering constructor
     errs()
         << "Only the ilp32e ABI is supported for RV32E (ignoring target-abi)\n";
     TargetABI = ABI_Unknown;
diff --git a/llvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll b/llvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll
--- a/llvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll
+++ b/llvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll
@@ -2,12 +2,17 @@
 ; RUN:   | FileCheck -check-prefix=RV32IF-ILP32 %s
 ; RUN: llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \
 ; RUN:   | FileCheck -check-prefix=RV32IF-ILP32F %s
+; RUN: not llc -mtriple=riscv32 -mattr=-f -target-abi ilp32f <%s 2>&1 \
+; RUN:   | FileCheck -check-prefix=RV32I-ILP32F-FAILED %s
+
+; RV32I-ILP32F-FAILED: Hard-float 'f' ABI can't be used for a target that doesn't support the F instruction set extension
 
-; RV32IF-ILP32F: Hard-float 'f' ABI can't be used for a target that doesn't support the F instruction set extension (ignoring target-abi)
 
 define float @foo(i32 %a) nounwind #0 {
-; RV32IF-ILP32: # %bb.0:
-; RV32IF-ILP32-NEXT: fcvt.s.w  ft0, a0
+; RV32IF-ILP32: fcvt.s.w  ft0, a0
+; RV32IF-ILP32-NEXT: fmv.x.w a0, ft0
+; RV32IF-ILP32F: fcvt.s.w fa0, a0
+; RV32IF-ILP32F-NEXT: ret
   %conv = sitofp i32 %a to float
   ret float %conv
 }
diff --git a/llvm/test/CodeGen/RISCV/target-abi-invalid.ll b/llvm/test/CodeGen/RISCV/target-abi-invalid.ll
--- a/llvm/test/CodeGen/RISCV/target-abi-invalid.ll
+++ b/llvm/test/CodeGen/RISCV/target-abi-invalid.ll
@@ -31,27 +31,27 @@
 ; RV32IF-LP64F: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
 ; RV32IFD-LP64D: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
 
-; RUN: llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \
+; RUN: not llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \
 ; RUN:   | FileCheck -check-prefix=RV32I-ILP32F %s
-; RUN: llc -mtriple=riscv64 -target-abi lp64f < %s 2>&1 \
+; RUN: not llc -mtriple=riscv64 -target-abi lp64f < %s 2>&1 \
 ; RUN:   | FileCheck -check-prefix=RV64I-LP64F %s
 
-; RV32I-ILP32F: Hard-float 'f' ABI can't be used for a target that doesn't support the F instruction set extension (ignoring target-abi)
-; RV64I-LP64F: Hard-float 'f' ABI can't be used for a target that doesn't support the F instruction set extension (ignoring target-abi)
+; RV32I-ILP32F: Hard-float 'f' ABI can't be used for a target that doesn't support the F instruction set extension
+; RV64I-LP64F: Hard-float 'f' ABI can't be used for a target that doesn't support the F instruction set extension
 
-; RUN: llc -mtriple=riscv32 -target-abi ilp32d < %s 2>&1 \
+; RUN: not llc -mtriple=riscv32 -target-abi ilp32d < %s 2>&1 \
 ; RUN:   | FileCheck -check-prefix=RV32I-ILP32D %s
-; RUN: llc -mtriple=riscv32 -mattr=+f -target-abi ilp32d < %s 2>&1 \
+; RUN: not llc -mtriple=riscv32 -mattr=+f -target-abi ilp32d < %s 2>&1 \
 ; RUN:   | FileCheck -check-prefix=RV32IF-ILP32D %s
-; RUN: llc -mtriple=riscv64 -target-abi lp64d < %s 2>&1 \
+; RUN: not llc -mtriple=riscv64 -target-abi lp64d < %s 2>&1 \
 ; RUN:   | FileCheck -check-prefix=RV64I-LP64D %s
-; RUN: llc -mtriple=riscv64 -mattr=+f -target-abi lp64d < %s 2>&1 \
+; RUN: not llc -mtriple=riscv64 -mattr=+f -target-abi lp64d < %s 2>&1 \
 ; RUN:   | FileCheck -check-prefix=RV64IF-LP64D %s
 
-; RV32I-ILP32D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
-; RV32IF-ILP32D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
-; RV64I-LP64D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
-; RV64IF-LP64D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
+; RV32I-ILP32D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension
+; RV32IF-ILP32D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension
+; RV64I-LP64D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension
+; RV64IF-LP64D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension
 
 define void @nothing() nounwind {
   ret void
diff --git a/llvm/test/MC/RISCV/target-abi-invalid.s b/llvm/test/MC/RISCV/target-abi-invalid.s
--- a/llvm/test/MC/RISCV/target-abi-invalid.s
+++ b/llvm/test/MC/RISCV/target-abi-invalid.s
@@ -40,28 +40,6 @@
 # RV32EF-LP64F: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
 # RV32EFD-LP64D: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
 
-# RUN: llvm-mc -triple=riscv32 -target-abi ilp32f < %s 2>&1 \
-# RUN:   | FileCheck -check-prefix=RV32I-ILP32F %s
-# RUN: llvm-mc -triple=riscv64 -target-abi lp64f < %s 2>&1 \
-# RUN:   | FileCheck -check-prefix=RV64I-LP64F %s
-
-# RV32I-ILP32F: Hard-float 'f' ABI can't be used for a target that doesn't support the F instruction set extension (ignoring target-abi)
-# RV64I-LP64F: Hard-float 'f' ABI can't be used for a target that doesn't support the F instruction set extension (ignoring target-abi)
-
-# RUN: llvm-mc -triple=riscv32 -target-abi ilp32d < %s 2>&1 \
-# RUN:   | FileCheck -check-prefix=RV32I-ILP32D %s
-# RUN: llvm-mc -triple=riscv32 -mattr=+f -target-abi ilp32d < %s 2>&1 \
-# RUN:   | FileCheck -check-prefix=RV32IF-ILP32D %s
-# RUN: llvm-mc -triple=riscv64 -target-abi lp64d < %s 2>&1 \
-# RUN:   | FileCheck -check-prefix=RV64I-LP64D %s
-# RUN: llvm-mc -triple=riscv64 -mattr=+f -target-abi lp64d < %s 2>&1 \
-# RUN:   | FileCheck -check-prefix=RV64IF-LP64D %s
-
-# RV32I-ILP32D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
-# RV32IF-ILP32D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
-# RV64I-LP64D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
-# RV64IF-LP64D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
-
 # RUN: llvm-mc -triple=riscv32 -mattr=+e -target-abi ilp32 < %s 2>&1 \
 # RUN:   | FileCheck -check-prefix=RV32EF-ILP32F %s
 # RUN: llvm-mc -triple=riscv32 -mattr=+e,+f -target-abi ilp32f < %s 2>&1 \