diff --git a/llvm/lib/Target/AArch64/AArch64InstrFormats.td b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
--- a/llvm/lib/Target/AArch64/AArch64InstrFormats.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
@@ -1473,7 +1473,7 @@
                   (!cast<Instruction>(NAME # "indexed") GPR64:$Rt, GPR64sp:$Rn, 0)>;
 
   def : InstAlias<asm # "\t$Rt, [$wback]!",
-                  (!cast<Instruction>(NAME # "writeback") GPR64sp:$wback, GPR64:$Rt, 0)>;
+                  (!cast<Instruction>(NAME # "writeback") GPR64sp:$wback, GPR64:$Rt, 0), 0>;
 }
 
 //---
diff --git a/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s b/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s
--- a/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s
+++ b/llvm/test/MC/AArch64/armv8.3a-signed-pointer.s
@@ -307,10 +307,10 @@
 // CHECK-REQ: error: instruction requires: pa
 // CHECK-REQ-NEXT:  ldrab x0, [x1]
   ldraa x0, [x1]!
-// CHECK-NEXT: ldraa x0, [x1]!  // encoding: [0x20,0x0c,0x20,0xf8]
+// CHECK-NEXT: ldraa x0, [x1, #0]!  // encoding: [0x20,0x0c,0x20,0xf8]
 // CHECK-REQ: error: instruction requires: pa
 // CHECK-REQ-NEXT:  ldraa x0, [x1]!
   ldrab x0, [x1]!
-// CHECK-NEXT: ldrab x0, [x1]!  // encoding: [0x20,0x0c,0xa0,0xf8]
+// CHECK-NEXT: ldrab x0, [x1, #0]!  // encoding: [0x20,0x0c,0xa0,0xf8]
 // CHECK-REQ: error: instruction requires: pa
 // CHECK-REQ-NEXT:  ldrab x0, [x1]!
diff --git a/llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt b/llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt
--- a/llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt
+++ b/llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt
@@ -114,7 +114,7 @@
 [0x20,0x04,0x20,0xf8]
 [0x20,0x04,0xa0,0xf8]
 
-# CHECK: ldraa x0, [x1]!
-# CHECK: ldrab x0, [x1]!
+# CHECK: ldraa x0, [x1, #0]!
+# CHECK: ldrab x0, [x1, #0]!
 [0x20,0x0c,0x20,0xf8]
 [0x20,0x0c,0xa0,0xf8]