Index: llvm/docs/LangRef.rst =================================================================== --- llvm/docs/LangRef.rst +++ llvm/docs/LangRef.rst @@ -4815,6 +4815,12 @@ signed offset of the specified register. The opcode is only generated by the ``AsmPrinter`` pass to describe call site parameter value which requires an expression over two registers. +- ``DW_OP_LLVM_argN`` represents argument number N of the containing LLVM + intrinsic. Where N can be any value from 0 to 7. For example in intrinsic + ``call @llvm.dbg.someintrinsic(DILocalVariable("x"), DILocalVariable("y"), + metadata !DIExpression(DW_OP_LLVM_arg0, DW_OP_LLVM_arg1, DW_OP_plus))`` + ``DW_OP_LLVM_arg0`` represents ``DILocalVariable("x")`` and + ``DW_OP_LLVM_arg1`` represents ``DILocalVariable("y")``. DWARF specifies three kinds of simple location descriptions: Register, memory, and implicit location descriptions. Note that a location description is Index: llvm/include/llvm/BinaryFormat/Dwarf.h =================================================================== --- llvm/include/llvm/BinaryFormat/Dwarf.h +++ llvm/include/llvm/BinaryFormat/Dwarf.h @@ -121,6 +121,14 @@ DW_OP_LLVM_convert = 0x1001, ///< Only used in LLVM metadata. DW_OP_LLVM_tag_offset = 0x1002, ///< Only used in LLVM metadata. DW_OP_LLVM_entry_value = 0x1003, ///< Only used in LLVM metadata. + DW_OP_LLVM_arg0 = 0x1004, ///< Only used in LLVM metadata. + DW_OP_LLVM_arg1 = 0x1005, ///< Only used in LLVM metadata. + DW_OP_LLVM_arg2 = 0x1006, ///< Only used in LLVM metadata. + DW_OP_LLVM_arg3 = 0x1007, ///< Only used in LLVM metadata. + DW_OP_LLVM_arg4 = 0x1008, ///< Only used in LLVM metadata. + DW_OP_LLVM_arg5 = 0x1009, ///< Only used in LLVM metadata. + DW_OP_LLVM_arg6 = 0x100a, ///< Only used in LLVM metadata. + DW_OP_LLVM_arg7 = 0x100b, ///< Only used in LLVM metadata. }; enum TypeKind : uint8_t { Index: llvm/lib/BinaryFormat/Dwarf.cpp =================================================================== --- llvm/lib/BinaryFormat/Dwarf.cpp +++ llvm/lib/BinaryFormat/Dwarf.cpp @@ -151,6 +151,22 @@ return "DW_OP_LLVM_tag_offset"; case DW_OP_LLVM_entry_value: return "DW_OP_LLVM_entry_value"; + case DW_OP_LLVM_arg0: + return "DW_OP_LLVM_arg0"; + case DW_OP_LLVM_arg1: + return "DW_OP_LLVM_arg1"; + case DW_OP_LLVM_arg2: + return "DW_OP_LLVM_arg2"; + case DW_OP_LLVM_arg3: + return "DW_OP_LLVM_arg3"; + case DW_OP_LLVM_arg4: + return "DW_OP_LLVM_arg4"; + case DW_OP_LLVM_arg5: + return "DW_OP_LLVM_arg5"; + case DW_OP_LLVM_arg6: + return "DW_OP_LLVM_arg6"; + case DW_OP_LLVM_arg7: + return "DW_OP_LLVM_arg7"; } } @@ -163,6 +179,14 @@ .Case("DW_OP_LLVM_fragment", DW_OP_LLVM_fragment) .Case("DW_OP_LLVM_tag_offset", DW_OP_LLVM_tag_offset) .Case("DW_OP_LLVM_entry_value", DW_OP_LLVM_entry_value) + .Case("DW_OP_LLVM_arg0", DW_OP_LLVM_arg0) + .Case("DW_OP_LLVM_arg1", DW_OP_LLVM_arg1) + .Case("DW_OP_LLVM_arg2", DW_OP_LLVM_arg2) + .Case("DW_OP_LLVM_arg3", DW_OP_LLVM_arg3) + .Case("DW_OP_LLVM_arg4", DW_OP_LLVM_arg4) + .Case("DW_OP_LLVM_arg5", DW_OP_LLVM_arg5) + .Case("DW_OP_LLVM_arg6", DW_OP_LLVM_arg6) + .Case("DW_OP_LLVM_arg7", DW_OP_LLVM_arg7) .Default(0); }