diff --git a/llvm/test/tools/llvm-dwarfdump/RISCV/lit.local.cfg b/llvm/test/tools/llvm-dwarfdump/RISCV/lit.local.cfg
new file mode 100644
--- /dev/null
+++ b/llvm/test/tools/llvm-dwarfdump/RISCV/lit.local.cfg
@@ -0,0 +1,2 @@
+if not 'RISCV' in config.root.targets:
+    config.unsupported = True
diff --git a/llvm/test/tools/llvm-dwarfdump/RISCV/riscv-relocs.yaml b/llvm/test/tools/llvm-dwarfdump/RISCV/riscv-relocs.yaml
new file mode 100644
--- /dev/null
+++ b/llvm/test/tools/llvm-dwarfdump/RISCV/riscv-relocs.yaml
@@ -0,0 +1,192 @@
+# Tests RISC-V relocations. We provide a .debug_info section with multiple
+# DW_AT_high_pc entries (that's one of the attributes for which relocations are
+# resolved by llvm-dwarfdump) and we add a relocation for each of them.
+#
+# RUN: yaml2obj %s | llvm-dwarfdump - | FileCheck %s
+
+# To add more tests you need to modify the Content of the .debug_abbrev and
+# .debug_info sections. To do that create a test.s which matches the assembly
+# code below, run the command that follows and copy over the "Content" value of
+# the respective sections:
+#
+# ```
+# $ cat test.s
+# .section .debug_abbrev,"",@progbits
+#  .byte 1                  # Abbreviation Code
+#  .byte 0x11               # DW_TAG_compile_unit
+#  .byte 0                  # DW_CHILDREN_no
+#
+#  # Add a DW_AT_high_pc for each relocation we test.
+#  .rept 14                 # (UPDATE HERE)
+#  .byte 0x12               # DW_AT_high_pc
+#  .byte 0x01               # DW_FORM_addr
+#  .endr
+#
+#  .byte 0                  # EOM(1)
+#  .byte 0                  # EOM(2)
+#  .byte 0                  # EOM(3)
+#
+# .section .debug_info,"",@progbits
+#  .4byte 2+4+1+1+8*14      # Length of Unit (UPDATE HERE)
+#  .2byte 4                 # DWARF version number
+#  .4byte .debug_abbrev     # Offset Into Abbrev. Section
+#  .byte 8                  # Address Size (in bytes)
+#  .byte 1                  # Abbrev 1
+#  .8byte 0x00000000000042  # Test 1
+#  .8byte 0x00000000000042  # Test 2
+#  .8byte 0x00000000000042  # Test 3
+#  .8byte 0x00000000000042  # Test 4
+#  .8byte 0x00000000000042  # Test 5
+#  .8byte 0x00000000000042  # Test 6
+#  .8byte 0x00000000000042  # Test 7
+#  .8byte 0x00000000000042  # Test 8
+#  .8byte 0x00000000004242  # Test 9
+#  .8byte 0x00000000004242  # Test 10
+#  .8byte 0x00000042424242  # Test 11
+#  .8byte 0x00000042424242  # Test 12
+#  .8byte 0x42424242424242  # Test 13
+#  .8byte 0x42424242424242  # Test 14
+# $ llvm-mc test.s -filetype obj -triple riscv64 -o - | obj2yaml
+# ```
+
+--- !ELF
+FileHeader:
+  Class:           ELFCLASS64
+  Data:            ELFDATA2LSB
+  Type:            ET_REL
+  Machine:         EM_RISCV
+Sections:
+  - Name:            .debug_abbrev
+    Type:            SHT_PROGBITS
+    Content:         01110012011201120112011201120112011201120112011201120112011201000000
+  - Name:            .debug_info
+    Type:            SHT_PROGBITS
+    Content:         78000000040000000000080142000000000000004200000000000000420000000000000042000000000000004200000000000000420000000000000042000000000000004200000000000000424200000000000042420000000000004242424200000000424242420000000042424242424242004242424242424200
+  - Name:            .rela.debug_info
+    Type:            SHT_RELA
+    Flags:           [ SHF_INFO_LINK ]
+    Link:            .symtab
+    EntSize:         0x0000000000000018
+    Info:            .debug_info
+    Relocations:
+
+      # Test 1
+      # 0x42 with R_RISCV_NONE(0x1) = 0x42
+      # CHECK: DW_AT_high_pc (0x0000000000000042)
+      - Offset:          0x000000000000000C # 0xC + 8*0
+        Symbol:          v1
+        Type:            R_RISCV_NONE
+
+      # Test 2
+      # 0x42 with R_RISCV_32(0xFFFFFFFFFFFFFFFF) = 0x00000000FFFFFFFF
+      # CHECK-NEXT: DW_AT_high_pc (0x00000000ffffffff)
+      - Offset:          0x0000000000000014 # 0xC + 8*1
+        Symbol:          vFFFFFFFFFFFFFFFF
+        Type:            R_RISCV_32
+
+      # Test 3
+      # 0x42 with R_RISCV_32_PCREL(0x4) = 0x4-0x1C = 0x00000000FFFFFFE8
+      # CHECK-NEXT: DW_AT_high_pc (0x00000000ffffffe8)
+      - Offset:          0x000000000000001C # 0xC + 8*2
+        Symbol:          v4
+        Type:            R_RISCV_32_PCREL
+
+      # Test 4
+      # 0x42 with R_RISCV_64(0xFFFFFFFFFFFFFFFF) = 0xFFFFFFFFFFFFFFFF
+      # CHECK-NEXT: DW_AT_high_pc (0xffffffffffffffff)
+      - Offset:          0x0000000000000024 # 0xC + 8*3
+        Symbol:          vFFFFFFFFFFFFFFFF
+        Type:            R_RISCV_64
+
+      # Test 5
+      # 0x42 with R_RISCV_SET6(1) = 0x41
+      # CHECK-NEXT: DW_AT_high_pc (0x0000000000000041)
+      - Offset:          0x000000000000002C # 0xC + 8*4
+        Symbol:          v1
+        Type:            R_RISCV_SET6
+
+      # Test 6
+      # 0x42 with R_RISCV_SUB6(0x4) = 0x7E
+      # CHECK-NEXT: DW_AT_high_pc (0x000000000000007e)
+      - Offset:          0x0000000000000034 # 0xC + 8*5
+        Symbol:          v4
+        Type:            R_RISCV_SUB6
+
+      # Test 7
+      # 0x42 with R_RISCV_ADD8(0x04020103) = 0x45
+      # CHECK-NEXT: DW_AT_high_pc (0x0000000000000045)
+      - Offset:          0x000000000000003C # 0xC + 8*6
+        Symbol:          v04020103
+        Type:            R_RISCV_ADD8
+
+      # Test 8
+      # 0x42 with R_RISCV_SUB8(0x04020103) = 0x3F
+      # CHECK-NEXT: DW_AT_high_pc (0x000000000000003f)
+      - Offset:          0x0000000000000044 # 0xC + 8*7
+        Symbol:          v04020103
+        Type:            R_RISCV_SUB8
+
+      # Test 9
+      # 0x4242 with R_RISCV_ADD16(0x04020103) = 0x4345
+      # CHECK-NEXT: DW_AT_high_pc (0x0000000000004345)
+      - Offset:          0x000000000000004C # 0xC + 8*8
+        Symbol:          v04020103
+        Type:            R_RISCV_ADD16
+
+      # Test 10
+      # 0x4242 with R_RISCV_SUB16(0x04020103) = 0x413F
+      # CHECK-NEXT: DW_AT_high_pc (0x000000000000413f)
+      - Offset:          0x0000000000000054 # 0xC + 8*9
+        Symbol:          v04020103
+        Type:            R_RISCV_SUB16
+
+      # Test 11
+      # 0x42424242 with R_RISCV_ADD32(0x04020103) = 0x46444345
+      # CHECK-NEXT: DW_AT_high_pc (0x0000000046444345)
+      - Offset:          0x000000000000005C # 0xC + 8*10
+        Symbol:          v04020103
+        Type:            R_RISCV_ADD32
+
+      # Test 12
+      # 0x42424242 with R_RISCV_SUB32(0x04020103) = 0x3E40413F
+      # CHECK-NEXT: DW_AT_high_pc (0x000000003e40413f)
+      - Offset:          0x0000000000000064 # 0xC + 8*11
+        Symbol:          v04020103
+        Type:            R_RISCV_SUB32
+
+      # Test 13
+      # 0x0042424242424242 with R_RISCV_ADD64(0x0100000000000000) = 0x0142424242424242
+      # CHECK-NEXT: DW_AT_high_pc (0x0142424242424242)
+      - Offset:          0x000000000000006C # 0xC + 8*12
+        Symbol:          v0100000000000000
+        Type:            R_RISCV_ADD64
+
+      # Test 14
+      # 0x0042424242424242 with R_RISCV_SUB64(0x0100000000000000) = 0xFF42424242424242
+      # CHECK-NEXT: DW_AT_high_pc (0xff42424242424242)
+      - Offset:          0x0000000000000074 # 0xC + 8*13
+        Symbol:          v0100000000000000
+        Type:            R_RISCV_SUB64
+
+Symbols:
+  - Name:            v1
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:           0x0000000000000001
+  - Name:            v4
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:           0x0000000000000004
+  - Name:            v04020103
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:           0x0000000004020103
+  - Name:            vFFFFFFFFFFFFFFFF
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:           0xFFFFFFFFFFFFFFFF
+  - Name:            v0100000000000000
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:           0x0100000000000000
+...