Index: llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
===================================================================
--- llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+++ llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
@@ -501,6 +501,13 @@
     }
     break;
 
+  case SystemZ::PPA:
+    LoweredMI = MCInstBuilder(SystemZ::PPA)
+      .addReg(MI->getOperand(0).getReg())
+      .addReg(SystemZ::R0D)
+      .addImm(MI->getOperand(2).getImm());
+    break;
+
   case TargetOpcode::FENTRY_CALL:
     LowerFENTRY_CALL(*MI, Lower);
     return;
Index: llvm/lib/Target/SystemZ/SystemZInstrInfo.td
===================================================================
--- llvm/lib/Target/SystemZ/SystemZInstrInfo.td
+++ llvm/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -2064,12 +2064,16 @@
 // Processor assist
 //===----------------------------------------------------------------------===//
 
+// The second register operand is ignored but should be 0 in the output. Let
+// the second operand use the same reg as the first one and then emit %R0D in
+// the AsmPrinter. This avoids a false use of %R0D during compilation.
 let Predicates = [FeatureProcessorAssist] in {
   let hasSideEffects = 1 in
     def PPA : SideEffectTernaryRRFc<"ppa", 0xB2E8, GR64, GR64, imm32zx4>;
   def : Pat<(int_s390_ppa_txassist GR32:$src),
             (PPA (INSERT_SUBREG (i64 (IMPLICIT_DEF)), GR32:$src, subreg_l32),
-                 0, 1)>;
+                 (INSERT_SUBREG (i64 (IMPLICIT_DEF)), GR32:$src, subreg_l32),
+                 1)>;
 }
 
 //===----------------------------------------------------------------------===//
Index: llvm/test/CodeGen/SystemZ/htm-intrinsics.ll
===================================================================
--- llvm/test/CodeGen/SystemZ/htm-intrinsics.ll
+++ llvm/test/CodeGen/SystemZ/htm-intrinsics.ll
@@ -344,7 +344,7 @@
 ; PPA (Transaction-Abort Assist)
 define void @test_ppa_txassist(i32 %val) {
 ; CHECK-LABEL: test_ppa_txassist:
-; CHECK: ppa %r2, 0, 1
+; CHECK: ppa %r2, %r0, 1
 ; CHECK: br %r14
   call void @llvm.s390.ppa.txassist(i32 %val)
   ret void