diff --git a/llvm/lib/Target/X86/X86CallingConv.td b/llvm/lib/Target/X86/X86CallingConv.td --- a/llvm/lib/Target/X86/X86CallingConv.td +++ b/llvm/lib/Target/X86/X86CallingConv.td @@ -613,7 +613,6 @@ // 128 bit vectors are passed by pointer CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCPassIndirect>, - // 256 bit vectors are passed by pointer CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64], CCPassIndirect>, @@ -644,9 +643,10 @@ [XMM0, XMM1, XMM2, XMM3]>>, // The first 4 FP/Vector arguments are passed in XMM registers. - CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], - CCAssignToRegWithShadow<[XMM0, XMM1, XMM2, XMM3], - [RCX , RDX , R8 , R9 ]>>, + CCIfType<[f32, f64], + CCIfSubtarget<"hasSSE1()", + CCAssignToRegWithShadow<[XMM0, XMM1, XMM2, XMM3], + [RCX , RDX , R8 , R9 ]>>>, // Integer/FP values get stored in stack slots that are 8 bytes in size and // 8-byte aligned if there are no more registers to hold them. diff --git a/llvm/test/CodeGen/X86/no-sse-win64.ll b/llvm/test/CodeGen/X86/no-sse-win64.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/X86/no-sse-win64.ll @@ -0,0 +1,33 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck %s -check-prefix=SSE +; RUN: llc -mtriple=x86_64-windows-msvc < %s -mattr=-sse | FileCheck %s -check-prefix=NOSSE + +define void @pass_double(double %v, double* %p) { +; SSE-LABEL: pass_double: +; SSE: # %bb.0: +; SSE-NEXT: movsd %xmm0, (%rdx) +; SSE-NEXT: retq +; +; NOSSE-LABEL: pass_double: +; NOSSE: # %bb.0: +; NOSSE-NEXT: fldl {{[0-9]+}}(%rsp) +; NOSSE-NEXT: fstpl (%rcx) +; NOSSE-NEXT: retq + store double %v, double* %p + ret void +} + +define void @pass_float(float %v, float* %p) { +; SSE-LABEL: pass_float: +; SSE: # %bb.0: +; SSE-NEXT: movss %xmm0, (%rdx) +; SSE-NEXT: retq +; +; NOSSE-LABEL: pass_float: +; NOSSE: # %bb.0: +; NOSSE-NEXT: flds {{[0-9]+}}(%rsp) +; NOSSE-NEXT: fstps (%rcx) +; NOSSE-NEXT: retq + store float %v, float* %p + ret void +}