Index: llvm/lib/Target/Mips/MipsSubtarget.cpp
===================================================================
--- llvm/lib/Target/Mips/MipsSubtarget.cpp
+++ llvm/lib/Target/Mips/MipsSubtarget.cpp
@@ -256,6 +256,10 @@
     stackAlignment = Align(8);
   }
 
+  if ((isABI_N32() || isABI_N64()) && !isGP64bit())
+    report_fatal_error("64-bit code requested on a subtarget that doesn't "
+                       "support it!");
+
   return *this;
 }
 
Index: llvm/test/CodeGen/Mips/cpus-no-mips64.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/Mips/cpus-no-mips64.ll
@@ -0,0 +1,16 @@
+; Check that we reject 64-bit mode on 32-bit only CPUs.
+
+; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips1 2>&1 | FileCheck %s
+; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips2 2>&1 | FileCheck %s
+
+; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32 2>&1 | FileCheck %s
+; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r2 2>&1 | FileCheck %s
+; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r3 2>&1 | FileCheck %s
+; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r5 2>&1 | FileCheck %s
+; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r6 2>&1 | FileCheck %s
+
+; CHECK: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it!
+
+define void @foo() {
+  ret void
+}