diff --git a/llvm/test/MC/AArch64/adr.s b/llvm/test/MC/AArch64/adr.s --- a/llvm/test/MC/AArch64/adr.s +++ b/llvm/test/MC/AArch64/adr.s @@ -6,11 +6,11 @@ // CHECK-NEXT: adr x3, #0 // CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol // CHECK-NEXT: adr x4, #0 -// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol+987136 +// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol+0xf1000 // CHECK-NEXT: adr x5, #0 -// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol+987136 +// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol+0xf1000 // CHECK-NEXT: adr x6, #0 -// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol+987136 +// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol+0xf1000 adr x0, 100 adr x2, Symbol @@ -24,11 +24,11 @@ // CHECK-NEXT: adrp x2, #0 // CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol // CHECK-NEXT: adrp x3, #0 -// CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol+987136 +// CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol+0xf1000 // CHECK-NEXT: adrp x4, #0 -// CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol+987136 +// CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol+0xf1000 // CHECK-NEXT: adrp x5, #0 -// CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol+987136 +// CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol+0xf1000 adrp x0, Symbol adrp x2, Symbol + 0 diff --git a/llvm/test/MC/AArch64/arm32-elf-relocs.s b/llvm/test/MC/AArch64/arm32-elf-relocs.s --- a/llvm/test/MC/AArch64/arm32-elf-relocs.s +++ b/llvm/test/MC/AArch64/arm32-elf-relocs.s @@ -32,37 +32,37 @@ add x0, x2, #:lo12:sym+8 // CHECK: add x0, x2, :lo12:sym -// CHECK-OBJ-ILP32: 18 R_AARCH64_P32_ADD_ABS_LO12_NC sym+8 +// CHECK-OBJ-ILP32: 18 R_AARCH64_P32_ADD_ABS_LO12_NC sym+0x8 add x5, x7, #:dtprel_lo12:sym+1 // CHECK: add x5, x7, :dtprel_lo12:sym+1 -// CHECK-OBJ-ILP32: 1c R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12 sym+1 +// CHECK-OBJ-ILP32: 1c R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12 sym+0x1 add x9, x12, #:dtprel_lo12_nc:sym+2 // CHECK: add x9, x12, :dtprel_lo12_nc:sym+2 -// CHECK-OBJ-ILP32:20 R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC sym+2 +// CHECK-OBJ-ILP32:20 R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC sym+0x2 add x20, x30, #:tprel_lo12:sym+12 // CHECK: add x20, x30, :tprel_lo12:sym+12 -// CHECK-OBJ-ILP32: 24 R_AARCH64_P32_TLSLE_ADD_TPREL_LO12 sym+12 +// CHECK-OBJ-ILP32: 24 R_AARCH64_P32_TLSLE_ADD_TPREL_LO12 sym+0xc add x9, x12, #:tprel_lo12_nc:sym+54 // CHECK: add x9, x12, :tprel_lo12_nc:sym+54 -// CHECK-OBJ-ILP32: 28 R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC sym+54 +// CHECK-OBJ-ILP32: 28 R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC sym+0x36 add x5, x0, #:tlsdesc_lo12:sym+70 // CHECK: add x5, x0, :tlsdesc_lo12:sym+70 -// CHECK-OBJ-ILP32: 2c R_AARCH64_P32_TLSDESC_ADD_LO12 sym+70 +// CHECK-OBJ-ILP32: 2c R_AARCH64_P32_TLSDESC_ADD_LO12 sym+0x46 .hword sym + 4 - . -// CHECK-OBJ-ILP32: 30 R_AARCH64_P32_PREL16 sym+4 +// CHECK-OBJ-ILP32: 30 R_AARCH64_P32_PREL16 sym+0x4 .word sym - . + 8 -// CHECK-OBJ-ILP32: 32 R_AARCH64_P32_PREL32 sym+8 +// CHECK-OBJ-ILP32: 32 R_AARCH64_P32_PREL32 sym+0x8 .hword sym // CHECK-OBJ-ILP32: 36 R_AARCH64_P32_ABS16 sym .word sym+1 -// CHECK-OBJ-ILP32: 38 R_AARCH64_P32_ABS32 sym+1 +// CHECK-OBJ-ILP32: 38 R_AARCH64_P32_ABS32 sym+0x1 adrp x0, sym // CHECK: adrp x0, sym diff --git a/llvm/test/MC/AArch64/arm64-elf-relocs.s b/llvm/test/MC/AArch64/arm64-elf-relocs.s --- a/llvm/test/MC/AArch64/arm64-elf-relocs.s +++ b/llvm/test/MC/AArch64/arm64-elf-relocs.s @@ -12,8 +12,8 @@ // CHECK: add x0, x2, :lo12:sym+12 // CHECK: add x0, x2, :lo12:sym-3 // CHECK-OBJ-LP64: 0 R_AARCH64_ADD_ABS_LO12_NC sym -// CHECK-OBJ-LP64: 4 R_AARCH64_ADD_ABS_LO12_NC sym+12 -// CHECK-OBJ-LP64: 8 R_AARCH64_ADD_ABS_LO12_NC sym-3 +// CHECK-OBJ-LP64: 4 R_AARCH64_ADD_ABS_LO12_NC sym+0xc +// CHECK-OBJ-LP64: 8 R_AARCH64_ADD_ABS_LO12_NC sym-0x3 add x5, x7, #:dtprel_lo12:sym // CHECK: add x5, x7, :dtprel_lo12:sym @@ -37,41 +37,41 @@ add x0, x2, #:lo12:sym+8 // CHECK: add x0, x2, :lo12:sym -// CHECK-OBJ-LP64: 20 R_AARCH64_ADD_ABS_LO12_NC sym+8 +// CHECK-OBJ-LP64: 20 R_AARCH64_ADD_ABS_LO12_NC sym+0x8 add x5, x7, #:dtprel_lo12:sym+1 // CHECK: add x5, x7, :dtprel_lo12:sym+1 -// CHECK-OBJ-LP64: 24 R_AARCH64_TLSLD_ADD_DTPREL_LO12 sym+1 +// CHECK-OBJ-LP64: 24 R_AARCH64_TLSLD_ADD_DTPREL_LO12 sym+0x1 add x9, x12, #:dtprel_lo12_nc:sym+2 // CHECK: add x9, x12, :dtprel_lo12_nc:sym+2 -// CHECK-OBJ-LP64: 28 R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC sym+2 +// CHECK-OBJ-LP64: 28 R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC sym+0x2 add x20, x30, #:tprel_lo12:sym+12 // CHECK: add x20, x30, :tprel_lo12:sym+12 -// CHECK-OBJ-LP64: 2c R_AARCH64_TLSLE_ADD_TPREL_LO12 sym+12 +// CHECK-OBJ-LP64: 2c R_AARCH64_TLSLE_ADD_TPREL_LO12 sym+0xc add x9, x12, #:tprel_lo12_nc:sym+54 // CHECK: add x9, x12, :tprel_lo12_nc:sym+54 -// CHECK-OBJ-LP64: 30 R_AARCH64_TLSLE_ADD_TPREL_LO12_NC sym+54 +// CHECK-OBJ-LP64: 30 R_AARCH64_TLSLE_ADD_TPREL_LO12_NC sym+0x36 add x5, x0, #:tlsdesc_lo12:sym+70 // CHECK: add x5, x0, :tlsdesc_lo12:sym+70 -// CHECK-OBJ-LP64: 34 R_AARCH64_TLSDESC_ADD_LO12 sym+70 +// CHECK-OBJ-LP64: 34 R_AARCH64_TLSDESC_ADD_LO12 sym+0x46 .hword sym + 4 - . -// CHECK-OBJ-LP64: 38 R_AARCH64_PREL16 sym+4 +// CHECK-OBJ-LP64: 38 R_AARCH64_PREL16 sym+0x4 .word sym - . + 8 -// CHECK-OBJ-LP64: 3a R_AARCH64_PREL32 sym+8 +// CHECK-OBJ-LP64: 3a R_AARCH64_PREL32 sym+0x8 .xword sym-. // CHECK-OBJ-LP64: 3e R_AARCH64_PREL64 sym{{$}} .hword sym // CHECK-OBJ-LP64: 46 R_AARCH64_ABS16 sym .word sym+1 -// CHECK-OBJ-LP64: 48 R_AARCH64_ABS32 sym+1 +// CHECK-OBJ-LP64: 48 R_AARCH64_ABS32 sym+0x1 .xword sym+16 -// CHECK-OBJ-LP64: 4c R_AARCH64_ABS64 sym+16 +// CHECK-OBJ-LP64: 4c R_AARCH64_ABS64 sym+0x10 adrp x0, sym // CHECK: adrp x0, sym @@ -116,9 +116,9 @@ // CHECK-OBJ-LP64: R_AARCH64_LDST8_ABS_LO12_NC sym // CHECK-OBJ-LP64: R_AARCH64_LDST8_ABS_LO12_NC sym // CHECK-OBJ-LP64: R_AARCH64_LDST8_ABS_LO12_NC sym -// CHECK-OBJ-LP64: R_AARCH64_LDST8_ABS_LO12_NC sym+15 -// CHECK-OBJ-LP64: R_AARCH64_LDST8_ABS_LO12_NC sym-2 -// CHECK-OBJ-LP64: R_AARCH64_LDST8_ABS_LO12_NC sym+4 +// CHECK-OBJ-LP64: R_AARCH64_LDST8_ABS_LO12_NC sym+0xf +// CHECK-OBJ-LP64: R_AARCH64_LDST8_ABS_LO12_NC sym-0x2 +// CHECK-OBJ-LP64: R_AARCH64_LDST8_ABS_LO12_NC sym+0x4 ldrb w23, [x29, #:dtprel_lo12_nc:sym] ldrsb w23, [x19, #:dtprel_lo12:sym] @@ -134,7 +134,7 @@ // CHECK-OBJ-LP64: R_AARCH64_TLSLD_LDST8_DTPREL_LO12 sym // CHECK-OBJ-LP64: R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC sym // CHECK-OBJ-LP64: R_AARCH64_TLSLD_LDST8_DTPREL_LO12 sym -// CHECK-OBJ-LP64: R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC sym+2 +// CHECK-OBJ-LP64: R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC sym+0x2 ldrb w1, [x2, :tprel_lo12:sym] ldrsb w3, [x4, #:tprel_lo12_nc:sym] @@ -163,7 +163,7 @@ // CHECK-OBJ-LP64: R_AARCH64_LDST16_ABS_LO12_NC sym // CHECK-OBJ-LP64: R_AARCH64_LDST16_ABS_LO12_NC sym // CHECK-OBJ-LP64: R_AARCH64_LDST16_ABS_LO12_NC sym -// CHECK-OBJ-LP64: R_AARCH64_LDST16_ABS_LO12_NC sym+4 +// CHECK-OBJ-LP64: R_AARCH64_LDST16_ABS_LO12_NC sym+0x4 ldrh w23, [x29, #:dtprel_lo12_nc:sym] ldrsh w23, [x19, :dtprel_lo12:sym] @@ -232,8 +232,8 @@ // CHECK: ldr x28, [x27, :lo12:sym-15] // CHECK-OBJ-LP64: R_AARCH64_LDST64_ABS_LO12_NC sym // CHECK-OBJ-LP64: R_AARCH64_LDST64_ABS_LO12_NC sym -// CHECK-OBJ-LP64: R_AARCH64_LDST64_ABS_LO12_NC sym+10 -// CHECK-OBJ-LP64: R_AARCH64_LDST64_ABS_LO12_NC sym-15 +// CHECK-OBJ-LP64: R_AARCH64_LDST64_ABS_LO12_NC sym+0xa +// CHECK-OBJ-LP64: R_AARCH64_LDST64_ABS_LO12_NC sym-0xf ldr x24, [x23, #:got_lo12:sym] ldr d22, [x21, :got_lo12:sym] @@ -243,7 +243,7 @@ // CHECK: ldr x24, [x23, :got_lo12:sym+7] // CHECK-OBJ-LP64: R_AARCH64_LD64_GOT_LO12_NC sym // CHECK-OBJ-LP64: R_AARCH64_LD64_GOT_LO12_NC sym -// CHECK-OBJ-LP64: R_AARCH64_LD64_GOT_LO12_NC sym+7 +// CHECK-OBJ-LP64: R_AARCH64_LD64_GOT_LO12_NC sym+0x7 ldr x24, [x23, :dtprel_lo12_nc:sym] ldr d22, [x21, #:dtprel_lo12:sym] diff --git a/llvm/test/MC/X86/tlsdesc-64.s b/llvm/test/MC/X86/tlsdesc-64.s --- a/llvm/test/MC/X86/tlsdesc-64.s +++ b/llvm/test/MC/X86/tlsdesc-64.s @@ -10,7 +10,7 @@ # SYM: TLS GLOBAL DEFAULT UND a # CHECK: 0: leaq (%rip), %rax -# CHECK-NEXT: 0000000000000003: R_X86_64_GOTPC32_TLSDESC a-4 +# CHECK-NEXT: 0000000000000003: R_X86_64_GOTPC32_TLSDESC a-0x4 # CHECK-NEXT: 7: callq *(%rax) # CHECK-NEXT: 0000000000000007: R_X86_64_TLSDESC_CALL a diff --git a/llvm/test/Object/X86/objdump-disassembly-inline-relocations.test b/llvm/test/Object/X86/objdump-disassembly-inline-relocations.test --- a/llvm/test/Object/X86/objdump-disassembly-inline-relocations.test +++ b/llvm/test/Object/X86/objdump-disassembly-inline-relocations.test @@ -178,10 +178,10 @@ # ELF-x86-64: c: bf 00 00 00 00 movl $0, %edi # ELF-x86-64: d: R_X86_64_32S .rodata.str1.1 # ELF-x86-64: 11: e8 00 00 00 00 callq 0 -# ELF-x86-64: 12: R_X86_64_PC32 puts-4 +# ELF-x86-64: 12: R_X86_64_PC32 puts-0x4 # ELF-x86-64: 16: 30 c0 xorb %al, %al # ELF-x86-64: 18: e8 00 00 00 00 callq 0 -# ELF-x86-64: 19: R_X86_64_PC32 SomeOtherFunction-4 +# ELF-x86-64: 19: R_X86_64_PC32 SomeOtherFunction-0x4 # ELF-x86-64: 1d: 8b 44 24 04 movl 4(%rsp), %eax # ELF-x86-64: 21: 48 83 c4 08 addq $8, %rsp # ELF-x86-64: 25: c3 ret diff --git a/llvm/test/Object/objdump-relocations.test b/llvm/test/Object/objdump-relocations.test --- a/llvm/test/Object/objdump-relocations.test +++ b/llvm/test/Object/objdump-relocations.test @@ -125,11 +125,11 @@ # WASM-NEXT: R_WASM_FUNCTION_INDEX_LEB SomeOtherFunction # ELF-complex-x86-64: .text -# ELF-complex-x86-64-NEXT: R_X86_64_8 .data-4 -# ELF-complex-x86-64-NEXT: R_X86_64_16 .data-4 -# ELF-complex-x86-64-NEXT: R_X86_64_32 .data-4 -# ELF-complex-x86-64-NEXT: R_X86_64_32S .data-4 -# ELF-complex-x86-64-NEXT: R_X86_64_64 .data-4 -# ELF-complex-x86-64-NEXT: R_X86_64_PC32 .data-4 +# ELF-complex-x86-64-NEXT: R_X86_64_8 .data-0x4 +# ELF-complex-x86-64-NEXT: R_X86_64_16 .data-0x4 +# ELF-complex-x86-64-NEXT: R_X86_64_32 .data-0x4 +# ELF-complex-x86-64-NEXT: R_X86_64_32S .data-0x4 +# ELF-complex-x86-64-NEXT: R_X86_64_64 .data-0x4 +# ELF-complex-x86-64-NEXT: R_X86_64_PC32 .data-0x4 # ELF-complex-x86-64-NEXT: R_X86_64_32 .data -# ELF-complex-x86-64-NEXT: R_X86_64_32 .data+4 +# ELF-complex-x86-64-NEXT: R_X86_64_32 .data+0x4 diff --git a/llvm/test/tools/llvm-objdump/X86/demangle.s b/llvm/test/tools/llvm-objdump/X86/demangle.s --- a/llvm/test/tools/llvm-objdump/X86/demangle.s +++ b/llvm/test/tools/llvm-objdump/X86/demangle.s @@ -6,13 +6,13 @@ # CHECK-NEXT: 0000000000000000 g F .text 00000000 foo() ## Check we demangle symbols when printing relocations. -# CHECK: 000000000000001 R_X86_64_PLT32 foo()-4 +# CHECK: 000000000000001 R_X86_64_PLT32 foo()-0x4 ## Check the case when relocations are inlined into disassembly. # RUN: llvm-objdump -d -r --demangle %t | FileCheck %s --check-prefix=INLINE # INLINE: foo(): # INLINE-NEXT: 0: {{.*}} callq 0 <_Z3foov+0x5> -# INLINE-NEXT: 0000000000000001: R_X86_64_PLT32 foo()-4 +# INLINE-NEXT: 0000000000000001: R_X86_64_PLT32 foo()-0x4 .text .globl _Z3foov diff --git a/llvm/test/tools/llvm-objdump/X86/elf-disassemble-relocs.test b/llvm/test/tools/llvm-objdump/X86/elf-disassemble-relocs.test --- a/llvm/test/tools/llvm-objdump/X86/elf-disassemble-relocs.test +++ b/llvm/test/tools/llvm-objdump/X86/elf-disassemble-relocs.test @@ -5,10 +5,10 @@ # RUN: llvm-objdump %t1.o -d -r | FileCheck %s --implicit-check-not="RELOCATION RECORDS" # CHECK: 0: e8 00 00 00 00 callq 0 <.text+0x5> -# CHECK-NEXT: 0000000000000001: R_X86_64_PC32 foo-4 -# CHECK-NEXT: 0000000000000002: R_X86_64_NONE bar+8 +# CHECK-NEXT: 0000000000000001: R_X86_64_PC32 foo-0x4 +# CHECK-NEXT: 0000000000000002: R_X86_64_NONE bar+0x8 # CHECK-NEXT: 5: e8 00 00 00 00 callq 0 <.text+0xa> -# CHECK-NEXT: 0000000000000006: R_X86_64_PLT32 foo+1 +# CHECK-NEXT: 0000000000000006: R_X86_64_PLT32 foo+0x1 --- !ELF FileHeader: @@ -61,3 +61,59 @@ Link: 0 Info: 0xFF Relocations: [] + +## Check ranges of addends being displayed in a dump of relocations mixed with disassembly. +# RUN: yaml2obj --docnum=3 %s > %t3 +# RUN: llvm-objdump -d -r %t3 | FileCheck %s --check-prefix=ADDENDS + +# ADDENDS: Disassembly of section .text: +# ADDENDS: R_X86_64_64 glob-0x8000000000000000 +# ADDENDS: R_X86_64_64 glob+0x7fffffffffffffff +# ADDENDS: R_X86_64_64 glob-0x1 +# ADDENDS: R_X86_64_64 glob+0x12345678 +# ADDENDS: R_X86_64_64 glob{{$}} + +--- !ELF +FileHeader: + Class: ELFCLASS64 + Data: ELFDATA2LSB + Type: ET_REL + Machine: EM_X86_64 + +Sections: +- Name: .text + Type: SHT_PROGBITS + Size: 8 + Flags: [SHF_EXECINSTR,SHF_ALLOC] + +- Name: .rela.text + Type: SHT_RELA + Info: .text + Relocations: + - Offset: 0x0 + Addend: -9223372036854775808 + Symbol: glob + Type: R_X86_64_64 + - Offset: 0x1 + Symbol: glob + Type: R_X86_64_64 + Addend: 9223372036854775807 + - Offset: 0x2 + Symbol: glob + Type: R_X86_64_64 + Addend: -1 + - Offset: 0x3 + Symbol: glob + Type: R_X86_64_64 + Addend: 0x12345678 + - Offset: 0x4 + Symbol: glob + Type: R_X86_64_64 + Addend: 0 + +Symbols: + - Name: glob + Section: .text + Value: 0x0 + Size: 0 + Binding: STB_GLOBAL diff --git a/llvm/test/tools/llvm-objdump/X86/section-filter-relocs.test b/llvm/test/tools/llvm-objdump/X86/section-filter-relocs.test --- a/llvm/test/tools/llvm-objdump/X86/section-filter-relocs.test +++ b/llvm/test/tools/llvm-objdump/X86/section-filter-relocs.test @@ -11,7 +11,7 @@ # DISASM-EMPTY: # DISASM-NEXT: 0000000000000400 .text: # DISASM-NEXT: 400: e8 00 00 00 00 callq 0 <.text+0x5> -# RELOC-NEXT: 00000401: R_X86_64_PC32 foo+1 +# RELOC-NEXT: 00000401: R_X86_64_PC32 foo+0x1 # RELOC-NEXT: 00000401: R_X86_64_GOT32 foo # DISASM: Disassembly of section .rodata: # DISASM-EMPTY: diff --git a/llvm/test/tools/llvm-objdump/relocations-elf.test b/llvm/test/tools/llvm-objdump/relocations-elf.test --- a/llvm/test/tools/llvm-objdump/relocations-elf.test +++ b/llvm/test/tools/llvm-objdump/relocations-elf.test @@ -8,9 +8,9 @@ # CHECK-NEXT: 0000000000000001 R_X86_64_32 glob1 # CHECK-NEXT: 0000000000000001 R_X86_64_32S glob2 # CHECK-NEXT: 0000000000000002 R_X86_64_64 loc1 -# CHECK-NEXT: 0000000000000001 R_X86_64_32 glob1+1 -# CHECK-NEXT: 0000000000000001 R_X86_64_32S glob2+2 -# CHECK-NEXT: 0000000000000002 R_X86_64_64 loc1+3 +# CHECK-NEXT: 0000000000000001 R_X86_64_32 glob1+0x1 +# CHECK-NEXT: 0000000000000001 R_X86_64_32S glob2+0x2 +# CHECK-NEXT: 0000000000000002 R_X86_64_64 loc1+0x3 --- !ELF FileHeader: !FileHeader @@ -90,3 +90,59 @@ Relocations: - Offset: 0x1 Type: R_X86_64_NONE + +## Check ranges of addends being displayed in a dump of relocations. +# RUN: yaml2obj --docnum=3 %s > %t3 +# RUN: llvm-objdump -r %t3 | FileCheck %s --check-prefix=ADDENDS + +# ADDENDS: RELOCATION RECORDS FOR [.text]: +# ADDENDS: R_X86_64_64 glob-0x8000000000000000 +# ADDENDS: R_X86_64_64 glob+0x7fffffffffffffff +# ADDENDS: R_X86_64_64 glob-0x1 +# ADDENDS: R_X86_64_64 glob+0x12345678 +# ADDENDS: R_X86_64_64 glob{{$}} + +--- !ELF +FileHeader: + Class: ELFCLASS64 + Data: ELFDATA2LSB + Type: ET_REL + Machine: EM_X86_64 + +Sections: +- Name: .text + Type: SHT_PROGBITS + Size: 8 + Flags: [SHF_EXECINSTR,SHF_ALLOC] + +- Name: .rela.text + Type: SHT_RELA + Info: .text + Relocations: + - Offset: 0x0 + Addend: -9223372036854775808 + Symbol: glob + Type: R_X86_64_64 + - Offset: 0x1 + Symbol: glob + Type: R_X86_64_64 + Addend: 9223372036854775807 + - Offset: 0x2 + Symbol: glob + Type: R_X86_64_64 + Addend: -1 + - Offset: 0x3 + Symbol: glob + Type: R_X86_64_64 + Addend: 0x12345678 + - Offset: 0x4 + Symbol: glob + Type: R_X86_64_64 + Addend: 0 + +Symbols: + - Name: glob + Section: .text + Value: 0x0 + Size: 0 + Binding: STB_GLOBAL diff --git a/llvm/test/tools/llvm-objdump/relocations-in-nonreloc.test b/llvm/test/tools/llvm-objdump/relocations-in-nonreloc.test --- a/llvm/test/tools/llvm-objdump/relocations-in-nonreloc.test +++ b/llvm/test/tools/llvm-objdump/relocations-in-nonreloc.test @@ -10,7 +10,7 @@ # FMT: [[FILE]]: file format ELF64-x86-64 # REL: RELOCATION RECORDS FOR []: -# REL-NEXT: 0000000000000123 R_X86_64_NONE *ABS*+321 +# REL-NEXT: 0000000000000123 R_X86_64_NONE *ABS*+0x141 ## Executable. --- !ELF diff --git a/llvm/tools/llvm-objdump/ELFDump.cpp b/llvm/tools/llvm-objdump/ELFDump.cpp --- a/llvm/tools/llvm-objdump/ELFDump.cpp +++ b/llvm/tools/llvm-objdump/ELFDump.cpp @@ -105,9 +105,12 @@ } else { Fmt << "*ABS*"; } - - if (Addend != 0) - Fmt << (Addend < 0 ? "" : "+") << Addend; + if (Addend != 0) { + Fmt << (Addend < 0 + ? "-" + : "+") << format("0x%" PRIx64, + (Addend < 0 ? -(uint64_t)Addend : (uint64_t)Addend)); + } Fmt.flush(); Result.append(FmtBuf.begin(), FmtBuf.end()); return Error::success();