diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp --- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp +++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp @@ -372,7 +372,6 @@ AMDGPU::IsaVersion IV; DenseSet TrackedWaitcntSet; - DenseSet VCCZBugHandledSet; struct BlockInfo { MachineBasicBlock *MBB; @@ -1388,8 +1387,7 @@ } bool VCCZBugWorkAround = false; - if (readsVCCZ(Inst) && - (!VCCZBugHandledSet.count(&Inst))) { + if (readsVCCZ(Inst)) { if (ScoreBrackets.getScoreLB(LGKM_CNT) < ScoreBrackets.getScoreUB(LGKM_CNT) && ScoreBrackets.hasPendingEvent(SMEM_ACCESS)) { @@ -1431,7 +1429,6 @@ TII->get(ST->isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64), TRI->getVCC()) .addReg(TRI->getVCC()); - VCCZBugHandledSet.insert(&Inst); Modified = true; } @@ -1471,7 +1468,6 @@ RegisterEncoding.SGPR0 + HardwareLimits.NumSGPRsMax - 1; TrackedWaitcntSet.clear(); - VCCZBugHandledSet.clear(); RpotIdxMap.clear(); BlockInfos.clear(); diff --git a/llvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll b/llvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll --- a/llvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll +++ b/llvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll @@ -1,13 +1,13 @@ ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VCCZ-BUG %s ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VCCZ-BUG %s -; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NOVCCZ-BUG %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s ; GCN-FUNC: {{^}}vccz_workaround: ; GCN: s_load_dword s{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], 0x0 ; GCN: v_cmp_neq_f32_e64 {{[^,]*}}, s{{[0-9]+}}, 0{{$}} ; VCCZ-BUG: s_waitcnt lgkmcnt(0) ; VCCZ-BUG: s_mov_b64 vcc, vcc -; NOVCCZ-BUG-NOT: s_mov_b64 vcc, vcc +; GCN-NOT: s_mov_b64 vcc, vcc ; GCN: s_cbranch_vccnz [[EXIT:[0-9A-Za-z_]+]] ; GCN: buffer_store_dword ; GCN: [[EXIT]]: @@ -28,6 +28,8 @@ ; GCN-FUNC: {{^}}vccz_noworkaround: ; GCN: v_cmp_neq_f32_e32 vcc, 0, v{{[0-9]+}} +; GCN-NOT: s_waitcnt lgkmcnt(0) +; GCN-NOT: s_mov_b64 vcc, vcc ; GCN: s_cbranch_vccnz [[EXIT:[0-9A-Za-z_]+]] ; GCN: buffer_store_dword ; GCN: [[EXIT]]: