Index: llvm/include/llvm/ADT/DirectedGraph.h =================================================================== --- llvm/include/llvm/ADT/DirectedGraph.h +++ llvm/include/llvm/ADT/DirectedGraph.h @@ -48,9 +48,6 @@ static_cast &>(*this).getTargetNode()); } - /// Set the target node this edge connects to. - void setTargetNode(const NodeType &N) { TargetNode = N; } - protected: // As the default implementation use address comparison for equality. bool isEqualTo(const EdgeType &E) const { return this == &E; } Index: llvm/lib/Target/PowerPC/PPCISelLowering.h =================================================================== --- llvm/lib/Target/PowerPC/PPCISelLowering.h +++ llvm/lib/Target/PowerPC/PPCISelLowering.h @@ -1120,6 +1120,14 @@ SelectionDAG &DAG, SDValue ArgVal, const SDLoc &dl) const; + SDValue truncateScalarIntegerArg(ISD::ArgFlagsTy Flags, EVT ValVT, + SelectionDAG &DAG, SDValue ArgValue, + MVT LocVT, const SDLoc &dl) const; + + SDValue LowerFormalArguments_AIX( + SDValue Chain, CallingConv::ID CallConv, bool isVarArg, + const SmallVectorImpl &Ins, const SDLoc &dl, + SelectionDAG &DAG, SmallVectorImpl &InVals) const; SDValue LowerFormalArguments_Darwin( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl &Ins, const SDLoc &dl, Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp =================================================================== --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -3408,15 +3408,16 @@ SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl &Ins, const SDLoc &dl, SelectionDAG &DAG, SmallVectorImpl &InVals) const { + if (Subtarget.isAIXABI()) + return LowerFormalArguments_AIX(Chain, CallConv, isVarArg, Ins, dl, DAG, + InVals); if (Subtarget.is64BitELFABI()) return LowerFormalArguments_64SVR4(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals); - else if (Subtarget.is32BitELFABI()) + if (Subtarget.is32BitELFABI()) return LowerFormalArguments_32SVR4(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals); - // FIXME: We are using this for both AIX and Darwin. We should add appropriate - // AIX testing, and rename it appropriately. return LowerFormalArguments_Darwin(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals); } @@ -6783,6 +6784,124 @@ } } +static const TargetRegisterClass *getRegClassForSVT(MVT::SimpleValueType SVT, + bool IsPPC64) { + switch (SVT) { + default: + report_fatal_error("Unexpected value type for formal argument"); + case MVT::i1: + case MVT::i32: + if (!IsPPC64) + return &PPC::GPRCRegClass; + LLVM_FALLTHROUGH; + case MVT::i64: + assert(IsPPC64 && "i64 should have been split for 32-bit codegen."); + return &PPC::G8RCRegClass; + case MVT::f32: + return &PPC::F4RCRegClass; + case MVT::f64: + return &PPC::F8RCRegClass; + } +} + +SDValue PPCTargetLowering::truncateScalarIntegerArg(ISD::ArgFlagsTy Flags, + EVT ValVT, + SelectionDAG &DAG, + SDValue ArgValue, MVT LocVT, + const SDLoc &dl) const { + assert(ValVT.isScalarInteger() && LocVT.isScalarInteger()); + assert(ValVT.getSizeInBits() < LocVT.getSizeInBits()); + + if (Flags.isSExt()) + ArgValue = DAG.getNode(ISD::AssertSext, dl, LocVT, ArgValue, + DAG.getValueType(ValVT)); + else if (Flags.isZExt()) + ArgValue = DAG.getNode(ISD::AssertZext, dl, LocVT, ArgValue, + DAG.getValueType(ValVT)); + + return DAG.getNode(ISD::TRUNCATE, dl, ValVT, ArgValue); +} + +SDValue PPCTargetLowering::LowerFormalArguments_AIX( + SDValue Chain, CallingConv::ID CallConv, bool isVarArg, + const SmallVectorImpl &Ins, const SDLoc &dl, + SelectionDAG &DAG, SmallVectorImpl &InVals) const { + + MachineFunction &MF = DAG.getMachineFunction(); + PPCFunctionInfo *FuncInfo = MF.getInfo(); + assert((CallConv == CallingConv::C || CallConv == CallingConv::Cold || + CallConv == CallingConv::Fast) && + "Unexpected calling convention!"); + + if (isVarArg) + report_fatal_error("This call type is unimplemented on AIX."); + + if (getTargetMachine().Options.GuaranteedTailCallOpt) + report_fatal_error("Tail call support is unimplemented on AIX."); + + if (useSoftFloat()) + report_fatal_error("Soft float support is unimplemented on AIX."); + + const PPCSubtarget &Subtarget = + static_cast(DAG.getSubtarget()); + if (Subtarget.hasQPX()) + report_fatal_error("QPX support is not supported on AIX."); + if (Subtarget.hasAltivec()) + report_fatal_error("Altivec support is unimplemented on AIX."); + + const bool IsPPC64 = Subtarget.isPPC64(); + const unsigned PtrByteSize = IsPPC64 ? 8 : 4; + + // Assign locations to all of the incoming arguments. + SmallVector ArgLocs; + CCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext()); + + // Reserve space for the linkage area on the stack. + const unsigned LinkageSize = Subtarget.getFrameLowering()->getLinkageSize(); + // On AIX a minimum of 8 words is saved to the parameter save area. + const unsigned MinParameterSaveArea = 8 * PtrByteSize; + CCInfo.AllocateStack(LinkageSize + MinParameterSaveArea, PtrByteSize); + CCInfo.AnalyzeFormalArguments(Ins, CC_AIX); + + for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { + CCValAssign &VA = ArgLocs[i]; + SDValue ArgValue; + ISD::ArgFlagsTy Flags = Ins[i].Flags; + if (VA.isRegLoc()) { + EVT ValVT = VA.getValVT(); + MVT LocVT = VA.getLocVT(); + MVT::SimpleValueType SVT = ValVT.getSimpleVT().SimpleTy; + unsigned VReg = + MF.addLiveIn(VA.getLocReg(), getRegClassForSVT(SVT, IsPPC64)); + ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, LocVT); + if (ValVT.isScalarInteger() && + (ValVT.getSizeInBits() < LocVT.getSizeInBits())) { + ArgValue = + truncateScalarIntegerArg(Flags, ValVT, DAG, ArgValue, LocVT, dl); + ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, LocVT); + } + InVals.push_back(ArgValue); + } else { + report_fatal_error("Handling of formal arguments on the stack is " + "unimplemented!"); + } + } + + // Area that is at least reserved in the caller of this function. + unsigned MinReservedArea = + std::max(CCInfo.getNextStackOffset(), LinkageSize + MinParameterSaveArea); + + // Set the size that is at least reserved in caller of this function. Tail + // call optimized function's reserved stack space needs to be aligned so + // that taking the difference between two stack areas will result in an + // aligned stack. reserved for caller + MinReservedArea = + EnsureStackAlignment(Subtarget.getFrameLowering(), MinReservedArea); + FuncInfo->setMinReservedArea(MinReservedArea); + + return Chain; +} + SDValue PPCTargetLowering::LowerCall_AIX( SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, bool isPatchPoint, Index: llvm/test/CodeGen/PowerPC/aix-lower-block-address.ll =================================================================== --- llvm/test/CodeGen/PowerPC/aix-lower-block-address.ll +++ llvm/test/CodeGen/PowerPC/aix-lower-block-address.ll @@ -1,16 +1,16 @@ -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ ; RUN: -code-model=small -stop-after=machine-cp < %s | FileCheck \ ; RUN: --check-prefix=32SMALL-MIR %s -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ ; RUN: -code-model=large -stop-after=machine-cp < %s | FileCheck \ ; RUN: --check-prefix=32LARGE-MIR %s -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ ; RUN: -code-model=small -stop-after=machine-cp < %s | FileCheck \ ; RUN: --check-prefix=64SMALL-MIR %s -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ ; RUN: -code-model=large -stop-after=machine-cp < %s | FileCheck \ ; RUN: --check-prefix=64LARGE-MIR %s Index: llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll =================================================================== --- llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll +++ llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll @@ -1,16 +1,16 @@ -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ ; RUN: -code-model=small -stop-after=machine-cp < %s | FileCheck \ ; RUN: --check-prefix=32SMALL-MIR %s -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ ; RUN: -code-model=large -stop-after=machine-cp < %s | FileCheck \ ; RUN: --check-prefix=32LARGE-MIR %s -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ ; RUN: -code-model=small -stop-after=machine-cp < %s | FileCheck \ ; RUN: --check-prefix=64SMALL-MIR %s -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ ; RUN: -code-model=large -stop-after=machine-cp < %s | FileCheck \ ; RUN: --check-prefix=64LARGE-MIR %s Index: llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll =================================================================== --- llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll +++ llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll @@ -1,16 +1,16 @@ -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ ; RUN: -code-model=small -stop-after=machine-cp < %s | FileCheck \ ; RUN: --check-prefix=32SMALL-MIR %s -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ ; RUN: -code-model=large -stop-after=machine-cp < %s | FileCheck \ ; RUN: --check-prefix=32LARGE-MIR %s -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ ; RUN: -code-model=small -stop-after=machine-cp < %s | FileCheck \ ; RUN: --check-prefix=64SMALL-MIR %s -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ ; RUN: -code-model=large -stop-after=machine-cp < %s | FileCheck \ ; RUN: --check-prefix=64LARGE-MIR %s Index: llvm/test/CodeGen/PowerPC/aix-return55.ll =================================================================== --- llvm/test/CodeGen/PowerPC/aix-return55.ll +++ llvm/test/CodeGen/PowerPC/aix-return55.ll @@ -1,4 +1,4 @@ -; RUN: llc -mcpu=pwr9 -mtriple=powerpc-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mcpu=pwr9 -mattr=-altivec -mtriple=powerpc-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s define dso_local signext i32 @foo() { Index: llvm/test/CodeGen/PowerPC/aix-space.ll =================================================================== --- llvm/test/CodeGen/PowerPC/aix-space.ll +++ llvm/test/CodeGen/PowerPC/aix-space.ll @@ -1,4 +1,4 @@ -; RUN: llc -verify-machineinstrs -O0 -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s +; RUN: llc -verify-machineinstrs -O0 -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s @a = common global double 0.000000e+00, align 8 Index: llvm/test/CodeGen/PowerPC/aix_cc_abi.ll =================================================================== --- /dev/null +++ llvm/test/CodeGen/PowerPC/aix_cc_abi.ll @@ -0,0 +1,752 @@ +; RUN: llc -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \ +; RUN: FileCheck --check-prefixes=CHECK,32BIT %s + +; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \ +; RUN: FileCheck --check-prefixes=CHECK,64BIT %s + +define void @call_test_chars() { +entry: + call void @test_chars(i8 signext 97, i8 signext 97, i8 signext 97, i8 signext 97) + ret void +} + +; CHECK-LABEL: name: call_test_chars + +; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 +; 32BIT: $r3 = LI 97 +; 32BIT: $r4 = LI 97 +; 32BIT: $r5 = LI 97 +; 32BIT: $r6 = LI 97 +; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit $r2, implicit-def $r1 +; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 + +; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 +; 64BIT: $x3 = LI8 97 +; 64BIT: $x4 = LI8 97 +; 64BIT: $x5 = LI8 97 +; 64BIT: $x6 = LI8 97 +; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1 +; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 + +define void @test_chars(i8 signext %c1, i8 signext %c2, i8 signext %c3, i8 signext %c4) { +entry: + %c1.addr = alloca i8, align 1 + %c2.addr = alloca i8, align 1 + %c3.addr = alloca i8, align 1 + %c4.addr = alloca i8, align 1 + store i8 %c1, i8* %c1.addr, align 1 + store i8 %c2, i8* %c2.addr, align 1 + store i8 %c3, i8* %c3.addr, align 1 + store i8 %c4, i8* %c4.addr, align 1 + ret void +} + +; CHECK-LABEL: name: test_chars + +; 32BIT: liveins: +; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r4', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r5', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r6', virtual-reg: '' } +; 32BIT: body: +; 32BIT-NEXT: bb.0.entry: +; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6 + +; 64BIT: liveins: +; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x4', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x5', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x6', virtual-reg: '' } +; 64BIT: body: +; 64BIT-NEXT: bb.0.entry: +; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6 + +define void @call_test_chars_mix() { +entry: + call void @test_chars_mix(i8 signext 97, i8 zeroext -31, i8 zeroext 97, i8 signext -31) + ret void +} + +; CHECK-LABEL: name: call_test_chars_mix + +; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 +; 32BIT: $r3 = LI 97 +; 32BIT: $r4 = LI 225 +; 32BIT: $r5 = LI 97 +; 32BIT: $r6 = LI -31 +; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit $r2, implicit-def $r1 +; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 + +; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 +; 64BIT: $x3 = LI8 97 +; 64BIT: $x4 = LI8 225 +; 64BIT: $x5 = LI8 97 +; 64BIT: $x6 = LI8 -31 +; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1 +; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 + +define void @test_chars_mix(i8 signext %c1, i8 zeroext %c2, i8 zeroext %c3, i8 signext %c4) { +entry: + %c1.addr = alloca i8, align 1 + %c2.addr = alloca i8, align 1 + %c3.addr = alloca i8, align 1 + %c4.addr = alloca i8, align 1 + store i8 %c1, i8* %c1.addr, align 1 + store i8 %c2, i8* %c2.addr, align 1 + store i8 %c3, i8* %c3.addr, align 1 + store i8 %c4, i8* %c4.addr, align 1 + ret void +} + +; CHECK-LABEL: name: test_chars_mix + +; 32BIT: liveins: +; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r4', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r5', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r6', virtual-reg: '' } +; 32BIT: body: +; 32BIT-NEXT: bb.0.entry: +; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6 + +; 64BIT: liveins: +; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x4', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x5', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x6', virtual-reg: '' } +; 64BIT: body: +; 64BIT-NEXT: bb.0.entry: +; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6 + + +define void @call_test_ints() { +entry: + call void @test_ints(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8) + ret void +} + +; CHECK-LABEL: name: call_test_ints + +; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 +; 32BIT: $r3 = LI 1 +; 32BIT: $r4 = LI 2 +; 32BIT: $r5 = LI 3 +; 32BIT: $r6 = LI 4 +; 32BIT: $r7 = LI 5 +; 32BIT: $r8 = LI 6 +; 32BIT: $r9 = LI 7 +; 32BIT: $r10 = LI 8 +; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit killed $r7, implicit killed $r8, implicit killed $r9, implicit killed $r10, implicit $r2, implicit-def $r1 +; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 + +; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 +; 64BIT: $x3 = LI8 1 +; 64BIT: $x4 = LI8 2 +; 64BIT: $x5 = LI8 3 +; 64BIT: $x6 = LI8 4 +; 64BIT: $x7 = LI8 5 +; 64BIT: $x8 = LI8 6 +; 64BIT: $x9 = LI8 7 +; 64BIT: $x10 = LI8 8 +; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit killed $x9, implicit killed $x10, implicit $x2, implicit-def $r1 +; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 + +define void @test_ints(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) { +entry: + %a.addr = alloca i32, align 4 + %b.addr = alloca i32, align 4 + %c.addr = alloca i32, align 4 + %d.addr = alloca i32, align 4 + %e.addr = alloca i32, align 4 + %f.addr = alloca i32, align 4 + %g.addr = alloca i32, align 4 + %h.addr = alloca i32, align 4 + store i32 %a, i32* %a.addr, align 4 + store i32 %b, i32* %b.addr, align 4 + store i32 %c, i32* %c.addr, align 4 + store i32 %d, i32* %d.addr, align 4 + store i32 %e, i32* %e.addr, align 4 + store i32 %f, i32* %f.addr, align 4 + store i32 %g, i32* %g.addr, align 4 + store i32 %h, i32* %h.addr, align 4 + %0 = load i32, i32* %a.addr, align 4 + %1 = load i32, i32* %b.addr, align 4 + %add = add nsw i32 %0, %1 + %2 = load i32, i32* %c.addr, align 4 + %add1 = add nsw i32 %add, %2 + %3 = load i32, i32* %d.addr, align 4 + %add2 = add nsw i32 %add1, %3 + %4 = load i32, i32* %e.addr, align 4 + %add3 = add nsw i32 %add2, %4 + %5 = load i32, i32* %h.addr, align 4 + %add4 = add nsw i32 %add3, %5 + store i32 %add4, i32* %h.addr, align 4 + ret void +} + +; CHECK-LABEL: name: test_ints + +; 32BIT: liveins: +; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r4', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r5', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r6', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r7', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r8', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r9', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r10', virtual-reg: '' } +; 32BIT: body: | +; 32BIT-NEXT: bb.0.entry: +; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10 + +; 64BIT: liveins: +; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x4', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x5', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x6', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x7', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x8', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x9', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x10', virtual-reg: '' } +; 64BIT: body: | +; 64BIT-NEXT: bb.0.entry: +; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10 + +define void @call_test_ints_64bit() { +entry: + call void @test_ints_64bit(i32 signext 1, i32 zeroext 1, i32 zeroext 2147483648, i32 signext -2147483648, i32 signext 1, i32 signext 1, i32 signext 1, i32 signext 1) + ret void +} + +; CHECK-LABEL: name: call_test_ints_64bit + +; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 +; 64BIT: renamable $x3 = LI8 1 +; 64BIT: renamable $x5 = RLDICR killed renamable $x3, 31, 32 +; 64BIT: $x3 = LI8 1 +; 64BIT: $x4 = LI8 1 +; 64BIT: $x6 = LIS8 32768 +; 64BIT: $x7 = LI8 1 +; 64BIT: $x8 = LI8 1 +; 64BIT: $x9 = LI8 1 +; 64BIT: $x10 = LI8 1 +; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit killed $x4, implicit $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit killed $x9, implicit killed $x10, implicit $x2, implicit-def $r1 +; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 + +define void @test_ints_64bit(i32 signext %a, i32 zeroext %b, i32 zeroext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h) { +entry: + %a.addr = alloca i32, align 4 + %b.addr = alloca i32, align 4 + %c.addr = alloca i32, align 4 + %d.addr = alloca i32, align 4 + %e.addr = alloca i32, align 4 + %f.addr = alloca i32, align 4 + %g.addr = alloca i32, align 4 + %h.addr = alloca i32, align 4 + store i32 %a, i32* %a.addr, align 4 + store i32 %b, i32* %b.addr, align 4 + store i32 %c, i32* %c.addr, align 4 + store i32 %d, i32* %d.addr, align 4 + store i32 %e, i32* %e.addr, align 4 + store i32 %f, i32* %f.addr, align 4 + store i32 %g, i32* %g.addr, align 4 + store i32 %h, i32* %h.addr, align 4 + %0 = load i32, i32* %a.addr, align 4 + %1 = load i32, i32* %b.addr, align 4 + %add = add nsw i32 %0, %1 + %2 = load i32, i32* %c.addr, align 4 + %add1 = add nsw i32 %add, %2 + %3 = load i32, i32* %d.addr, align 4 + %add2 = add nsw i32 %add1, %3 + %4 = load i32, i32* %e.addr, align 4 + %add3 = add nsw i32 %add2, %4 + %5 = load i32, i32* %h.addr, align 4 + %add4 = add nsw i32 %add3, %5 + store i32 %add4, i32* %h.addr, align 4 + ret void +} + +; CHECK-LABEL: name: test_ints_64bit + +; 64BIT: liveins: +; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x4', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x5', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x6', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x7', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x8', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x9', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x10', virtual-reg: '' } +; 64BIT: body: | +; 64BIT-NEXT: bb.0.entry: +; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10 + +define void @call_test_i1() { +entry: + call void @test_i1(i1 1) + ret void +} + +; CHECK-LABEL: name: call_test_i1 + +; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 +; 32BIT: $r3 = LI 1 +; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit $r2, implicit-def $r1 +; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 + +; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 +; 64BIT: $x3 = LI8 1 +; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit $x2, implicit-def $r1 +; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 + +define void @test_i1(i1 %a) { +entry: + %a.addr = alloca i1, align 1 + store i1 %a, i1* %a.addr, align 1 + ret void +} + +; CHECK-LABEL: name: test_i1 + +; 32BIT: liveins: +; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' } +; 32BIT: body: | +; 32BIT-NEXT: bb.0.entry: +; 32BIT-NEXT: liveins: $r3 + +; 64BIT: liveins: +; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' } +; 64BIT: body: | +; 64BIT-NEXT: bb.0.entry: +; 64BIT-NEXT: liveins: $x3 + +define void @call_test_i64() { +entry: + call void @test_i64(i64 1, i64 2, i64 3, i64 4) + ret void +} + +; CHECK-LABEL: name: call_test_i64 + +; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 +; 32BIT: $r3 = LI 0 +; 32BIT: $r4 = LI 1 +; 32BIT: $r5 = LI 0 +; 32BIT: $r6 = LI 2 +; 32BIT: $r7 = LI 0 +; 32BIT: $r8 = LI 3 +; 32BIT: $r9 = LI 0 +; 32BIT: $r10 = LI 4 +; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit killed $r7, implicit killed $r8, implicit killed $r9, implicit killed $r10, implicit $r2, implicit-def $r1 +; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 + +; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 +; 64BIT: $x3 = LI8 1 +; 64BIT: $x4 = LI8 2 +; 64BIT: $x5 = LI8 3 +; 64BIT: $x6 = LI8 4 +; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1 +; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 + +define void @test_i64(i64 %a, i64 %b, i64 %c, i64 %d) { +entry: + %a.addr = alloca i64, align 8 + %b.addr = alloca i64, align 8 + %c.addr = alloca i64, align 8 + %d.addr = alloca i64, align 8 + store i64 %a, i64* %a.addr, align 8 + store i64 %b, i64* %b.addr, align 8 + store i64 %c, i64* %c.addr, align 8 + store i64 %d, i64* %d.addr, align 8 + %0 = load i64, i64* %a.addr, align 8 + %1 = load i64, i64* %b.addr, align 8 + %add = add nsw i64 %0, %1 + %2 = load i64, i64* %c.addr, align 8 + %add1 = add nsw i64 %add, %2 + %3 = load i64, i64* %d.addr, align 8 + %add2 = add nsw i64 %add1, %3 + store i64 %add2, i64* %d.addr, align 8 + ret void +} + +; CHECK-LABEL: name: test_i64 + +; 32BIT: liveins: +; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r4', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r5', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r6', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r7', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r8', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r9', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r10', virtual-reg: '' } +; 32BIT: body: | +; 32BIT-NEXT: bb.0.entry: +; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10 + +; 64BIT: liveins: +; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x4', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x5', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x6', virtual-reg: '' } +; 64BIT: body: | +; 64BIT-NEXT: bb.0.entry: +; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6 + +define void @call_test_int_ptr() { +entry: + %b = alloca i32, align 4 + store i32 0, i32* %b, align 4 + call void @test_int_ptr(i32* %b) + ret void +} + +; CHECK-LABEL: name: call_test_int_ptr + +; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 +; 32BIT: renamable $r3 = ADDI %stack.0.b, 0 +; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r2, implicit-def $r1 +; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 + +; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 +; 64BIT: renamable $x3 = ADDI8 %stack.0.b, 0 +; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 +; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 + +define void @test_int_ptr(i32* %a) { +entry: + %a.addr = alloca i32*, align 8 + store i32* %a, i32** %a.addr, align 8 + ret void +} + +; CHECK-LABEL: name: test_int_ptr + +; 32BIT: liveins: +; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' } +; 32BIT: body: | +; 32BIT-NEXT: bb.0.entry: +; 32BIT-NEXT: liveins: $r3 +; 32BIT: STW killed renamable $r3, 0, %stack.0.a.addr :: (store 4 into %ir.a.addr, align 8) + +; 64BIT: liveins: +; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' } +; 64BIT: body: | +; 64BIT-NEXT: bb.0.entry: +; 64BIT-NEXT: liveins: $x3 +; 64BIT: STD killed renamable $x3, 0, %stack.0.a.addr :: (store 8 into %ir.a.addr) + +; Function Attrs: noinline nounwind optnone +define i32 @caller(i32 %i) { +entry: + %i.addr = alloca i32, align 4 + %b = alloca i8, align 1 + store i32 %i, i32* %i.addr, align 4 + %0 = load i32, i32* %i.addr, align 4 + %cmp = icmp ne i32 %0, 0 + %frombool = zext i1 %cmp to i8 + store i8 %frombool, i8* %b, align 1 + %1 = load i8, i8* %b, align 1 + %tobool = trunc i8 %1 to i1 + %call = call i32 @call_test_bool(i1 zeroext %tobool) + ret i32 %call +} + +declare i32 @call_test_bool(i1 zeroext) + +; CHECK-LABEL: name: caller + +; 32BIT: liveins: +; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' } +; 32BIT: body: | +; 32BIT-NEXT: bb.0.entry: +; 32BIT: liveins: $r3 +; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 +; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r2, implicit-def $r1, implicit-def $r3 +; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 + +; 64BIT: liveins: +; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' } +; 64BIT: body: | +; 64BIT-NEXT: bb.0.entry: +; 64BIT-NEXT: liveins: $x3 +; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 +; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1, implicit-def $x3 +; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 + +@f1 = global float 0.000000e+00, align 4 +@d1 = global double 0.000000e+00, align 8 + +define void @call_test_floats() { +entry: + %0 = load float, float* @f1, align 4 + call void @test_floats(float %0, float %0, float %0) + ret void +} + +; CHECK-LABEL: name: call_test_floats{{.*}} + +; 32BIT: renamable $r3 = LWZtoc @f1, $r2 :: (load 4 from got) +; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r3 :: (dereferenceable load 4 from @f1) +; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 +; 32BIT-NEXT: $f2 = COPY renamable $f1 +; 32BIT-NEXT: $f3 = COPY renamable $f1 +; 32BIT-NEXT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit $r2, implicit-def $r1 +; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 + +; 64BIT: renamable $x3 = LDtoc @f1, $x2 :: (load 8 from got) +; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x3 :: (dereferenceable load 4 from @f1) +; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 +; 64BIT-NEXT: $f2 = COPY renamable $f1 +; 64BIT-NEXT: $f3 = COPY renamable $f1 +; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 + +define void @test_floats(float %f1, float %f2, float %f3) { +entry: + %f1.addr = alloca float, align 4 + %f2.addr = alloca float, align 4 + %f3.addr = alloca float, align 4 + store float %f1, float* %f1.addr, align 4 + store float %f2, float* %f2.addr, align 4 + store float %f3, float* %f3.addr, align 4 + ret void +} + +; CHECK-LABEL: name: test_floats{{.*}} + +; CHECK: liveins: +; CHECK-NEXT: - { reg: '$f1', virtual-reg: '' } +; CHECK-NEXT: - { reg: '$f2', virtual-reg: '' } +; CHECK-NEXT: - { reg: '$f3', virtual-reg: '' } +; CHECK: body: | +; CHECK-NEXT: bb.0.entry: +; CHECK-NEXT: liveins: $f1, $f2, $f3 + +define void @call_test_fpr_max() { +entry: + %0 = load double, double* @d1, align 8 + call void @test_fpr_max(double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0) + ret void +} + +; CHECK-LABEL: name: call_test_fpr_max{{.*}} + +; 32BIT: renamable $r3 = LWZtoc @d1, $r2 :: (load 4 from got) +; 32BIT-NEXT: renamable $f1 = LFD 0, killed renamable $r3 :: (dereferenceable load 8 from @d1) +; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 +; 32BIT-NEXT: $f2 = COPY renamable $f1 +; 32BIT-NEXT: $f3 = COPY renamable $f1 +; 32BIT-NEXT: $f4 = COPY renamable $f1 +; 32BIT-NEXT: $f5 = COPY renamable $f1 +; 32BIT-NEXT: $f6 = COPY renamable $f1 +; 32BIT-NEXT: $f7 = COPY renamable $f1 +; 32BIT-NEXT: $f8 = COPY renamable $f1 +; 32BIT-NEXT: $f9 = COPY renamable $f1 +; 32BIT-NEXT: $f10 = COPY renamable $f1 +; 32BIT-NEXT: $f11 = COPY renamable $f1 +; 32BIT-NEXT: $f12 = COPY renamable $f1 +; 32BIT-NEXT: $f13 = COPY renamable $f1 +; 32BIT-NEXT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit killed $f4, implicit killed $f5, implicit killed $f6, implicit killed $f7, implicit killed $f8, implicit killed $f9, implicit killed $f10, implicit killed $f11, implicit killed $f12, implicit killed $f13, implicit $r2, implicit-def $r1 +; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 + +; 64BIT: renamable $x3 = LDtoc @d1, $x2 :: (load 8 from got) +; 64BIT-NEXT: renamable $f1 = LFD 0, killed renamable $x3 :: (dereferenceable load 8 from @d1) +; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 +; 64BIT-NEXT: $f2 = COPY renamable $f1 +; 64BIT-NEXT: $f3 = COPY renamable $f1 +; 64BIT-NEXT: $f4 = COPY renamable $f1 +; 64BIT-NEXT: $f5 = COPY renamable $f1 +; 64BIT-NEXT: $f6 = COPY renamable $f1 +; 64BIT-NEXT: $f7 = COPY renamable $f1 +; 64BIT-NEXT: $f8 = COPY renamable $f1 +; 64BIT-NEXT: $f9 = COPY renamable $f1 +; 64BIT-NEXT: $f10 = COPY renamable $f1 +; 64BIT-NEXT: $f11 = COPY renamable $f1 +; 64BIT-NEXT: $f12 = COPY renamable $f1 +; 64BIT-NEXT: $f13 = COPY renamable $f1 +; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit killed $f4, implicit killed $f5, implicit killed $f6, implicit killed $f7, implicit killed $f8, implicit killed $f9, implicit killed $f10, implicit killed $f11, implicit killed $f12, implicit killed $f13, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 + +define void @test_fpr_max(double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %d10, double %d11, double %d12, double %d13) { +entry: + %d1.addr = alloca double, align 8 + %d2.addr = alloca double, align 8 + %d3.addr = alloca double, align 8 + %d4.addr = alloca double, align 8 + %d5.addr = alloca double, align 8 + %d6.addr = alloca double, align 8 + %d7.addr = alloca double, align 8 + %d8.addr = alloca double, align 8 + %d9.addr = alloca double, align 8 + %d10.addr = alloca double, align 8 + %d11.addr = alloca double, align 8 + %d12.addr = alloca double, align 8 + %d13.addr = alloca double, align 8 + store double %d1, double* %d1.addr, align 8 + store double %d2, double* %d2.addr, align 8 + store double %d3, double* %d3.addr, align 8 + store double %d4, double* %d4.addr, align 8 + store double %d5, double* %d5.addr, align 8 + store double %d6, double* %d6.addr, align 8 + store double %d7, double* %d7.addr, align 8 + store double %d8, double* %d8.addr, align 8 + store double %d9, double* %d9.addr, align 8 + store double %d10, double* %d10.addr, align 8 + store double %d11, double* %d11.addr, align 8 + store double %d12, double* %d12.addr, align 8 + store double %d13, double* %d13.addr, align 8 + %0 = load double, double* %d1.addr, align 8 + %1 = load double, double* %d2.addr, align 8 + %add = fadd double %0, %1 + %2 = load double, double* %d3.addr, align 8 + %add1 = fadd double %add, %2 + %3 = load double, double* %d4.addr, align 8 + %add2 = fadd double %add1, %3 + %4 = load double, double* %d5.addr, align 8 + %add3 = fadd double %add2, %4 + %5 = load double, double* %d6.addr, align 8 + %add4 = fadd double %add3, %5 + %6 = load double, double* %d7.addr, align 8 + %add5 = fadd double %add4, %6 + %7 = load double, double* %d8.addr, align 8 + %add6 = fadd double %add5, %7 + %8 = load double, double* %d9.addr, align 8 + %add7 = fadd double %add6, %8 + %9 = load double, double* %d10.addr, align 8 + %add8 = fadd double %add7, %9 + %10 = load double, double* %d11.addr, align 8 + %add9 = fadd double %add8, %10 + %11 = load double, double* %d12.addr, align 8 + %add10 = fadd double %add9, %11 + %12 = load double, double* %d13.addr, align 8 + %add11 = fadd double %add10, %12 + store double %add11, double* %d1.addr, align 8 + ret void +} + +; CHECK-LABEL: name: test_fpr_max{{.*}} + +; CHECK: liveins: +; CHECK-NEXT: - { reg: '$f1', virtual-reg: '' } +; CHECK-NEXT: - { reg: '$f2', virtual-reg: '' } +; CHECK-NEXT: - { reg: '$f3', virtual-reg: '' } +; CHECK-NEXT: - { reg: '$f4', virtual-reg: '' } +; CHECK-NEXT: - { reg: '$f5', virtual-reg: '' } +; CHECK-NEXT: - { reg: '$f6', virtual-reg: '' } +; CHECK-NEXT: - { reg: '$f7', virtual-reg: '' } +; CHECK-NEXT: - { reg: '$f8', virtual-reg: '' } +; CHECK-NEXT: - { reg: '$f9', virtual-reg: '' } +; CHECK-NEXT: - { reg: '$f10', virtual-reg: '' } +; CHECK-NEXT: - { reg: '$f11', virtual-reg: '' } +; CHECK-NEXT: - { reg: '$f12', virtual-reg: '' } +; CHECK-NEXT: - { reg: '$f13', virtual-reg: '' } +; CHECK: body: | +; CHECK-NEXT: bb.0.entry: +; CHECK-NEXT: liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13 + +define void @call_test_mix() { +entry: + %0 = load float, float* @f1, align 4 + %1 = load double, double* @d1, align 8 + call void @test_mix(float %0, i32 1, double %1, i8 signext 97) + ret void +} + +; CHECK-LABEL: name: call_test_mix{{.*}} + +; 32BIT: renamable $r3 = LWZtoc @f1, $r2 :: (load 4 from got) +; 32BIT-NEXT: renamable $r4 = LWZtoc @d1, $r2 :: (load 4 from got) +; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r3 :: (dereferenceable load 4 from @f1) +; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r4 :: (dereferenceable load 8 from @d1) +; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 +; 32BIT-NEXT: $r4 = LI 1 +; 32BIT-NEXT: $r7 = LI 97 +; 32BIT-NEXT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit $r4, implicit $f2, implicit killed $r7, implicit $r2, implicit-def $r1 +; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 + +; 64BIT: renamable $x3 = LDtoc @f1, $x2 :: (load 8 from got) +; 64BIT-NEXT: renamable $x4 = LDtoc @d1, $x2 :: (load 8 from got) +; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x3 :: (dereferenceable load 4 from @f1) +; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x4 :: (dereferenceable load 8 from @d1) +; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 +; 64BIT-NEXT: $x4 = LI8 1 +; 64BIT-NEXT: $x6 = LI8 97 +; 64BIT-NEXT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit $x4, implicit $f2, implicit killed $x6, implicit $x2, implicit-def $r1 +; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 + +define void @test_mix(float %f, i32 signext %i, double %d, i8 signext %c) { +entry: + %f.addr = alloca float, align 4 + %i.addr = alloca i32, align 4 + %d.addr = alloca double, align 8 + %c.addr = alloca i8, align 1 + store float %f, float* %f.addr, align 4 + store i32 %i, i32* %i.addr, align 4 + store double %d, double* %d.addr, align 8 + store i8 %c, i8* %c.addr, align 1 + ret void +} + +; CHECK-LABEL: name: test_mix{{.*}} + +; 32BIT: liveins: +; 32BIT-NEXT: - { reg: '$f1', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r4', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$f2', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r7', virtual-reg: '' } +; 32BIT: body: | +; 32BIT-NEXT: bb.0.entry: +; 32BIT-NEXT: liveins: $f1, $f2, $r4, $r7 + +; 64BIT: liveins: +; 64BIT-NEXT: - { reg: '$f1', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x4', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$f2', virtual-reg: '' } +; 64BIT-NEXT: - { reg: '$x6', virtual-reg: '' } +; 64BIT: body: | +; 64BIT-NEXT: bb.0.entry: +; 64BIT-NEXT: liveins: $f1, $f2, $x4, $x6 + + + define void @callee_mixed_ints(i32 %a, i8 signext %b, i32 %c, i16 signext %d, i64 %e) { + entry: + %a.addr = alloca i32, align 4 + %b.addr = alloca i8, align 1 + %c.addr = alloca i32, align 4 + %d.addr = alloca i16, align 2 + %e.addr = alloca i64, align 8 + store i32 %a, i32* %a.addr, align 4 + store i8 %b, i8* %b.addr, align 1 + store i32 %c, i32* %c.addr, align 4 + store i16 %d, i16* %d.addr, align 2 + store i64 %e, i64* %e.addr, align 8 + %0 = load i32, i32* %a.addr, align 4 + %1 = load i8, i8* %b.addr, align 1 + %conv = sext i8 %1 to i32 + %add = add nsw i32 %0, %conv + %2 = load i32, i32* %c.addr, align 4 + %add1 = add nsw i32 %add, %2 + %3 = load i16, i16* %d.addr, align 2 + %conv2 = sext i16 %3 to i32 + %add3 = add nsw i32 %add1, %conv2 + %conv4 = sext i32 %add3 to i64 + %4 = load i64, i64* %e.addr, align 8 + %add5 = add nsw i64 %conv4, %4 + store i64 %add5, i64* %e.addr, align 8 + ret void + } + +; CHECK-LABEL: name: callee_mixed_ints + +; 32BIT: liveins: +; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r4', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r5', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r6', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r7', virtual-reg: '' } +; 32BIT-NEXT: - { reg: '$r8', virtual-reg: '' } +; 32BIT: body: | +; 32BIT-NEXT: bb.0.entry: +; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6, $r7, $r8 + Index: llvm/test/CodeGen/PowerPC/aix_fpr_param.ll =================================================================== --- llvm/test/CodeGen/PowerPC/aix_fpr_param.ll +++ /dev/null @@ -1,150 +0,0 @@ -; RUN: llc -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp < %s | \ -; RUN: FileCheck --check-prefix=32BIT %s - -; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp < %s | \ -; RUN: FileCheck --check-prefix=64BIT %s - -@f1 = global float 0.000000e+00, align 4 -@d1 = global double 0.000000e+00, align 8 - -define void @call_test_float() { -entry: -; 32BIT: renamable $r3 = LWZtoc @f1, $r2 :: (load 4 from got) -; 32BIT: renamable $f1 = LFS 0, killed renamable $r3 :: (dereferenceable load 4 from @f1) -; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 -; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit $r2, implicit-def $r1 -; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 - -; 64BIT: renamable $x3 = LDtoc @f1, $x2 :: (load 8 from got) -; 64BIT: renamable $f1 = LFS 0, killed renamable $x3 :: (dereferenceable load 4 from @f1) -; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit $x2, implicit-def $r1 -; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 - - %0 = load float, float* @f1, align 4 - call void @test_float(float %0) - ret void -} - -declare void @test_float(float) - -define void @call_test_floats() { -entry: -; 32BIT: renamable $r3 = LWZtoc @f1, $r2 :: (load 4 from got) -; 32BIT: renamable $f1 = LFS 0, killed renamable $r3 :: (dereferenceable load 4 from @f1) -; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 -; 32BIT: $f2 = COPY renamable $f1 -; 32BIT: $f3 = COPY renamable $f1 -; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit $r2, implicit-def $r1 -; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 - -; 64BIT: renamable $x3 = LDtoc @f1, $x2 :: (load 8 from got) -; 64BIT: renamable $f1 = LFS 0, killed renamable $x3 :: (dereferenceable load 4 from @f1) -; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: $f2 = COPY renamable $f1 -; 64BIT: $f3 = COPY renamable $f1 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit $x2, implicit-def $r1 -; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 - - %0 = load float, float* @f1, align 4 - call void @test_floats(float %0, float %0, float %0) - ret void -} - -declare void @test_floats(float, float, float) - -define void @call_test_double() { -entry: -; 32BIT: renamable $r3 = LWZtoc @d1, $r2 :: (load 4 from got) -; 32BIT: renamable $f1 = LFD 0, killed renamable $r3 :: (dereferenceable load 8 from @d1) -; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 -; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit $r2, implicit-def $r1 -; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 - -; 64BIT: renamable $x3 = LDtoc @d1, $x2 :: (load 8 from got) -; 64BIT: renamable $f1 = LFD 0, killed renamable $x3 :: (dereferenceable load 8 from @d1) -; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit $x2, implicit-def $r1 -; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 - - %0 = load double, double* @d1, align 8 - call void @test_double(double %0) - ret void -} - -declare void @test_double(double) - -define void @call_test_fpr_max() { -entry: -; 32BIT: renamable $r3 = LWZtoc @d1, $r2 :: (load 4 from got) -; 32BIT: renamable $f1 = LFD 0, killed renamable $r3 :: (dereferenceable load 8 from @d1) -; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 -; 32BIT: $f2 = COPY renamable $f1 -; 32BIT: $f3 = COPY renamable $f1 -; 32BIT: $f4 = COPY renamable $f1 -; 32BIT: $f5 = COPY renamable $f1 -; 32BIT: $f6 = COPY renamable $f1 -; 32BIT: $f7 = COPY renamable $f1 -; 32BIT: $f8 = COPY renamable $f1 -; 32BIT: $f9 = COPY renamable $f1 -; 32BIT: $f10 = COPY renamable $f1 -; 32BIT: $f11 = COPY renamable $f1 -; 32BIT: $f12 = COPY renamable $f1 -; 32BIT: $f13 = COPY renamable $f1 -; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit killed $f4, implicit killed $f5, implicit killed $f6, implicit killed $f7, implicit killed $f8, implicit killed $f9, implicit killed $f10, implicit killed $f11, implicit killed $f12, implicit killed $f13, implicit $r2, implicit-def $r1 -; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 - -; 64BIT: renamable $x3 = LDtoc @d1, $x2 :: (load 8 from got) -; 64BIT: renamable $f1 = LFD 0, killed renamable $x3 :: (dereferenceable load 8 from @d1) -; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: $f2 = COPY renamable $f1 -; 64BIT: $f3 = COPY renamable $f1 -; 64BIT: $f4 = COPY renamable $f1 -; 64BIT: $f5 = COPY renamable $f1 -; 64BIT: $f6 = COPY renamable $f1 -; 64BIT: $f7 = COPY renamable $f1 -; 64BIT: $f8 = COPY renamable $f1 -; 64BIT: $f9 = COPY renamable $f1 -; 64BIT: $f10 = COPY renamable $f1 -; 64BIT: $f11 = COPY renamable $f1 -; 64BIT: $f12 = COPY renamable $f1 -; 64BIT: $f13 = COPY renamable $f1 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit killed $f4, implicit killed $f5, implicit killed $f6, implicit killed $f7, implicit killed $f8, implicit killed $f9, implicit killed $f10, implicit killed $f11, implicit killed $f12, implicit killed $f13, implicit $x2, implicit-def $r1 -; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 - - %0 = load double, double* @d1, align 8 - call void @test_fpr_max(double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0) - ret void -} - -declare void @test_fpr_max(double, double, double, double, double, double, double, double, double, double, double, double, double) - -define void @call_test_mix() { -entry: -; 32BIT: renamable $r3 = LWZtoc @f1, $r2 :: (load 4 from got) -; 32BIT: renamable $r4 = LWZtoc @d1, $r2 :: (load 4 from got) -; 32BIT: renamable $f1 = LFS 0, killed renamable $r3 :: (dereferenceable load 4 from @f1) -; 32BIT: renamable $f2 = LFD 0, killed renamable $r4 :: (dereferenceable load 8 from @d1) -; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 -; 32BIT: $r4 = LI 1 -; 32BIT: $r7 = LI 97 -; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit $r4, implicit $f2, implicit killed $r7, implicit $r2, implicit-def $r1 -; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 - -; 64BIT: renamable $x3 = LDtoc @f1, $x2 :: (load 8 from got) -; 64BIT: renamable $x4 = LDtoc @d1, $x2 :: (load 8 from got) -; 64BIT: renamable $f1 = LFS 0, killed renamable $x3 :: (dereferenceable load 4 from @f1) -; 64BIT: renamable $f2 = LFD 0, killed renamable $x4 :: (dereferenceable load 8 from @d1) -; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: $x4 = LI8 1 -; 64BIT: $x6 = LI8 97 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit $x4, implicit $f2, implicit killed $x6, implicit $x2, implicit-def $r1 -; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 - - %0 = load float, float* @f1, align 4 - %1 = load double, double* @d1, align 8 - call void @test_mix(float %0, i32 1, double %1, i8 signext 97) - ret void -} - -declare void @test_mix(float, i32, double, i8 signext) Index: llvm/test/CodeGen/PowerPC/aix_gpr_param.ll =================================================================== --- llvm/test/CodeGen/PowerPC/aix_gpr_param.ll +++ /dev/null @@ -1,199 +0,0 @@ -; RUN: llc -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp < %s | \ -; RUN: FileCheck --check-prefix=32BIT %s - -; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp < %s | \ -; RUN: FileCheck --check-prefix=64BIT %s - -define void @call_test_char() { -entry: -; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 -; 32BIT: $r3 = LI 97 -; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit $r2, implicit-def $r1 -; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 - -; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: $x3 = LI8 97 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit $x2, implicit-def $r1 -; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 - - call void @test_char(i8 signext 97) - ret void -} - -define void @call_test_chars() { -entry: -; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 -; 32BIT: $r3 = LI 97 -; 32BIT: $r4 = LI 97 -; 32BIT: $r5 = LI 97 -; 32BIT: $r6 = LI 97 -; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit $r2, implicit-def $r1 -; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 - -; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: $x3 = LI8 97 -; 64BIT: $x4 = LI8 97 -; 64BIT: $x5 = LI8 97 -; 64BIT: $x6 = LI8 97 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1 -; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 - - call void @test_chars(i8 signext 97, i8 signext 97, i8 signext 97, i8 signext 97) - ret void -} - -define void @call_test_chars_mix() { -entry: -; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 -; 32BIT: $r3 = LI 97 -; 32BIT: $r4 = LI 225 -; 32BIT: $r5 = LI 97 -; 32BIT: $r6 = LI -31 -; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit $r2, implicit-def $r1 -; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 - -; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: $x3 = LI8 97 -; 64BIT: $x4 = LI8 225 -; 64BIT: $x5 = LI8 97 -; 64BIT: $x6 = LI8 -31 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1 -; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 - - call void @test_chars_mix(i8 signext 97, i8 zeroext -31, i8 zeroext 97, i8 signext -31) - ret void -} - -define void @call_test_int() { -entry: -; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 -; 32BIT: $r3 = LI 1 -; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit $r2, implicit-def $r1 -; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 - -; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: $x3 = LI8 1 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit $x2, implicit-def $r1 -; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 - - call void @test_int(i32 1) - ret void -} - -define void @call_test_ints() { -entry: -; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 -; 32BIT: $r3 = LI 1 -; 32BIT: $r4 = LI 1 -; 32BIT: $r5 = LI 1 -; 32BIT: $r6 = LI 1 -; 32BIT: $r7 = LI 1 -; 32BIT: $r8 = LI 1 -; 32BIT: $r9 = LI 1 -; 32BIT: $r10 = LI 1 -; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit killed $r7, implicit killed $r8, implicit killed $r9, implicit killed $r10, implicit $r2, implicit-def $r1 -; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 - -; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: $x3 = LI8 1 -; 64BIT: $x4 = LI8 1 -; 64BIT: $x5 = LI8 1 -; 64BIT: $x6 = LI8 1 -; 64BIT: $x7 = LI8 1 -; 64BIT: $x8 = LI8 1 -; 64BIT: $x9 = LI8 1 -; 64BIT: $x10 = LI8 1 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit killed $x9, implicit killed $x10, implicit $x2, implicit-def $r1 -; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 - - call void @test_ints(i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1) - ret void -} - -define void @call_test_ints_64bit() { -entry: -; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: renamable $x3 = LI8 1 -; 64BIT: renamable $x5 = RLDICR killed renamable $x3, 31, 32 -; 64BIT: $x3 = LI8 1 -; 64BIT: $x4 = LI8 1 -; 64BIT: $x6 = LIS8 32768 -; 64BIT: $x7 = LI8 1 -; 64BIT: $x8 = LI8 1 -; 64BIT: $x9 = LI8 1 -; 64BIT: $x10 = LI8 1 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit killed $x4, implicit $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit killed $x9, implicit killed $x10, implicit $x2, implicit-def $r1 -; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 - - call void @test_ints_64bit(i32 signext 1, i32 zeroext 1, i32 zeroext 2147483648, i32 signext -2147483648, i32 signext 1, i32 signext 1, i32 signext 1, i32 signext 1) - ret void -} - -define void @call_test_i1() { -entry: -; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 -; 32BIT: $r3 = LI 1 -; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit $r2, implicit-def $r1 -; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 - -; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: $x3 = LI8 1 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit $x2, implicit-def $r1 -; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 - - call void @test_i1(i1 1) - ret void -} - -define void @call_test_i64() { -entry: -; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 -; 32BIT: $r3 = LI 0 -; 32BIT: $r4 = LI 1 -; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit killed $r4, implicit $r2, implicit-def $r1 -; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 - -; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: $x3 = LI8 1 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit $x2, implicit-def $r1 -; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 - - call void @test_i64(i64 1) - ret void -} - -define void @call_test_int_ptr() { -entry: - %b = alloca i32, align 4 -; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1 -; 32BIT: renamable $r3 = ADDI %stack.0.b, 0 -; 32BIT: BL_NOP , csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r2, implicit-def $r1 -; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1 - -; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1 -; 64BIT: renamable $x3 = ADDI8 %stack.0.b, 0 -; 64BIT: BL8_NOP , csr_aix64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1 -; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1 - - store i32 0, i32* %b, align 4 - call void @test_int_ptr(i32* %b) - ret void -} - -declare void @test_char(i8 signext) - -declare void @test_chars(i8 signext, i8 signext, i8 signext, i8 signext) - -declare void @test_chars_mix(i8 signext, i8 zeroext, i8 zeroext, i8 signext) - -declare void @test_int(i32) - -declare void @test_ints(i32, i32, i32, i32, i32, i32, i32, i32) - -declare void @test_ints_64bit(i32 signext, i32 zeroext, i32 zeroext, i32 signext, i32 signext, i32 signext, i32 signext, i32 signext) - -declare void @test_i1(i1) - -declare void @test_i64(i64) - -declare void @test_int_ptr(i32*) Index: llvm/test/CodeGen/PowerPC/lower-globaladdr32-aix-asm.ll =================================================================== --- llvm/test/CodeGen/PowerPC/lower-globaladdr32-aix-asm.ll +++ llvm/test/CodeGen/PowerPC/lower-globaladdr32-aix-asm.ll @@ -1,7 +1,7 @@ -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ ; RUN: -code-model=small < %s | FileCheck %s --check-prefixes=CHECK,SMALL -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \ ; RUN: -code-model=large < %s | FileCheck %s --check-prefixes=CHECK,LARGE @a = common global i32 0 Index: llvm/test/CodeGen/PowerPC/lower-globaladdr64-aix-asm.ll =================================================================== --- llvm/test/CodeGen/PowerPC/lower-globaladdr64-aix-asm.ll +++ llvm/test/CodeGen/PowerPC/lower-globaladdr64-aix-asm.ll @@ -1,7 +1,7 @@ -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ ; RUN: -code-model=small < %s | FileCheck %s --check-prefixes=CHECK,SMALL -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \ ; RUN: -code-model=large < %s | FileCheck %s --check-prefixes=CHECK,LARGE @a = common global i32 0