Index: llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
===================================================================
--- llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
+++ llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
@@ -366,6 +366,9 @@
 negativeOffsetOpcode(unsigned opcode)
 {
   switch (opcode) {
+  default:
+    llvm_unreachable("unknown thumb2 opcode!");
+
   case ARM::t2LDRi12:   return ARM::t2LDRi8;
   case ARM::t2LDRHi12:  return ARM::t2LDRHi8;
   case ARM::t2LDRBi12:  return ARM::t2LDRBi8;
@@ -386,18 +389,16 @@
   case ARM::t2STRHi8:
   case ARM::t2PLDi8:
     return opcode;
-
-  default:
-    break;
   }
-
-  return 0;
 }
 
 static unsigned
 positiveOffsetOpcode(unsigned opcode)
 {
   switch (opcode) {
+  default:
+    llvm_unreachable("unknown thumb2 opcode!");
+
   case ARM::t2LDRi8:   return ARM::t2LDRi12;
   case ARM::t2LDRHi8:  return ARM::t2LDRHi12;
   case ARM::t2LDRBi8:  return ARM::t2LDRBi12;
@@ -418,18 +419,16 @@
   case ARM::t2STRHi12:
   case ARM::t2PLDi12:
     return opcode;
-
-  default:
-    break;
   }
-
-  return 0;
 }
 
 static unsigned
 immediateOffsetOpcode(unsigned opcode)
 {
   switch (opcode) {
+  default:
+    llvm_unreachable("unknown thumb2 opcode!");
+
   case ARM::t2LDRs:   return ARM::t2LDRi12;
   case ARM::t2LDRHs:  return ARM::t2LDRHi12;
   case ARM::t2LDRBs:  return ARM::t2LDRBi12;
@@ -459,12 +458,7 @@
   case ARM::t2STRHi8:
   case ARM::t2PLDi8:
     return opcode;
-
-  default:
-    break;
   }
-
-  return 0;
 }
 
 bool llvm::rewriteT2FrameIndex(MachineInstr &MI, unsigned FrameRegIdx,