Index: lib/Target/AMDGPU/SIInstrInfo.td =================================================================== --- lib/Target/AMDGPU/SIInstrInfo.td +++ lib/Target/AMDGPU/SIInstrInfo.td @@ -996,6 +996,12 @@ let ParserMatchClass = MatchClass; } +class NamedOperandBit_0 : + OperandWithDefaultOps { + let PrintMethod = "print"#Name; + let ParserMatchClass = MatchClass; +} + class NamedOperandU8 : Operand { let PrintMethod = "print"#Name; let ParserMatchClass = MatchClass; @@ -1011,6 +1017,12 @@ let ParserMatchClass = MatchClass; } +class NamedOperandU32_0 : + OperandWithDefaultOps { + let PrintMethod = "print"#Name; + let ParserMatchClass = MatchClass; +} + class NamedOperandU32Default0 : OperandWithDefaultOps { let PrintMethod = "print"#Name; @@ -1031,7 +1043,13 @@ def gds : NamedOperandBit<"GDS", NamedMatchClass<"GDS">>; def omod : NamedOperandU32<"OModSI", NamedMatchClass<"OModSI">>; +def omod0 : NamedOperandU32_0<"OModSI", NamedMatchClass<"OModSI">>; + +// We need to make the cases with a default of 0 distinct from no +// default to help deal with some cases where the operand appears +// before a mandatory operand. def clampmod : NamedOperandBit<"ClampSI", NamedMatchClass<"ClampSI">>; +def clampmod0 : NamedOperandBit_0<"ClampSI", NamedMatchClass<"ClampSI">>; def highmod : NamedOperandBit<"High", NamedMatchClass<"High">>; def DLC : NamedOperandBit<"DLC", NamedMatchClass<"DLC">>; @@ -1587,11 +1605,11 @@ !if (!eq(HasModifiers, 1), // VOP1 with modifiers (ins Src0Mod:$src0_modifiers, Src0RC:$src0, - clampmod:$clamp, omod:$omod) + clampmod0:$clamp, omod0:$omod) /* else */, // VOP1 without modifiers !if (!eq(HasIntClamp, 1), - (ins Src0RC:$src0, clampmod:$clamp), + (ins Src0RC:$src0, clampmod0:$clamp), (ins Src0RC:$src0)) /* endif */ ), !if (!eq(NumSrcArgs, 2), @@ -1600,14 +1618,14 @@ !if( !eq(HasOMod, 1), (ins Src0Mod:$src0_modifiers, Src0RC:$src0, Src1Mod:$src1_modifiers, Src1RC:$src1, - clampmod:$clamp, omod:$omod), + clampmod0:$clamp, omod0:$omod), (ins Src0Mod:$src0_modifiers, Src0RC:$src0, Src1Mod:$src1_modifiers, Src1RC:$src1, - clampmod:$clamp)) + clampmod0:$clamp)) /* else */, // VOP2 without modifiers !if (!eq(HasIntClamp, 1), - (ins Src0RC:$src0, Src1RC:$src1, clampmod:$clamp), + (ins Src0RC:$src0, Src1RC:$src1, clampmod0:$clamp), (ins Src0RC:$src0, Src1RC:$src1)) /* endif */ ) @@ -1619,12 +1637,12 @@ (ins Src0Mod:$src0_modifiers, Src0RC:$src0, Src1Mod:$src1_modifiers, Src1RC:$src1, Src2Mod:$src2_modifiers, Src2RC:$src2, - clampmod:$clamp, omod:$omod), + clampmod0:$clamp, omod0:$omod), !if (!eq(HasIntClamp, 1), (ins Src0Mod:$src0_modifiers, Src0RC:$src0, Src1Mod:$src1_modifiers, Src1RC:$src1, Src2Mod:$src2_modifiers, Src2RC:$src2, - clampmod:$clamp), + clampmod0:$clamp), (ins Src0Mod:$src0_modifiers, Src0RC:$src0, Src1Mod:$src1_modifiers, Src1RC:$src1, Src2Mod:$src2_modifiers, Src2RC:$src2))), @@ -1632,18 +1650,18 @@ !if (!eq(HasOMod, 1), (ins Src0Mod:$src0_modifiers, Src0RC:$src0, Src1Mod:$src1_modifiers, Src1RC:$src1, - Src2RC:$src2, clampmod:$clamp, omod:$omod), + Src2RC:$src2, clampmod0:$clamp, omod0:$omod), !if (!eq(HasIntClamp, 1), (ins Src0Mod:$src0_modifiers, Src0RC:$src0, Src1Mod:$src1_modifiers, Src1RC:$src1, - Src2RC:$src2, clampmod:$clamp), + Src2RC:$src2, clampmod0:$clamp), (ins Src0Mod:$src0_modifiers, Src0RC:$src0, Src1Mod:$src1_modifiers, Src1RC:$src1, Src2RC:$src2)))) /* else */, // VOP3 without modifiers !if (!eq(HasIntClamp, 1), - (ins Src0RC:$src0, Src1RC:$src1, Src2RC:$src2, clampmod:$clamp), + (ins Src0RC:$src0, Src1RC:$src1, Src2RC:$src2, clampmod0:$clamp), (ins Src0RC:$src0, Src1RC:$src1, Src2RC:$src2)) /* endif */ )))); }