diff --git a/llvm/lib/Target/Mips/CMakeLists.txt b/llvm/lib/Target/Mips/CMakeLists.txt --- a/llvm/lib/Target/Mips/CMakeLists.txt +++ b/llvm/lib/Target/Mips/CMakeLists.txt @@ -13,6 +13,7 @@ tablegen(LLVM MipsGenRegisterBank.inc -gen-register-bank) tablegen(LLVM MipsGenRegisterInfo.inc -gen-register-info) tablegen(LLVM MipsGenSubtargetInfo.inc -gen-subtarget) +tablegen(LLVM MipsGenExegesis.inc -gen-exegesis) add_public_tablegen_target(MipsCommonTableGen) diff --git a/llvm/lib/Target/Mips/Mips.td b/llvm/lib/Target/Mips/Mips.td --- a/llvm/lib/Target/Mips/Mips.td +++ b/llvm/lib/Target/Mips/Mips.td @@ -263,3 +263,9 @@ let AssemblyParserVariants = [MipsAsmParserVariant]; let AllowRegisterRenaming = 1; } + +//===----------------------------------------------------------------------===// +// Pfm Counters +//===----------------------------------------------------------------------===// + +include "MipsPfmCounters.td" diff --git a/llvm/lib/Target/Mips/MipsPfmCounters.td b/llvm/lib/Target/Mips/MipsPfmCounters.td new file mode 100644 --- /dev/null +++ b/llvm/lib/Target/Mips/MipsPfmCounters.td @@ -0,0 +1,18 @@ +//===-- MipsPfmCounters.td - Mips Hardware Counters --------*- tablegen -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This describes the available hardware counters for Mips. +// +//===----------------------------------------------------------------------===// + +def CpuCyclesPfmCounter : PfmCounter<"CYCLES">; + +def DefaultPfmCounters : ProcPfmCounters { + let CycleCounter = CpuCyclesPfmCounter; +} +def : PfmCountersDefaultBinding; diff --git a/llvm/tools/llvm-exegesis/lib/Assembler.cpp b/llvm/tools/llvm-exegesis/lib/Assembler.cpp --- a/llvm/tools/llvm-exegesis/lib/Assembler.cpp +++ b/llvm/tools/llvm-exegesis/lib/Assembler.cpp @@ -227,9 +227,11 @@ ET.addTargetSpecificPasses(PM); TPC->printAndVerify("After ExegesisTarget::addTargetSpecificPasses"); // Adding the following passes: + // - postrapseudos: expands pseudo return instructions used on some targets. // - machineverifier: checks that the MachineFunction is well formed. // - prologepilog: saves and restore callee saved registers. - for (const char *PassName : {"machineverifier", "prologepilog"}) + for (const char *PassName : + {"postrapseudos", "machineverifier", "prologepilog"}) if (addPass(PM, PassName, *TPC)) report_fatal_error("Unable to add a mandatory pass"); TPC->setInitialized(); diff --git a/llvm/tools/llvm-exegesis/lib/CMakeLists.txt b/llvm/tools/llvm-exegesis/lib/CMakeLists.txt --- a/llvm/tools/llvm-exegesis/lib/CMakeLists.txt +++ b/llvm/tools/llvm-exegesis/lib/CMakeLists.txt @@ -12,6 +12,10 @@ add_subdirectory(PowerPC) set(TARGETS_TO_APPEND "${TARGETS_TO_APPEND} PowerPC") endif() +if (LLVM_TARGETS_TO_BUILD MATCHES "Mips") + add_subdirectory(Mips) + set(TARGETS_TO_APPEND "${TARGETS_TO_APPEND} Mips") +endif() set(LLVM_EXEGESIS_TARGETS "${LLVM_EXEGESIS_TARGETS} ${TARGETS_TO_APPEND}" PARENT_SCOPE) diff --git a/llvm/tools/llvm-exegesis/lib/Mips/CMakeLists.txt b/llvm/tools/llvm-exegesis/lib/Mips/CMakeLists.txt new file mode 100644 --- /dev/null +++ b/llvm/tools/llvm-exegesis/lib/Mips/CMakeLists.txt @@ -0,0 +1,18 @@ +include_directories( + ${LLVM_MAIN_SRC_DIR}/lib/Target/Mips + ${LLVM_BINARY_DIR}/lib/Target/Mips + ) + +add_library(LLVMExegesisMips + STATIC + Target.cpp + ) + +llvm_update_compile_flags(LLVMExegesisMips) +llvm_map_components_to_libnames(libs + Mips + Exegesis + ) + +target_link_libraries(LLVMExegesisMips ${libs}) +set_target_properties(LLVMExegesisMips PROPERTIES FOLDER "Libraries") diff --git a/llvm/tools/llvm-exegesis/lib/Mips/LLVMBuild.txt b/llvm/tools/llvm-exegesis/lib/Mips/LLVMBuild.txt new file mode 100644 --- /dev/null +++ b/llvm/tools/llvm-exegesis/lib/Mips/LLVMBuild.txt @@ -0,0 +1,21 @@ +;===- ./tools/llvm-exegesis/lib/Mips/LLVMBuild.txt -------------*- Conf -*--===; +; +; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +; See https://llvm.org/LICENSE.txt for license information. +; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[component_0] +type = Library +name = ExegesisMips +parent = Libraries +required_libraries = Mips diff --git a/llvm/tools/llvm-exegesis/lib/Mips/Target.cpp b/llvm/tools/llvm-exegesis/lib/Mips/Target.cpp new file mode 100644 --- /dev/null +++ b/llvm/tools/llvm-exegesis/lib/Mips/Target.cpp @@ -0,0 +1,67 @@ +//===-- Target.cpp ----------------------------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +#include "../Target.h" +#include "../Latency.h" +#include "Mips.h" +#include "MipsRegisterInfo.h" + +namespace llvm { +namespace exegesis { + +#include "MipsGenExegesis.inc" + +namespace { +class ExegesisMipsTarget : public ExegesisTarget { +public: + ExegesisMipsTarget() : ExegesisTarget(MipsCpuPfmCounters) {} + +private: + std::vector setRegTo(const MCSubtargetInfo &STI, unsigned Reg, + const APInt &Value) const override; + bool matchesArch(Triple::ArchType Arch) const override { + return Arch == Triple::mips || Arch == Triple::mipsel || + Arch == Triple::mips64 || Arch == Triple::mips64el; + } +}; +} // end anonymous namespace + +// Generates instruction to load an immediate value into a register. +static MCInst loadImmediate(unsigned Reg, unsigned RegBitWidth, + const APInt &Value) { + if (Value.getActiveBits() > 16) + llvm_unreachable("Not implemented for Values wider than 16 bits"); + if (Value.getBitWidth() > RegBitWidth) + llvm_unreachable("Value must fit in the Register"); + return MCInstBuilder(Mips::ORi) + .addReg(Reg) + .addReg(Mips::ZERO) + .addImm(Value.getZExtValue()); +} + +std::vector ExegesisMipsTarget::setRegTo(const MCSubtargetInfo &STI, + unsigned Reg, + const APInt &Value) const { + if (Mips::GPR32RegClass.contains(Reg)) + return {loadImmediate(Reg, 32, Value)}; + if (Mips::GPR64RegClass.contains(Reg)) + return {loadImmediate(Reg, 64, Value)}; + errs() << "setRegTo is not implemented, results will be unreliable\n"; + return {}; +} + +static ExegesisTarget *getTheExegesisMipsTarget() { + static ExegesisMipsTarget Target; + return &Target; +} + +void InitializeMipsExegesisTarget() { + ExegesisTarget::registerTarget(getTheExegesisMipsTarget()); +} + +} // namespace exegesis +} // namespace llvm diff --git a/llvm/unittests/tools/llvm-exegesis/CMakeLists.txt b/llvm/unittests/tools/llvm-exegesis/CMakeLists.txt --- a/llvm/unittests/tools/llvm-exegesis/CMakeLists.txt +++ b/llvm/unittests/tools/llvm-exegesis/CMakeLists.txt @@ -30,3 +30,6 @@ if(LLVM_TARGETS_TO_BUILD MATCHES "PowerPC") add_subdirectory(PowerPC) endif() +if(LLVM_TARGETS_TO_BUILD MATCHES "Mips") + add_subdirectory(Mips) +endif() diff --git a/llvm/unittests/tools/llvm-exegesis/Mips/CMakeLists.txt b/llvm/unittests/tools/llvm-exegesis/Mips/CMakeLists.txt new file mode 100644 --- /dev/null +++ b/llvm/unittests/tools/llvm-exegesis/Mips/CMakeLists.txt @@ -0,0 +1,21 @@ +include_directories( + ${LLVM_MAIN_SRC_DIR}/lib/Target/Mips + ${LLVM_BINARY_DIR}/lib/Target/Mips + ${LLVM_MAIN_SRC_DIR}/tools/llvm-exegesis/lib + ) + +set(LLVM_LINK_COMPONENTS + MC + MCParser + Object + Support + Symbolize + Mips + ) + +add_llvm_unittest(LLVMExegesisMipsTests + TargetTest.cpp + ) +target_link_libraries(LLVMExegesisMipsTests PRIVATE + LLVMExegesis + LLVMExegesisMips) diff --git a/llvm/unittests/tools/llvm-exegesis/Mips/TargetTest.cpp b/llvm/unittests/tools/llvm-exegesis/Mips/TargetTest.cpp new file mode 100644 --- /dev/null +++ b/llvm/unittests/tools/llvm-exegesis/Mips/TargetTest.cpp @@ -0,0 +1,91 @@ +//===-- TargetTest.cpp ------------------------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "Target.h" + +#include +#include + +#include "MCTargetDesc/MipsMCTargetDesc.h" +#include "llvm/Support/TargetRegistry.h" +#include "llvm/Support/TargetSelect.h" +#include "gmock/gmock.h" +#include "gtest/gtest.h" + +namespace llvm { +namespace exegesis { + +void InitializeMipsExegesisTarget(); + +namespace { + +using testing::AllOf; +using testing::ElementsAre; +using testing::Eq; +using testing::Matcher; +using testing::Property; + +Matcher IsImm(int64_t Value) { + return AllOf(Property(&MCOperand::isImm, Eq(true)), + Property(&MCOperand::getImm, Eq(Value))); +} + +Matcher IsReg(unsigned Reg) { + return AllOf(Property(&MCOperand::isReg, Eq(true)), + Property(&MCOperand::getReg, Eq(Reg))); +} + +Matcher OpcodeIs(unsigned Opcode) { + return Property(&MCInst::getOpcode, Eq(Opcode)); +} + +Matcher IsLoadLowImm(int64_t Reg, int64_t Value) { + return AllOf(OpcodeIs(Mips::ORi), + ElementsAre(IsReg(Reg), IsReg(Mips::ZERO), IsImm(Value))); +} + +constexpr const char kTriple[] = "mips-unknown-linux"; + +class MipsTargetTest : public ::testing::Test { +protected: + MipsTargetTest() : State(kTriple, "mips32", "") {} + + static void SetUpTestCase() { + LLVMInitializeMipsTargetInfo(); + LLVMInitializeMipsTarget(); + LLVMInitializeMipsTargetMC(); + InitializeMipsExegesisTarget(); + } + + std::vector setRegTo(unsigned Reg, const APInt &Value) { + return State.getExegesisTarget().setRegTo(State.getSubtargetInfo(), Reg, + Value); + } + + LLVMState State; +}; + +TEST_F(MipsTargetTest, SetRegToConstant) { + const uint16_t Value = 0xFFFFU; + const unsigned Reg = Mips::T0; + EXPECT_THAT(setRegTo(Reg, APInt(16, Value)), + ElementsAre(IsLoadLowImm(Reg, Value))); +} + +TEST_F(MipsTargetTest, DefaultPfmCounters) { + const std::string Expected = "CYCLES"; + EXPECT_EQ(State.getExegesisTarget().getPfmCounters("").CycleCounter, + Expected); + EXPECT_EQ( + State.getExegesisTarget().getPfmCounters("unknown_cpu").CycleCounter, + Expected); +} + +} // namespace +} // namespace exegesis +} // namespace llvm