diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp --- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp @@ -447,6 +447,9 @@ const AArch64Subtarget &Subtarget = MF.getSubtarget(); const AArch64RegisterInfo *RegInfo = Subtarget.getRegisterInfo(); + if (MF.getFunction().hasOptSize()) + return false; + if (AFI->getLocalStackSize() == 0) return false; diff --git a/llvm/test/CodeGen/AArch64/arm64-never-combine-csr-local-stack-bump-for-size.ll b/llvm/test/CodeGen/AArch64/arm64-never-combine-csr-local-stack-bump-for-size.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/arm64-never-combine-csr-local-stack-bump-for-size.ll @@ -0,0 +1,25 @@ +; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -disable-post-ra | FileCheck %s + +; CHECK-LABEL: main: +; CHECK: stp x29, x30, [sp, #-16]! +; CHECK-NEXT: stp xzr, xzr, [sp, #-16]! +; CHECK: adrp x0, l_.str@PAGE +; CHECK: add x0, x0, l_.str@PAGEOFF +; CHECK-NEXT: bl _puts +; CHECK-NEXT: add sp, sp, #16 +; CHECK-NEXT: ldp x29, x30, [sp], #16 +; CHECK-NEXT: ret + +@.str = private unnamed_addr constant [7 x i8] c"hello\0A\00" + +define i32 @main() nounwind ssp optsize { +entry: + %local1 = alloca i64, align 8 + %local2 = alloca i64, align 8 + store i64 0, i64* %local1 + store i64 0, i64* %local2 + %call = call i32 @puts(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i32 0, i32 0)) + ret i32 %call +} + +declare i32 @puts(i8*)