Index: llvm/trunk/test/tools/llvm-mca/ARM/m4-targetfeatures.s =================================================================== --- llvm/trunk/test/tools/llvm-mca/ARM/m4-targetfeatures.s +++ llvm/trunk/test/tools/llvm-mca/ARM/m4-targetfeatures.s @@ -0,0 +1,29 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=arm-none-none-eabi -mcpu=cortex-m4 -mattr=+fp64 -instruction-tables < %s | FileCheck %s + +vadd.f32 s0, s2, s2 +vadd.f64 d0, d2, d2 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 1.00 vadd.f32 s0, s2, s2 +# CHECK-NEXT: 1 1 1.00 vadd.f64 d0, d2, d2 + +# CHECK: Resources: +# CHECK-NEXT: [0] - M4Unit + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] +# CHECK-NEXT: 2.00 + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] Instructions: +# CHECK-NEXT: 1.00 vadd.f32 s0, s2, s2 +# CHECK-NEXT: 1.00 vadd.f64 d0, d2, d2 Index: llvm/trunk/tools/llvm-mca/llvm-mca.cpp =================================================================== --- llvm/trunk/tools/llvm-mca/llvm-mca.cpp +++ llvm/trunk/tools/llvm-mca/llvm-mca.cpp @@ -89,6 +89,11 @@ cl::desc("Target a specific cpu type (-mcpu=help for details)"), cl::value_desc("cpu-name"), cl::cat(ToolOptions), cl::init("native")); +static cl::opt + MATTR("mattr", + cl::desc("Additional target features."), + cl::cat(ToolOptions)); + static cl::opt OutputAsmVariant("output-asm-variant", cl::desc("Syntax variant to use for output printing"), @@ -322,7 +327,7 @@ MCPU = llvm::sys::getHostCPUName(); std::unique_ptr STI( - TheTarget->createMCSubtargetInfo(TripleName, MCPU, /* FeaturesStr */ "")); + TheTarget->createMCSubtargetInfo(TripleName, MCPU, MATTR)); if (!STI->isCPUStringValid(MCPU)) return 1;