Index: lib/Target/Mips/MipsDelaySlotFiller.cpp =================================================================== --- lib/Target/Mips/MipsDelaySlotFiller.cpp +++ lib/Target/Mips/MipsDelaySlotFiller.cpp @@ -210,7 +210,7 @@ template bool searchRange(MachineBasicBlock &MBB, IterTy Begin, IterTy End, RegDefsUses &RegDU, InspectMemInstr &IM, - IterTy &Filler) const; + IterTy &Filler, Iter Slot) const; /// This function searches in the backward direction for an instruction that /// can be moved to the delay slot. Returns true on success. @@ -612,7 +612,7 @@ template bool Filler::searchRange(MachineBasicBlock &MBB, IterTy Begin, IterTy End, RegDefsUses &RegDU, InspectMemInstr& IM, - IterTy &Filler) const { + IterTy &Filler, Iter Slot) const { for (IterTy I = Begin; I != End; ++I) { // skip debug value if (I->isDebugValue()) @@ -640,6 +640,15 @@ continue; } + bool InMicroMipsMode = TM.getSubtarget().inMicroMipsMode(); + const MipsInstrInfo *TII = static_cast( + TM.getSubtargetImpl()->getInstrInfo()); + unsigned Opcode = (*Slot).getOpcode(); + if (InMicroMipsMode && TII->GetInstSizeInBytes(&(*I)) == 2 && + (Opcode == Mips::JR || Opcode == Mips::PseudoIndirectBranch || + Opcode == Mips::PseudoReturn)) + continue; + Filler = I; return true; } @@ -657,7 +666,8 @@ RegDU.init(*Slot); - if (!searchRange(MBB, ReverseIter(Slot), MBB.rend(), RegDU, MemDU, Filler)) + if (!searchRange(MBB, ReverseIter(Slot), MBB.rend(), RegDU, MemDU, Filler, + Slot)) return false; MBB.splice(std::next(Slot), &MBB, std::next(Filler).base()); @@ -677,7 +687,7 @@ RegDU.setCallerSaved(*Slot); - if (!searchRange(MBB, std::next(Slot), MBB.end(), RegDU, NM, Filler)) + if (!searchRange(MBB, std::next(Slot), MBB.end(), RegDU, NM, Filler, Slot)) return false; MBB.splice(std::next(Slot), &MBB, Filler); @@ -720,7 +730,8 @@ IM.reset(new MemDefsUses(MFI)); } - if (!searchRange(MBB, SuccBB->begin(), SuccBB->end(), RegDU, *IM, Filler)) + if (!searchRange(MBB, SuccBB->begin(), SuccBB->end(), RegDU, *IM, Filler, + Slot)) return false; insertDelayFiller(Filler, BrMap); Index: test/CodeGen/Mips/micromips-delay-slot-jr.ll =================================================================== --- /dev/null +++ test/CodeGen/Mips/micromips-delay-slot-jr.ll @@ -0,0 +1,48 @@ +; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \ +; RUN: -relocation-model=static -O2 < %s | FileCheck %s + +@main.L = internal unnamed_addr constant [3 x i8*] [i8* blockaddress(@main, %L1), i8* blockaddress(@main, %L2), i8* null], align 4 +@str = private unnamed_addr constant [2 x i8] c"A\00" +@str2 = private unnamed_addr constant [2 x i8] c"B\00" + +define i32 @main() #0 { +entry: + br label %L1 + +L1: ; preds = %entry, %L1 + %i.0 = phi i32 [ 0, %entry ], [ %inc, %L1 ] + %puts = tail call i32 @puts(i8* getelementptr inbounds ([2 x i8]* @str, i32 0, i32 0)) + %inc = add i32 %i.0, 1 + %arrayidx = getelementptr inbounds [3 x i8*]* @main.L, i32 0, i32 %i.0 + %0 = load i8** %arrayidx, align 4, !tbaa !1 + indirectbr i8* %0, [label %L1, label %L2] + +L2: ; preds = %L1 + %puts2 = tail call i32 @puts(i8* getelementptr inbounds ([2 x i8]* @str2, i32 0, i32 0)) + ret i32 0 +} + +declare i32 @puts(i8* nocapture readonly) #1 + +!1 = !{!2, !2, i64 0} +!2 = !{!"any pointer", !3, i64 0} +!3 = !{!"omnipotent char", !4, i64 0} +!4 = !{!"Simple C/C++ TBAA"} + +; CHECK: jr +; CHECK-NEXT: nop + +%struct.foostruct = type { [3 x float] } +%struct.barstruct = type { %struct.foostruct, float } +@bar_ary = common global [4 x %struct.barstruct] zeroinitializer, align 4 +define float* @spooky(i32 signext %i) #0 { + + %safe = getelementptr inbounds [4 x %struct.barstruct]* @bar_ary, i32 0, i32 %i, i32 1 + store float 1.420000e+02, float* %safe, align 4, !tbaa !1 + ret float* %safe +} + +; CHECK: spooky: +; CHECK: jr $ra +; CHECK-NEXT: nop +