diff --git a/llvm/test/CodeGen/PowerPC/fp-intrinsics-fptosi-legal.ll b/llvm/test/CodeGen/PowerPC/fp-intrinsics-fptosi-legal.ll
--- a/llvm/test/CodeGen/PowerPC/fp-intrinsics-fptosi-legal.ll
+++ b/llvm/test/CodeGen/PowerPC/fp-intrinsics-fptosi-legal.ll
@@ -8,7 +8,7 @@
 ; Verify that no gross errors happen.
 ; CHECK-LABEL: @f20
 ; COMMON: cfdctsiz
-define i32 @f20(double %a) {
+define i32 @f20(double %a) strictfp noimplicitfloat {
 entry:
   %result = call i32 @llvm.experimental.constrained.fptosi.i32.f64(double 42.1,
                                                metadata !"fpexcept.strict")
diff --git a/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll b/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
--- a/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
+++ b/llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
@@ -2,7 +2,7 @@
 ; RUN: llc -O3 -mtriple=powerpc64le-linux-gnu < %s | FileCheck --check-prefix=PC64LE %s
 ; RUN: llc -O3 -mtriple=powerpc64le-linux-gnu -mcpu=pwr9 < %s | FileCheck --check-prefix=PC64LE9 %s
 
-define <1 x float> @constrained_vector_fdiv_v1f32() nounwind {
+define <1 x float> @constrained_vector_fdiv_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fdiv_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
@@ -33,7 +33,7 @@
   ret <1 x float> %div
 }
 
-define <2 x double> @constrained_vector_fdiv_v2f64() nounwind {
+define <2 x double> @constrained_vector_fdiv_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fdiv_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI1_0@toc@ha
@@ -66,7 +66,7 @@
   ret <2 x double> %div
 }
 
-define <3 x float> @constrained_vector_fdiv_v3f32() nounwind {
+define <3 x float> @constrained_vector_fdiv_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fdiv_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI2_0@toc@ha
@@ -127,7 +127,7 @@
   ret <3 x float> %div
 }
 
-define <3 x double> @constrained_vector_fdiv_v3f64() nounwind {
+define <3 x double> @constrained_vector_fdiv_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fdiv_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI3_2@toc@ha
@@ -176,7 +176,7 @@
   ret <3 x double> %div
 }
 
-define <4 x double> @constrained_vector_fdiv_v4f64() nounwind {
+define <4 x double> @constrained_vector_fdiv_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fdiv_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI4_0@toc@ha
@@ -220,7 +220,7 @@
   ret <4 x double> %div
 }
 
-define <1 x float> @constrained_vector_frem_v1f32() nounwind {
+define <1 x float> @constrained_vector_frem_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_frem_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -265,7 +265,7 @@
   ret <1 x float> %rem
 }
 
-define <2 x double> @constrained_vector_frem_v2f64() nounwind {
+define <2 x double> @constrained_vector_frem_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_frem_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -334,7 +334,7 @@
   ret <2 x double> %rem
 }
 
-define <3 x float> @constrained_vector_frem_v3f32() nounwind {
+define <3 x float> @constrained_vector_frem_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_frem_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -435,7 +435,7 @@
   ret <3 x float> %rem
 }
 
-define <3 x double> @constrained_vector_frem_v3f64() nounwind {
+define <3 x double> @constrained_vector_frem_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_frem_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -526,7 +526,7 @@
   ret <3 x double> %rem
 }
 
-define <4 x double> @constrained_vector_frem_v4f64() nounwind {
+define <4 x double> @constrained_vector_frem_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_frem_v4f64:
 ; PC64LE:       # %bb.0:
 ; PC64LE-NEXT:    mflr 0
@@ -636,7 +636,7 @@
   ret <4 x double> %rem
 }
 
-define <1 x float> @constrained_vector_fmul_v1f32() nounwind {
+define <1 x float> @constrained_vector_fmul_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fmul_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI10_0@toc@ha
@@ -667,7 +667,7 @@
   ret <1 x float> %mul
 }
 
-define <2 x double> @constrained_vector_fmul_v2f64() nounwind {
+define <2 x double> @constrained_vector_fmul_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fmul_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI11_0@toc@ha
@@ -700,7 +700,7 @@
   ret <2 x double> %mul
 }
 
-define <3 x float> @constrained_vector_fmul_v3f32() nounwind {
+define <3 x float> @constrained_vector_fmul_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fmul_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI12_1@toc@ha
@@ -762,7 +762,7 @@
   ret <3 x float> %mul
 }
 
-define <3 x double> @constrained_vector_fmul_v3f64() nounwind {
+define <3 x double> @constrained_vector_fmul_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fmul_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI13_2@toc@ha
@@ -812,7 +812,7 @@
   ret <3 x double> %mul
 }
 
-define <4 x double> @constrained_vector_fmul_v4f64() nounwind {
+define <4 x double> @constrained_vector_fmul_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fmul_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI14_0@toc@ha
@@ -856,7 +856,7 @@
   ret <4 x double> %mul
 }
 
-define <1 x float> @constrained_vector_fadd_v1f32() nounwind {
+define <1 x float> @constrained_vector_fadd_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fadd_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI15_0@toc@ha
@@ -887,7 +887,7 @@
   ret <1 x float> %add
 }
 
-define <2 x double> @constrained_vector_fadd_v2f64() nounwind {
+define <2 x double> @constrained_vector_fadd_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fadd_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI16_0@toc@ha
@@ -920,7 +920,7 @@
   ret <2 x double> %add
 }
 
-define <3 x float> @constrained_vector_fadd_v3f32() nounwind {
+define <3 x float> @constrained_vector_fadd_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fadd_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI17_0@toc@ha
@@ -980,7 +980,7 @@
   ret <3 x float> %add
 }
 
-define <3 x double> @constrained_vector_fadd_v3f64() nounwind {
+define <3 x double> @constrained_vector_fadd_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fadd_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI18_1@toc@ha
@@ -1028,7 +1028,7 @@
   ret <3 x double> %add
 }
 
-define <4 x double> @constrained_vector_fadd_v4f64() nounwind {
+define <4 x double> @constrained_vector_fadd_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fadd_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI19_0@toc@ha
@@ -1072,7 +1072,7 @@
   ret <4 x double> %add
 }
 
-define <1 x float> @constrained_vector_fsub_v1f32() nounwind {
+define <1 x float> @constrained_vector_fsub_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fsub_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI20_0@toc@ha
@@ -1103,7 +1103,7 @@
   ret <1 x float> %sub
 }
 
-define <2 x double> @constrained_vector_fsub_v2f64() nounwind {
+define <2 x double> @constrained_vector_fsub_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fsub_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI21_0@toc@ha
@@ -1136,7 +1136,7 @@
   ret <2 x double> %sub
 }
 
-define <3 x float> @constrained_vector_fsub_v3f32() nounwind {
+define <3 x float> @constrained_vector_fsub_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fsub_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI22_0@toc@ha
@@ -1196,7 +1196,7 @@
   ret <3 x float> %sub
 }
 
-define <3 x double> @constrained_vector_fsub_v3f64() nounwind {
+define <3 x double> @constrained_vector_fsub_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fsub_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI23_1@toc@ha
@@ -1244,7 +1244,7 @@
   ret <3 x double> %sub
 }
 
-define <4 x double> @constrained_vector_fsub_v4f64() nounwind {
+define <4 x double> @constrained_vector_fsub_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fsub_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI24_0@toc@ha
@@ -1288,7 +1288,7 @@
   ret <4 x double> %sub
 }
 
-define <1 x float> @constrained_vector_sqrt_v1f32() nounwind {
+define <1 x float> @constrained_vector_sqrt_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_sqrt_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI25_0@toc@ha
@@ -1314,7 +1314,7 @@
   ret <1 x float> %sqrt
 }
 
-define <2 x double> @constrained_vector_sqrt_v2f64() nounwind {
+define <2 x double> @constrained_vector_sqrt_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_sqrt_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI26_0@toc@ha
@@ -1339,7 +1339,7 @@
   ret <2 x double> %sqrt
 }
 
-define <3 x float> @constrained_vector_sqrt_v3f32() nounwind {
+define <3 x float> @constrained_vector_sqrt_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_sqrt_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI27_2@toc@ha
@@ -1395,7 +1395,7 @@
   ret <3 x float> %sqrt
 }
 
-define <3 x double> @constrained_vector_sqrt_v3f64() nounwind {
+define <3 x double> @constrained_vector_sqrt_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_sqrt_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI28_1@toc@ha
@@ -1432,7 +1432,7 @@
   ret <3 x double> %sqrt
 }
 
-define <4 x double> @constrained_vector_sqrt_v4f64() nounwind {
+define <4 x double> @constrained_vector_sqrt_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_sqrt_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI29_0@toc@ha
@@ -1467,7 +1467,7 @@
   ret <4 x double> %sqrt
 }
 
-define <1 x float> @constrained_vector_pow_v1f32() nounwind {
+define <1 x float> @constrained_vector_pow_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_pow_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -1512,7 +1512,7 @@
   ret <1 x float> %pow
 }
 
-define <2 x double> @constrained_vector_pow_v2f64() nounwind {
+define <2 x double> @constrained_vector_pow_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_pow_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -1581,7 +1581,7 @@
   ret <2 x double> %pow
 }
 
-define <3 x float> @constrained_vector_pow_v3f32() nounwind {
+define <3 x float> @constrained_vector_pow_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_pow_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -1682,7 +1682,7 @@
   ret <3 x float> %pow
 }
 
-define <3 x double> @constrained_vector_pow_v3f64() nounwind {
+define <3 x double> @constrained_vector_pow_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_pow_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -1773,7 +1773,7 @@
   ret <3 x double> %pow
 }
 
-define <4 x double> @constrained_vector_pow_v4f64() nounwind {
+define <4 x double> @constrained_vector_pow_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_pow_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -1884,7 +1884,7 @@
   ret <4 x double> %pow
 }
 
-define <1 x float> @constrained_vector_powi_v1f32() nounwind {
+define <1 x float> @constrained_vector_powi_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_powi_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -1927,7 +1927,7 @@
   ret <1 x float> %powi
 }
 
-define <2 x double> @constrained_vector_powi_v2f64() nounwind {
+define <2 x double> @constrained_vector_powi_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_powi_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -1988,7 +1988,7 @@
   ret <2 x double> %powi
 }
 
-define <3 x float> @constrained_vector_powi_v3f32() nounwind {
+define <3 x float> @constrained_vector_powi_v3f32() nounwind strictfp noimplicitfloat {
 ;
 ;
 ; PC64LE-LABEL: constrained_vector_powi_v3f32:
@@ -2083,7 +2083,7 @@
   ret <3 x float> %powi
 }
 
-define <3 x double> @constrained_vector_powi_v3f64() nounwind {
+define <3 x double> @constrained_vector_powi_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_powi_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -2166,7 +2166,7 @@
   ret <3 x double> %powi
 }
 
-define <4 x double> @constrained_vector_powi_v4f64() nounwind {
+define <4 x double> @constrained_vector_powi_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_powi_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -2268,7 +2268,7 @@
   ret <4 x double> %powi
 }
 
-define <1 x float> @constrained_vector_sin_v1f32() nounwind {
+define <1 x float> @constrained_vector_sin_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_sin_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -2308,7 +2308,7 @@
   ret <1 x float> %sin
 }
 
-define <2 x double> @constrained_vector_sin_v2f64() nounwind {
+define <2 x double> @constrained_vector_sin_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_sin_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -2364,7 +2364,7 @@
   ret <2 x double> %sin
 }
 
-define <3 x float> @constrained_vector_sin_v3f32() nounwind {
+define <3 x float> @constrained_vector_sin_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_sin_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -2450,7 +2450,7 @@
   ret <3 x float> %sin
 }
 
-define <3 x double> @constrained_vector_sin_v3f64() nounwind {
+define <3 x double> @constrained_vector_sin_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_sin_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -2526,7 +2526,7 @@
   ret <3 x double> %sin
 }
 
-define <4 x double> @constrained_vector_sin_v4f64() nounwind {
+define <4 x double> @constrained_vector_sin_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_sin_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -2619,7 +2619,7 @@
   ret <4 x double> %sin
 }
 
-define <1 x float> @constrained_vector_cos_v1f32() nounwind {
+define <1 x float> @constrained_vector_cos_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_cos_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -2659,7 +2659,7 @@
   ret <1 x float> %cos
 }
 
-define <2 x double> @constrained_vector_cos_v2f64() nounwind {
+define <2 x double> @constrained_vector_cos_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_cos_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -2715,7 +2715,7 @@
   ret <2 x double> %cos
 }
 
-define <3 x float> @constrained_vector_cos_v3f32() nounwind {
+define <3 x float> @constrained_vector_cos_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_cos_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -2801,7 +2801,7 @@
   ret <3 x float> %cos
 }
 
-define <3 x double> @constrained_vector_cos_v3f64() nounwind {
+define <3 x double> @constrained_vector_cos_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_cos_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -2877,7 +2877,7 @@
   ret <3 x double> %cos
 }
 
-define <4 x double> @constrained_vector_cos_v4f64() nounwind {
+define <4 x double> @constrained_vector_cos_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_cos_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -2970,7 +2970,7 @@
   ret <4 x double> %cos
 }
 
-define <1 x float> @constrained_vector_exp_v1f32() nounwind {
+define <1 x float> @constrained_vector_exp_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_exp_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -3010,7 +3010,7 @@
   ret <1 x float> %exp
 }
 
-define <2 x double> @constrained_vector_exp_v2f64() nounwind {
+define <2 x double> @constrained_vector_exp_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_exp_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -3066,7 +3066,7 @@
   ret <2 x double> %exp
 }
 
-define <3 x float> @constrained_vector_exp_v3f32() nounwind {
+define <3 x float> @constrained_vector_exp_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_exp_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -3152,7 +3152,7 @@
   ret <3 x float> %exp
 }
 
-define <3 x double> @constrained_vector_exp_v3f64() nounwind {
+define <3 x double> @constrained_vector_exp_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_exp_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -3228,7 +3228,7 @@
   ret <3 x double> %exp
 }
 
-define <4 x double> @constrained_vector_exp_v4f64() nounwind {
+define <4 x double> @constrained_vector_exp_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_exp_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -3321,7 +3321,7 @@
   ret <4 x double> %exp
 }
 
-define <1 x float> @constrained_vector_exp2_v1f32() nounwind {
+define <1 x float> @constrained_vector_exp2_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_exp2_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -3361,7 +3361,7 @@
   ret <1 x float> %exp2
 }
 
-define <2 x double> @constrained_vector_exp2_v2f64() nounwind {
+define <2 x double> @constrained_vector_exp2_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_exp2_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -3417,7 +3417,7 @@
   ret <2 x double> %exp2
 }
 
-define <3 x float> @constrained_vector_exp2_v3f32() nounwind {
+define <3 x float> @constrained_vector_exp2_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_exp2_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -3503,7 +3503,7 @@
   ret <3 x float> %exp2
 }
 
-define <3 x double> @constrained_vector_exp2_v3f64() nounwind {
+define <3 x double> @constrained_vector_exp2_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_exp2_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -3579,7 +3579,7 @@
   ret <3 x double> %exp2
 }
 
-define <4 x double> @constrained_vector_exp2_v4f64() nounwind {
+define <4 x double> @constrained_vector_exp2_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_exp2_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -3672,7 +3672,7 @@
   ret <4 x double> %exp2
 }
 
-define <1 x float> @constrained_vector_log_v1f32() nounwind {
+define <1 x float> @constrained_vector_log_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_log_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -3712,7 +3712,7 @@
   ret <1 x float> %log
 }
 
-define <2 x double> @constrained_vector_log_v2f64() nounwind {
+define <2 x double> @constrained_vector_log_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_log_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -3768,7 +3768,7 @@
   ret <2 x double> %log
 }
 
-define <3 x float> @constrained_vector_log_v3f32() nounwind {
+define <3 x float> @constrained_vector_log_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_log_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -3854,7 +3854,7 @@
   ret <3 x float> %log
 }
 
-define <3 x double> @constrained_vector_log_v3f64() nounwind {
+define <3 x double> @constrained_vector_log_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_log_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -3930,7 +3930,7 @@
   ret <3 x double> %log
 }
 
-define <4 x double> @constrained_vector_log_v4f64() nounwind {
+define <4 x double> @constrained_vector_log_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_log_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -4023,7 +4023,7 @@
   ret <4 x double> %log
 }
 
-define <1 x float> @constrained_vector_log10_v1f32() nounwind {
+define <1 x float> @constrained_vector_log10_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_log10_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -4063,7 +4063,7 @@
   ret <1 x float> %log10
 }
 
-define <2 x double> @constrained_vector_log10_v2f64() nounwind {
+define <2 x double> @constrained_vector_log10_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_log10_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -4119,7 +4119,7 @@
   ret <2 x double> %log10
 }
 
-define <3 x float> @constrained_vector_log10_v3f32() nounwind {
+define <3 x float> @constrained_vector_log10_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_log10_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -4205,7 +4205,7 @@
   ret <3 x float> %log10
 }
 
-define <3 x double> @constrained_vector_log10_v3f64() nounwind {
+define <3 x double> @constrained_vector_log10_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_log10_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -4281,7 +4281,7 @@
   ret <3 x double> %log10
 }
 
-define <4 x double> @constrained_vector_log10_v4f64() nounwind {
+define <4 x double> @constrained_vector_log10_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_log10_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -4374,7 +4374,7 @@
   ret <4 x double> %log10
 }
 
-define <1 x float> @constrained_vector_log2_v1f32() nounwind {
+define <1 x float> @constrained_vector_log2_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_log2_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -4414,7 +4414,7 @@
   ret <1 x float> %log2
 }
 
-define <2 x double> @constrained_vector_log2_v2f64() nounwind {
+define <2 x double> @constrained_vector_log2_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_log2_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -4470,7 +4470,7 @@
   ret <2 x double> %log2
 }
 
-define <3 x float> @constrained_vector_log2_v3f32() nounwind {
+define <3 x float> @constrained_vector_log2_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_log2_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -4556,7 +4556,7 @@
   ret <3 x float> %log2
 }
 
-define <3 x double> @constrained_vector_log2_v3f64() nounwind {
+define <3 x double> @constrained_vector_log2_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_log2_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -4632,7 +4632,7 @@
   ret <3 x double> %log2
 }
 
-define <4 x double> @constrained_vector_log2_v4f64() nounwind {
+define <4 x double> @constrained_vector_log2_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_log2_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -4725,7 +4725,7 @@
   ret <4 x double> %log2
 }
 
-define <1 x float> @constrained_vector_rint_v1f32() nounwind {
+define <1 x float> @constrained_vector_rint_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_rint_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -4765,7 +4765,7 @@
   ret <1 x float> %rint
 }
 
-define <2 x double> @constrained_vector_rint_v2f64() nounwind {
+define <2 x double> @constrained_vector_rint_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_rint_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -4821,7 +4821,7 @@
   ret <2 x double> %rint
 }
 
-define <3 x float> @constrained_vector_rint_v3f32() nounwind {
+define <3 x float> @constrained_vector_rint_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_rint_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -4907,7 +4907,7 @@
   ret <3 x float> %rint
 }
 
-define <3 x double> @constrained_vector_rint_v3f64() nounwind {
+define <3 x double> @constrained_vector_rint_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_rint_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -4983,7 +4983,7 @@
   ret <3 x double> %rint
 }
 
-define <4 x double> @constrained_vector_rint_v4f64() nounwind {
+define <4 x double> @constrained_vector_rint_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_rint_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -5076,7 +5076,7 @@
   ret <4 x double> %rint
 }
 
-define <1 x float> @constrained_vector_nearbyint_v1f32() nounwind {
+define <1 x float> @constrained_vector_nearbyint_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_nearbyint_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -5116,7 +5116,7 @@
   ret <1 x float> %nearby
 }
 
-define <2 x double> @constrained_vector_nearbyint_v2f64() nounwind {
+define <2 x double> @constrained_vector_nearbyint_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_nearbyint_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -5172,7 +5172,7 @@
   ret <2 x double> %nearby
 }
 
-define <3 x float> @constrained_vector_nearbyint_v3f32() nounwind {
+define <3 x float> @constrained_vector_nearbyint_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_nearbyint_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -5258,7 +5258,7 @@
   ret <3 x float> %nearby
 }
 
-define <3 x double> @constrained_vector_nearby_v3f64() nounwind {
+define <3 x double> @constrained_vector_nearby_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_nearby_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -5334,7 +5334,7 @@
   ret <3 x double> %nearby
 }
 
-define <4 x double> @constrained_vector_nearbyint_v4f64() nounwind {
+define <4 x double> @constrained_vector_nearbyint_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_nearbyint_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -5427,7 +5427,7 @@
   ret <4 x double> %nearby
 }
 
-define <1 x float> @constrained_vector_maxnum_v1f32() nounwind {
+define <1 x float> @constrained_vector_maxnum_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_maxnum_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -5471,7 +5471,7 @@
   ret <1 x float> %max
 }
 
-define <2 x double> @constrained_vector_maxnum_v2f64() nounwind {
+define <2 x double> @constrained_vector_maxnum_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_maxnum_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -5536,7 +5536,7 @@
   ret <2 x double> %max
 }
 
-define <3 x float> @constrained_vector_maxnum_v3f32() nounwind {
+define <3 x float> @constrained_vector_maxnum_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_maxnum_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -5639,7 +5639,7 @@
   ret <3 x float> %max
 }
 
-define <3 x double> @constrained_vector_max_v3f64() nounwind {
+define <3 x double> @constrained_vector_max_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_max_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -5728,7 +5728,7 @@
   ret <3 x double> %max
 }
 
-define <4 x double> @constrained_vector_maxnum_v4f64() nounwind {
+define <4 x double> @constrained_vector_maxnum_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_maxnum_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -5839,7 +5839,7 @@
   ret <4 x double> %max
 }
 
-define <1 x float> @constrained_vector_minnum_v1f32() nounwind {
+define <1 x float> @constrained_vector_minnum_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_minnum_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -5883,7 +5883,7 @@
   ret <1 x float> %min
 }
 
-define <2 x double> @constrained_vector_minnum_v2f64() nounwind {
+define <2 x double> @constrained_vector_minnum_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_minnum_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -5948,7 +5948,7 @@
   ret <2 x double> %min
 }
 
-define <3 x float> @constrained_vector_minnum_v3f32() nounwind {
+define <3 x float> @constrained_vector_minnum_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_minnum_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -6051,7 +6051,7 @@
   ret <3 x float> %min
 }
 
-define <3 x double> @constrained_vector_min_v3f64() nounwind {
+define <3 x double> @constrained_vector_min_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_min_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -6140,7 +6140,7 @@
   ret <3 x double> %min
 }
 
-define <4 x double> @constrained_vector_minnum_v4f64() nounwind {
+define <4 x double> @constrained_vector_minnum_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_minnum_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
@@ -6251,7 +6251,7 @@
   ret <4 x double> %min
 }
 
-define <1 x float> @constrained_vector_fptrunc_v1f64() nounwind {
+define <1 x float> @constrained_vector_fptrunc_v1f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fptrunc_v1f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI95_0@toc@ha
@@ -6277,7 +6277,7 @@
   ret <1 x float> %result
 }
 
-define <2 x float> @constrained_vector_fptrunc_v2f64() nounwind {
+define <2 x float> @constrained_vector_fptrunc_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fptrunc_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI96_0@toc@ha
@@ -6315,7 +6315,7 @@
   ret <2 x float> %result
 }
 
-define <3 x float> @constrained_vector_fptrunc_v3f64() nounwind {
+define <3 x float> @constrained_vector_fptrunc_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fptrunc_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI97_0@toc@ha
@@ -6372,7 +6372,7 @@
   ret <3 x float> %result
 }
 
-define <4 x float> @constrained_vector_fptrunc_v4f64() nounwind {
+define <4 x float> @constrained_vector_fptrunc_v4f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fptrunc_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI98_0@toc@ha
@@ -6415,7 +6415,7 @@
   ret <4 x float> %result
 }
 
-define <1 x double> @constrained_vector_fpext_v1f32() nounwind {
+define <1 x double> @constrained_vector_fpext_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fpext_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI99_0@toc@ha
@@ -6436,7 +6436,7 @@
   ret <1 x double> %result
 }
 
-define <2 x double> @constrained_vector_fpext_v2f32() nounwind {
+define <2 x double> @constrained_vector_fpext_v2f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fpext_v2f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI100_0@toc@ha
@@ -6461,7 +6461,7 @@
   ret <2 x double> %result
 }
 
-define <3 x double> @constrained_vector_fpext_v3f32() nounwind {
+define <3 x double> @constrained_vector_fpext_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fpext_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI101_0@toc@ha
@@ -6489,7 +6489,7 @@
   ret <3 x double> %result
 }
 
-define <4 x double> @constrained_vector_fpext_v4f32() nounwind {
+define <4 x double> @constrained_vector_fpext_v4f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_fpext_v4f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI102_0@toc@ha
@@ -6525,7 +6525,7 @@
   ret <4 x double> %result
 }
 
-define <1 x float> @constrained_vector_ceil_v1f32() nounwind {
+define <1 x float> @constrained_vector_ceil_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_ceil_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI103_0@toc@ha
@@ -6551,7 +6551,7 @@
   ret <1 x float> %ceil
 }
 
-define <2 x double> @constrained_vector_ceil_v2f64() nounwind {
+define <2 x double> @constrained_vector_ceil_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_ceil_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI104_0@toc@ha
@@ -6576,7 +6576,7 @@
   ret <2 x double> %ceil
 }
 
-define <3 x float> @constrained_vector_ceil_v3f32() nounwind {
+define <3 x float> @constrained_vector_ceil_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_ceil_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI105_2@toc@ha
@@ -6632,7 +6632,7 @@
   ret <3 x float> %ceil
 }
 
-define <3 x double> @constrained_vector_ceil_v3f64() nounwind {
+define <3 x double> @constrained_vector_ceil_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_ceil_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI106_1@toc@ha
@@ -6669,7 +6669,7 @@
   ret <3 x double> %ceil
 }
 
-define <1 x float> @constrained_vector_floor_v1f32() nounwind {
+define <1 x float> @constrained_vector_floor_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_floor_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI107_0@toc@ha
@@ -6696,7 +6696,7 @@
 }
 
 
-define <2 x double> @constrained_vector_floor_v2f64() nounwind {
+define <2 x double> @constrained_vector_floor_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_floor_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI108_0@toc@ha
@@ -6721,7 +6721,7 @@
   ret <2 x double> %floor
 }
 
-define <3 x float> @constrained_vector_floor_v3f32() nounwind {
+define <3 x float> @constrained_vector_floor_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_floor_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI109_2@toc@ha
@@ -6777,7 +6777,7 @@
   ret <3 x float> %floor
 }
 
-define <3 x double> @constrained_vector_floor_v3f64() nounwind {
+define <3 x double> @constrained_vector_floor_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_floor_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI110_1@toc@ha
@@ -6814,7 +6814,7 @@
   ret <3 x double> %floor
 }
 
-define <1 x float> @constrained_vector_round_v1f32() nounwind {
+define <1 x float> @constrained_vector_round_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_round_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI111_0@toc@ha
@@ -6840,7 +6840,7 @@
   ret <1 x float> %round
 }
 
-define <2 x double> @constrained_vector_round_v2f64() nounwind {
+define <2 x double> @constrained_vector_round_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_round_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI112_0@toc@ha
@@ -6865,7 +6865,7 @@
   ret <2 x double> %round
 }
 
-define <3 x float> @constrained_vector_round_v3f32() nounwind {
+define <3 x float> @constrained_vector_round_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_round_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI113_2@toc@ha
@@ -6922,7 +6922,7 @@
 }
 
 
-define <3 x double> @constrained_vector_round_v3f64() nounwind {
+define <3 x double> @constrained_vector_round_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_round_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI114_1@toc@ha
@@ -6959,7 +6959,7 @@
   ret <3 x double> %round
 }
 
-define <1 x float> @constrained_vector_trunc_v1f32() nounwind {
+define <1 x float> @constrained_vector_trunc_v1f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_trunc_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI115_0@toc@ha
@@ -6985,7 +6985,7 @@
   ret <1 x float> %trunc
 }
 
-define <2 x double> @constrained_vector_trunc_v2f64() nounwind {
+define <2 x double> @constrained_vector_trunc_v2f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_trunc_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI116_0@toc@ha
@@ -7010,7 +7010,7 @@
   ret <2 x double> %trunc
 }
 
-define <3 x float> @constrained_vector_trunc_v3f32() nounwind {
+define <3 x float> @constrained_vector_trunc_v3f32() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_trunc_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI117_2@toc@ha
@@ -7066,7 +7066,7 @@
   ret <3 x float> %trunc
 }
 
-define <3 x double> @constrained_vector_trunc_v3f64() nounwind {
+define <3 x double> @constrained_vector_trunc_v3f64() nounwind strictfp noimplicitfloat {
 ; PC64LE-LABEL: constrained_vector_trunc_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI118_1@toc@ha
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-add-01.ll b/llvm/test/CodeGen/SystemZ/fp-strict-add-01.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-add-01.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-add-01.ll
@@ -8,7 +8,7 @@
 declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata)
 
 ; Check register addition.
-define float @f1(float %f1, float %f2) {
+define float @f1(float %f1, float %f2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: aebr %f0, %f2
 ; CHECK: br %r14
@@ -20,7 +20,7 @@
 }
 
 ; Check the low end of the AEB range.
-define float @f2(float %f1, float *%ptr) {
+define float @f2(float %f1, float *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: aeb %f0, 0(%r2)
 ; CHECK: br %r14
@@ -33,7 +33,7 @@
 }
 
 ; Check the high end of the aligned AEB range.
-define float @f3(float %f1, float *%base) {
+define float @f3(float %f1, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: aeb %f0, 4092(%r2)
 ; CHECK: br %r14
@@ -48,7 +48,7 @@
 
 ; Check the next word up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
-define float @f4(float %f1, float *%base) {
+define float @f4(float %f1, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r2, 4096
 ; CHECK: aeb %f0, 0(%r2)
@@ -63,7 +63,7 @@
 }
 
 ; Check negative displacements, which also need separate address logic.
-define float @f5(float %f1, float *%base) {
+define float @f5(float %f1, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r2, -4
 ; CHECK: aeb %f0, 0(%r2)
@@ -78,7 +78,7 @@
 }
 
 ; Check that AEB allows indices.
-define float @f6(float %f1, float *%base, i64 %index) {
+define float @f6(float %f1, float *%base, i64 %index) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 2
 ; CHECK: aeb %f0, 400(%r1,%r2)
@@ -94,7 +94,7 @@
 }
 
 ; Check that additions of spilled values can use AEB rather than AEBR.
-define float @f7(float *%ptr0) {
+define float @f7(float *%ptr0) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: brasl %r14, foo@PLT
 ; CHECK-SCALAR: aeb %f0, 16{{[04]}}(%r15)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-add-02.ll b/llvm/test/CodeGen/SystemZ/fp-strict-add-02.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-add-02.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-add-02.ll
@@ -7,7 +7,7 @@
 declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata)
 
 ; Check register addition.
-define double @f1(double %f1, double %f2) {
+define double @f1(double %f1, double %f2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: adbr %f0, %f2
 ; CHECK: br %r14
@@ -19,7 +19,7 @@
 }
 
 ; Check the low end of the ADB range.
-define double @f2(double %f1, double *%ptr) {
+define double @f2(double %f1, double *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: adb %f0, 0(%r2)
 ; CHECK: br %r14
@@ -32,7 +32,7 @@
 }
 
 ; Check the high end of the aligned ADB range.
-define double @f3(double %f1, double *%base) {
+define double @f3(double %f1, double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: adb %f0, 4088(%r2)
 ; CHECK: br %r14
@@ -47,7 +47,7 @@
 
 ; Check the next doubleword up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
-define double @f4(double %f1, double *%base) {
+define double @f4(double %f1, double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r2, 4096
 ; CHECK: adb %f0, 0(%r2)
@@ -62,7 +62,7 @@
 }
 
 ; Check negative displacements, which also need separate address logic.
-define double @f5(double %f1, double *%base) {
+define double @f5(double %f1, double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r2, -8
 ; CHECK: adb %f0, 0(%r2)
@@ -77,7 +77,7 @@
 }
 
 ; Check that ADB allows indices.
-define double @f6(double %f1, double *%base, i64 %index) {
+define double @f6(double %f1, double *%base, i64 %index) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 3
 ; CHECK: adb %f0, 800(%r1,%r2)
@@ -93,7 +93,7 @@
 }
 
 ; Check that additions of spilled values can use ADB rather than ADBR.
-define double @f7(double *%ptr0) {
+define double @f7(double *%ptr0) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: brasl %r14, foo@PLT
 ; CHECK-SCALAR: adb %f0, 160(%r15)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-add-03.ll b/llvm/test/CodeGen/SystemZ/fp-strict-add-03.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-add-03.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-add-03.ll
@@ -5,7 +5,7 @@
 declare fp128 @llvm.experimental.constrained.fadd.f128(fp128, fp128, metadata, metadata)
 
 ; There is no memory form of 128-bit addition.
-define void @f1(fp128 *%ptr, float %f2) {
+define void @f1(fp128 *%ptr, float %f2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK-DAG: lxebr %f0, %f0
 ; CHECK-DAG: ld %f1, 0(%r2)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-add-04.ll b/llvm/test/CodeGen/SystemZ/fp-strict-add-04.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-add-04.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-add-04.ll
@@ -4,7 +4,7 @@
 
 declare fp128 @llvm.experimental.constrained.fadd.f128(fp128, fp128, metadata, metadata)
 
-define void @f1(fp128 *%ptr1, fp128 *%ptr2) {
+define void @f1(fp128 *%ptr1, fp128 *%ptr2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2)
 ; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-alias.ll b/llvm/test/CodeGen/SystemZ/fp-strict-alias.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-alias.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-alias.ll
@@ -13,7 +13,7 @@
 
 ; We can move any FP operation across a (normal) store.
 
-define void @f1(float %f1, float %f2, float *%ptr1, float *%ptr2) {
+define void @f1(float %f1, float %f2, float *%ptr1, float *%ptr2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: sqebr
 ; CHECK: ste
@@ -30,7 +30,7 @@
   ret void
 }
 
-define void @f2(float %f1, float %f2, float *%ptr1, float *%ptr2) {
+define void @f2(float %f1, float %f2, float *%ptr1, float *%ptr2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: sqebr
 ; CHECK: ste
@@ -53,7 +53,7 @@
   ret void
 }
 
-define void @f3(float %f1, float %f2, float *%ptr1, float *%ptr2) {
+define void @f3(float %f1, float %f2, float *%ptr1, float *%ptr2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: sqebr
 ; CHECK: ste
@@ -81,7 +81,7 @@
 ; operation even across a volatile store, but not a fpexcept.strict
 ; operation.
 
-define void @f4(float %f1, float %f2, float *%ptr1, float *%ptr2) {
+define void @f4(float %f1, float %f2, float *%ptr1, float *%ptr2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: sqebr
 ; CHECK: ste
@@ -98,7 +98,7 @@
   ret void
 }
 
-define void @f5(float %f1, float %f2, float *%ptr1, float *%ptr2) {
+define void @f5(float %f1, float %f2, float *%ptr1, float *%ptr2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: sqebr
 ; CHECK: ste
@@ -121,7 +121,7 @@
   ret void
 }
 
-define void @f6(float %f1, float %f2, float *%ptr1, float *%ptr2) {
+define void @f6(float %f1, float %f2, float *%ptr1, float *%ptr2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sqebr
 ; CHECK: sqebr
@@ -147,7 +147,7 @@
 
 ; No variant of FP operations can be scheduled across a SPFC.
 
-define void @f7(float %f1, float %f2, float *%ptr1, float *%ptr2) {
+define void @f7(float %f1, float %f2, float *%ptr1, float *%ptr2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: sqebr
 ; CHECK: sqebr
@@ -166,7 +166,7 @@
   ret void
 }
 
-define void @f8(float %f1, float %f2, float *%ptr1, float *%ptr2) {
+define void @f8(float %f1, float %f2, float *%ptr1, float *%ptr2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f8:
 ; CHECK: sqebr
 ; CHECK: sqebr
@@ -191,7 +191,7 @@
   ret void
 }
 
-define void @f9(float %f1, float %f2, float *%ptr1, float *%ptr2) {
+define void @f9(float %f1, float %f2, float *%ptr1, float *%ptr2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f9:
 ; CHECK: sqebr
 ; CHECK: sqebr
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-conv-01.ll b/llvm/test/CodeGen/SystemZ/fp-strict-conv-01.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-conv-01.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-conv-01.ll
@@ -13,7 +13,7 @@
 declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata)
 
 ; Test f64->f32.
-define float @f1(double %d1, double %d2) {
+define float @f1(double %d1, double %d2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK-SCALAR: ledbr %f0, %f2
 ; CHECK-VECTOR: ledbra %f0, 0, %f2, 0
@@ -26,7 +26,7 @@
 }
 
 ; Test f128->f32.
-define float @f2(fp128 *%ptr) {
+define float @f2(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: lexbr %f0, %f0
 ; CHECK: br %r14
@@ -40,7 +40,7 @@
 
 ; Make sure that we don't use %f0 as the destination of LEXBR when %f2
 ; is still live.
-define void @f3(float *%dst, fp128 *%ptr, float %d1, float %d2) {
+define void @f3(float *%dst, fp128 *%ptr, float %d1, float %d2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: lexbr %f1, %f1
 ; CHECK: aebr %f1, %f2
@@ -60,7 +60,7 @@
 }
 
 ; Test f128->f64.
-define double @f4(fp128 *%ptr) {
+define double @f4(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: ldxbr %f0, %f0
 ; CHECK: br %r14
@@ -73,7 +73,7 @@
 }
 
 ; Like f3, but for f128->f64.
-define void @f5(double *%dst, fp128 *%ptr, double %d1, double %d2) {
+define void @f5(double *%dst, fp128 *%ptr, double %d1, double %d2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: ldxbr %f1, %f1
 ; CHECK-SCALAR: adbr %f1, %f2
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-conv-02.ll b/llvm/test/CodeGen/SystemZ/fp-strict-conv-02.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-conv-02.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-conv-02.ll
@@ -5,7 +5,7 @@
 declare double @llvm.experimental.constrained.fpext.f64.f32(float, metadata)
 
 ; Check register extension.
-define double @f1(float %val) {
+define double @f1(float %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: ldebr %f0, %f0
 ; CHECK: br %r14
@@ -15,7 +15,7 @@
 }
 
 ; Check the low end of the LDEB range.
-define double @f2(float *%ptr) {
+define double @f2(float *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: ldeb %f0, 0(%r2)
 ; CHECK: br %r14
@@ -26,7 +26,7 @@
 }
 
 ; Check the high end of the aligned LDEB range.
-define double @f3(float *%base) {
+define double @f3(float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: ldeb %f0, 4092(%r2)
 ; CHECK: br %r14
@@ -39,7 +39,7 @@
 
 ; Check the next word up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
-define double @f4(float *%base) {
+define double @f4(float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r2, 4096
 ; CHECK: ldeb %f0, 0(%r2)
@@ -52,7 +52,7 @@
 }
 
 ; Check negative displacements, which also need separate address logic.
-define double @f5(float *%base) {
+define double @f5(float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r2, -4
 ; CHECK: ldeb %f0, 0(%r2)
@@ -65,7 +65,7 @@
 }
 
 ; Check that LDEB allows indices.
-define double @f6(float *%base, i64 %index) {
+define double @f6(float *%base, i64 %index) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 2
 ; CHECK: ldeb %f0, 400(%r1,%r2)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-conv-03.ll b/llvm/test/CodeGen/SystemZ/fp-strict-conv-03.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-conv-03.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-conv-03.ll
@@ -5,7 +5,7 @@
 declare fp128 @llvm.experimental.constrained.fpext.f128.f32(float, metadata)
 
 ; Check register extension.
-define void @f1(fp128 *%dst, float %val) {
+define void @f1(fp128 *%dst, float %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: lxebr %f0, %f0
 ; CHECK: std %f0, 0(%r2)
@@ -18,7 +18,7 @@
 }
 
 ; Check the low end of the LXEB range.
-define void @f2(fp128 *%dst, float *%ptr) {
+define void @f2(fp128 *%dst, float *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: lxeb %f0, 0(%r3)
 ; CHECK: std %f0, 0(%r2)
@@ -32,7 +32,7 @@
 }
 
 ; Check the high end of the aligned LXEB range.
-define void @f3(fp128 *%dst, float *%base) {
+define void @f3(fp128 *%dst, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: lxeb %f0, 4092(%r3)
 ; CHECK: std %f0, 0(%r2)
@@ -48,7 +48,7 @@
 
 ; Check the next word up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
-define void @f4(fp128 *%dst, float *%base) {
+define void @f4(fp128 *%dst, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r3, 4096
 ; CHECK: lxeb %f0, 0(%r3)
@@ -64,7 +64,7 @@
 }
 
 ; Check negative displacements, which also need separate address logic.
-define void @f5(fp128 *%dst, float *%base) {
+define void @f5(fp128 *%dst, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r3, -4
 ; CHECK: lxeb %f0, 0(%r3)
@@ -80,7 +80,7 @@
 }
 
 ; Check that LXEB allows indices.
-define void @f6(fp128 *%dst, float *%base, i64 %index) {
+define void @f6(fp128 *%dst, float *%base, i64 %index) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r4, 2
 ; CHECK: lxeb %f0, 400(%r1,%r3)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-conv-04.ll b/llvm/test/CodeGen/SystemZ/fp-strict-conv-04.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-conv-04.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-conv-04.ll
@@ -5,7 +5,7 @@
 declare fp128 @llvm.experimental.constrained.fpext.f128.f64(double, metadata)
 
 ; Check register extension.
-define void @f1(fp128 *%dst, double %val) {
+define void @f1(fp128 *%dst, double %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: lxdbr %f0, %f0
 ; CHECK: std %f0, 0(%r2)
@@ -18,7 +18,7 @@
 }
 
 ; Check the low end of the LXDB range.
-define void @f2(fp128 *%dst, double *%ptr) {
+define void @f2(fp128 *%dst, double *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: lxdb %f0, 0(%r3)
 ; CHECK: std %f0, 0(%r2)
@@ -32,7 +32,7 @@
 }
 
 ; Check the high end of the aligned LXDB range.
-define void @f3(fp128 *%dst, double *%base) {
+define void @f3(fp128 *%dst, double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: lxdb %f0, 4088(%r3)
 ; CHECK: std %f0, 0(%r2)
@@ -48,7 +48,7 @@
 
 ; Check the next doubleword up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
-define void @f4(fp128 *%dst, double *%base) {
+define void @f4(fp128 *%dst, double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r3, 4096
 ; CHECK: lxdb %f0, 0(%r3)
@@ -64,7 +64,7 @@
 }
 
 ; Check negative displacements, which also need separate address logic.
-define void @f5(fp128 *%dst, double *%base) {
+define void @f5(fp128 *%dst, double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r3, -8
 ; CHECK: lxdb %f0, 0(%r3)
@@ -80,7 +80,7 @@
 }
 
 ; Check that LXDB allows indices.
-define void @f6(fp128 *%dst, double *%base, i64 %index) {
+define void @f6(fp128 *%dst, double *%base, i64 %index) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r4, 3
 ; CHECK: lxdb %f0, 800(%r1,%r3)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-conv-09.ll b/llvm/test/CodeGen/SystemZ/fp-strict-conv-09.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-conv-09.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-conv-09.ll
@@ -7,7 +7,7 @@
 declare i32 @llvm.experimental.constrained.fptosi.i32.f128(fp128, metadata)
 
 ; Test f32->i32.
-define i32 @f1(float %f) {
+define i32 @f1(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: cfebr %r2, 5, %f0
 ; CHECK: br %r14
@@ -17,7 +17,7 @@
 }
 
 ; Test f64->i32.
-define i32 @f2(double %f) {
+define i32 @f2(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: cfdbr %r2, 5, %f0
 ; CHECK: br %r14
@@ -27,7 +27,7 @@
 }
 
 ; Test f128->i32.
-define i32 @f3(fp128 *%src) {
+define i32 @f3(fp128 *%src) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: ld %f0, 0(%r2)
 ; CHECK: ld %f2, 8(%r2)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-conv-10.ll b/llvm/test/CodeGen/SystemZ/fp-strict-conv-10.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-conv-10.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-conv-10.ll
@@ -14,7 +14,7 @@
 declare i32 @llvm.experimental.constrained.fptoui.i32.f128(fp128, metadata)
 
 ; Test f32->i32.
-define i32 @f1(float %f) {
+define i32 @f1(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    larl %r1, .LCPI0_0
@@ -40,7 +40,7 @@
 }
 
 ; Test f64->i32.
-define i32 @f2(double %f) {
+define i32 @f2(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    larl %r1, .LCPI1_0
@@ -66,7 +66,7 @@
 }
 
 ; Test f128->i32.
-define i32 @f3(fp128 *%src) {
+define i32 @f3(fp128 *%src) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    ld %f0, 0(%r2)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-conv-11.ll b/llvm/test/CodeGen/SystemZ/fp-strict-conv-11.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-conv-11.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-conv-11.ll
@@ -7,7 +7,7 @@
 declare i64 @llvm.experimental.constrained.fptosi.i64.f128(fp128, metadata)
 
 ; Test f32->i64.
-define i64 @f1(float %f) {
+define i64 @f1(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: cgebr %r2, 5, %f0
 ; CHECK: br %r14
@@ -17,7 +17,7 @@
 }
 
 ; Test f64->i64.
-define i64 @f2(double %f) {
+define i64 @f2(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: cgdbr %r2, 5, %f0
 ; CHECK: br %r14
@@ -27,7 +27,7 @@
 }
 
 ; Test f128->i64.
-define i64 @f3(fp128 *%src) {
+define i64 @f3(fp128 *%src) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: ld %f0, 0(%r2)
 ; CHECK: ld %f2, 8(%r2)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-conv-12.ll b/llvm/test/CodeGen/SystemZ/fp-strict-conv-12.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-conv-12.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-conv-12.ll
@@ -13,7 +13,7 @@
 declare i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128, metadata)
 
 ; Test f32->i64.
-define i64 @f1(float %f) {
+define i64 @f1(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    larl %r1, .LCPI0_0
@@ -39,7 +39,7 @@
 }
 
 ; Test f64->i64.
-define i64 @f2(double %f) {
+define i64 @f2(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    larl %r1, .LCPI1_0
@@ -65,7 +65,7 @@
 }
 
 ; Test f128->i64.
-define i64 @f3(fp128 *%src) {
+define i64 @f3(fp128 *%src) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    ld %f0, 0(%r2)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-conv-14.ll b/llvm/test/CodeGen/SystemZ/fp-strict-conv-14.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-conv-14.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-conv-14.ll
@@ -11,7 +11,7 @@
 declare i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128, metadata)
 
 ; Test f32->i32.
-define i32 @f1(float %f) {
+define i32 @f1(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: clfebr %r2, 5, %f0, 0
 ; CHECK: br %r14
@@ -21,7 +21,7 @@
 }
 
 ; Test f64->i32.
-define i32 @f2(double %f) {
+define i32 @f2(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: clfdbr %r2, 5, %f0, 0
 ; CHECK: br %r14
@@ -31,7 +31,7 @@
 }
 
 ; Test f128->i32.
-define i32 @f3(fp128 *%src) {
+define i32 @f3(fp128 *%src) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK-DAG: ld %f0, 0(%r2)
 ; CHECK-DAG: ld %f2, 8(%r2)
@@ -44,7 +44,7 @@
 }
 
 ; Test f32->i64.
-define i64 @f4(float %f) {
+define i64 @f4(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: clgebr %r2, 5, %f0, 0
 ; CHECK: br %r14
@@ -54,7 +54,7 @@
 }
 
 ; Test f64->i64.
-define i64 @f5(double %f) {
+define i64 @f5(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: clgdbr %r2, 5, %f0, 0
 ; CHECK: br %r14
@@ -64,7 +64,7 @@
 }
 
 ; Test f128->i64.
-define i64 @f6(fp128 *%src) {
+define i64 @f6(fp128 *%src) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK-DAG: ld %f0, 0(%r2)
 ; CHECK-DAG: ld %f2, 8(%r2)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-conv-15.ll b/llvm/test/CodeGen/SystemZ/fp-strict-conv-15.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-conv-15.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-conv-15.ll
@@ -9,7 +9,7 @@
 declare fp128 @llvm.experimental.constrained.fpext.f128.f64(double, metadata)
 
 ; Test f128->f64.
-define double @f1(fp128 *%ptr) {
+define double @f1(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: vl [[REG:%v[0-9]+]], 0(%r2)
 ; CHECK: wflrx %f0, [[REG]], 0, 0
@@ -23,7 +23,7 @@
 }
 
 ; Test f128->f32.
-define float @f2(fp128 *%ptr) {
+define float @f2(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: vl [[REG:%v[0-9]+]], 0(%r2)
 ; CHECK: wflrx %f0, [[REG]], 0, 3
@@ -38,7 +38,7 @@
 }
 
 ; Test f64->f128.
-define void @f3(fp128 *%dst, double %val) {
+define void @f3(fp128 *%dst, double %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: wflld [[RES:%v[0-9]+]], %f0
 ; CHECK: vst [[RES]], 0(%r2)
@@ -50,7 +50,7 @@
 }
 
 ; Test f32->f128.
-define void @f4(fp128 *%dst, float %val) {
+define void @f4(fp128 *%dst, float %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: ldebr %f0, %f0
 ; CHECK: wflld [[RES:%v[0-9]+]], %f0
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-conv-16.ll b/llvm/test/CodeGen/SystemZ/fp-strict-conv-16.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-conv-16.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-conv-16.ll
@@ -11,7 +11,7 @@
 declare i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128, metadata)
 
 ; Test signed f128->i32.
-define i32 @f5(fp128 *%src) {
+define i32 @f5(fp128 *%src) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: vl %v0, 0(%r2)
 ; CHECK: vrepg %v2, %v0, 1
@@ -24,7 +24,7 @@
 }
 
 ; Test signed f128->i64.
-define i64 @f6(fp128 *%src) {
+define i64 @f6(fp128 *%src) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: vl %v0, 0(%r2)
 ; CHECK: vrepg %v2, %v0, 1
@@ -37,7 +37,7 @@
 }
 
 ; Test unsigned f128->i32.
-define i32 @f7(fp128 *%src) {
+define i32 @f7(fp128 *%src) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: vl %v0, 0(%r2)
 ; CHECK: vrepg %v2, %v0, 1
@@ -50,7 +50,7 @@
 }
 
 ; Test unsigned f128->i64.
-define i64 @f8(fp128 *%src) {
+define i64 @f8(fp128 *%src) strictfp noimplicitfloat {
 ; CHECK-LABEL: f8:
 ; CHECK: vl %v0, 0(%r2)
 ; CHECK: vrepg %v2, %v0, 1
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-div-01.ll b/llvm/test/CodeGen/SystemZ/fp-strict-div-01.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-div-01.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-div-01.ll
@@ -8,7 +8,7 @@
 declare float @llvm.experimental.constrained.fdiv.f32(float, float, metadata, metadata)
 
 ; Check register division.
-define float @f1(float %f1, float %f2) {
+define float @f1(float %f1, float %f2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: debr %f0, %f2
 ; CHECK: br %r14
@@ -20,7 +20,7 @@
 }
 
 ; Check the low end of the DEB range.
-define float @f2(float %f1, float *%ptr) {
+define float @f2(float %f1, float *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: deb %f0, 0(%r2)
 ; CHECK: br %r14
@@ -33,7 +33,7 @@
 }
 
 ; Check the high end of the aligned DEB range.
-define float @f3(float %f1, float *%base) {
+define float @f3(float %f1, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: deb %f0, 4092(%r2)
 ; CHECK: br %r14
@@ -48,7 +48,7 @@
 
 ; Check the next word up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
-define float @f4(float %f1, float *%base) {
+define float @f4(float %f1, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r2, 4096
 ; CHECK: deb %f0, 0(%r2)
@@ -63,7 +63,7 @@
 }
 
 ; Check negative displacements, which also need separate address logic.
-define float @f5(float %f1, float *%base) {
+define float @f5(float %f1, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r2, -4
 ; CHECK: deb %f0, 0(%r2)
@@ -78,7 +78,7 @@
 }
 
 ; Check that DEB allows indices.
-define float @f6(float %f1, float *%base, i64 %index) {
+define float @f6(float %f1, float *%base, i64 %index) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 2
 ; CHECK: deb %f0, 400(%r1,%r2)
@@ -94,7 +94,7 @@
 }
 
 ; Check that divisions of spilled values can use DEB rather than DEBR.
-define float @f7(float *%ptr0) {
+define float @f7(float *%ptr0) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: brasl %r14, foo@PLT
 ; CHECK-SCALAR: deb %f0, 16{{[04]}}(%r15)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-div-02.ll b/llvm/test/CodeGen/SystemZ/fp-strict-div-02.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-div-02.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-div-02.ll
@@ -8,7 +8,7 @@
 declare double @llvm.experimental.constrained.fdiv.f64(double, double, metadata, metadata)
 
 ; Check register division.
-define double @f1(double %f1, double %f2) {
+define double @f1(double %f1, double %f2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: ddbr %f0, %f2
 ; CHECK: br %r14
@@ -20,7 +20,7 @@
 }
 
 ; Check the low end of the DDB range.
-define double @f2(double %f1, double *%ptr) {
+define double @f2(double %f1, double *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: ddb %f0, 0(%r2)
 ; CHECK: br %r14
@@ -33,7 +33,7 @@
 }
 
 ; Check the high end of the aligned DDB range.
-define double @f3(double %f1, double *%base) {
+define double @f3(double %f1, double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: ddb %f0, 4088(%r2)
 ; CHECK: br %r14
@@ -48,7 +48,7 @@
 
 ; Check the next doubleword up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
-define double @f4(double %f1, double *%base) {
+define double @f4(double %f1, double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r2, 4096
 ; CHECK: ddb %f0, 0(%r2)
@@ -63,7 +63,7 @@
 }
 
 ; Check negative displacements, which also need separate address logic.
-define double @f5(double %f1, double *%base) {
+define double @f5(double %f1, double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r2, -8
 ; CHECK: ddb %f0, 0(%r2)
@@ -78,7 +78,7 @@
 }
 
 ; Check that DDB allows indices.
-define double @f6(double %f1, double *%base, i64 %index) {
+define double @f6(double %f1, double *%base, i64 %index) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 3
 ; CHECK: ddb %f0, 800(%r1,%r2)
@@ -94,7 +94,7 @@
 }
 
 ; Check that divisions of spilled values can use DDB rather than DDBR.
-define double @f7(double *%ptr0) {
+define double @f7(double *%ptr0) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: brasl %r14, foo@PLT
 ; CHECK-SCALAR: ddb %f0, 160(%r15)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-div-03.ll b/llvm/test/CodeGen/SystemZ/fp-strict-div-03.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-div-03.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-div-03.ll
@@ -5,7 +5,7 @@
 declare fp128 @llvm.experimental.constrained.fdiv.f128(fp128, fp128, metadata, metadata)
 
 ; There is no memory form of 128-bit division.
-define void @f1(fp128 *%ptr, float %f2) {
+define void @f1(fp128 *%ptr, float %f2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK-DAG: lxebr %f0, %f0
 ; CHECK-DAG: ld %f1, 0(%r2)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-div-04.ll b/llvm/test/CodeGen/SystemZ/fp-strict-div-04.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-div-04.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-div-04.ll
@@ -4,7 +4,7 @@
 
 declare fp128 @llvm.experimental.constrained.fdiv.f128(fp128, fp128, metadata, metadata)
 
-define void @f1(fp128 *%ptr1, fp128 *%ptr2) {
+define void @f1(fp128 *%ptr1, fp128 *%ptr2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2)
 ; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-mul-01.ll b/llvm/test/CodeGen/SystemZ/fp-strict-mul-01.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-mul-01.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-mul-01.ll
@@ -8,7 +8,7 @@
 declare float @llvm.experimental.constrained.fmul.f32(float, float, metadata, metadata)
 
 ; Check register multiplication.
-define float @f1(float %f1, float %f2) {
+define float @f1(float %f1, float %f2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: meebr %f0, %f2
 ; CHECK: br %r14
@@ -20,7 +20,7 @@
 }
 
 ; Check the low end of the MEEB range.
-define float @f2(float %f1, float *%ptr) {
+define float @f2(float %f1, float *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: meeb %f0, 0(%r2)
 ; CHECK: br %r14
@@ -33,7 +33,7 @@
 }
 
 ; Check the high end of the aligned MEEB range.
-define float @f3(float %f1, float *%base) {
+define float @f3(float %f1, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: meeb %f0, 4092(%r2)
 ; CHECK: br %r14
@@ -48,7 +48,7 @@
 
 ; Check the next word up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
-define float @f4(float %f1, float *%base) {
+define float @f4(float %f1, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r2, 4096
 ; CHECK: meeb %f0, 0(%r2)
@@ -63,7 +63,7 @@
 }
 
 ; Check negative displacements, which also need separate address logic.
-define float @f5(float %f1, float *%base) {
+define float @f5(float %f1, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r2, -4
 ; CHECK: meeb %f0, 0(%r2)
@@ -78,7 +78,7 @@
 }
 
 ; Check that MEEB allows indices.
-define float @f6(float %f1, float *%base, i64 %index) {
+define float @f6(float %f1, float *%base, i64 %index) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 2
 ; CHECK: meeb %f0, 400(%r1,%r2)
@@ -94,7 +94,7 @@
 }
 
 ; Check that multiplications of spilled values can use MEEB rather than MEEBR.
-define float @f7(float *%ptr0) {
+define float @f7(float *%ptr0) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: brasl %r14, foo@PLT
 ; CHECK-SCALAR: meeb %f0, 16{{[04]}}(%r15)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-mul-02.ll b/llvm/test/CodeGen/SystemZ/fp-strict-mul-02.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-mul-02.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-mul-02.ll
@@ -7,7 +7,7 @@
 declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata)
 
 ; Check register multiplication.
-define double @f1(float %f1, float %f2) {
+define double @f1(float %f1, float %f2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: mdebr %f0, %f2
 ; CHECK: br %r14
@@ -21,7 +21,7 @@
 }
 
 ; Check the low end of the MDEB range.
-define double @f2(float %f1, float *%ptr) {
+define double @f2(float %f1, float *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: mdeb %f0, 0(%r2)
 ; CHECK: br %r14
@@ -36,7 +36,7 @@
 }
 
 ; Check the high end of the aligned MDEB range.
-define double @f3(float %f1, float *%base) {
+define double @f3(float %f1, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: mdeb %f0, 4092(%r2)
 ; CHECK: br %r14
@@ -53,7 +53,7 @@
 
 ; Check the next word up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
-define double @f4(float %f1, float *%base) {
+define double @f4(float %f1, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r2, 4096
 ; CHECK: mdeb %f0, 0(%r2)
@@ -70,7 +70,7 @@
 }
 
 ; Check negative displacements, which also need separate address logic.
-define double @f5(float %f1, float *%base) {
+define double @f5(float %f1, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r2, -4
 ; CHECK: mdeb %f0, 0(%r2)
@@ -87,7 +87,7 @@
 }
 
 ; Check that MDEB allows indices.
-define double @f6(float %f1, float *%base, i64 %index) {
+define double @f6(float %f1, float *%base, i64 %index) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 2
 ; CHECK: mdeb %f0, 400(%r1,%r2)
@@ -105,7 +105,7 @@
 }
 
 ; Check that multiplications of spilled values can use MDEB rather than MDEBR.
-define float @f7(float *%ptr0) {
+define float @f7(float *%ptr0) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: brasl %r14, foo@PLT
 ; CHECK: mdeb %f0, 16{{[04]}}(%r15)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-mul-03.ll b/llvm/test/CodeGen/SystemZ/fp-strict-mul-03.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-mul-03.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-mul-03.ll
@@ -8,7 +8,7 @@
 declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata)
 
 ; Check register multiplication.
-define double @f1(double %f1, double %f2) {
+define double @f1(double %f1, double %f2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: mdbr %f0, %f2
 ; CHECK: br %r14
@@ -20,7 +20,7 @@
 }
 
 ; Check the low end of the MDB range.
-define double @f2(double %f1, double *%ptr) {
+define double @f2(double %f1, double *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: mdb %f0, 0(%r2)
 ; CHECK: br %r14
@@ -33,7 +33,7 @@
 }
 
 ; Check the high end of the aligned MDB range.
-define double @f3(double %f1, double *%base) {
+define double @f3(double %f1, double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: mdb %f0, 4088(%r2)
 ; CHECK: br %r14
@@ -48,7 +48,7 @@
 
 ; Check the next doubleword up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
-define double @f4(double %f1, double *%base) {
+define double @f4(double %f1, double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r2, 4096
 ; CHECK: mdb %f0, 0(%r2)
@@ -63,7 +63,7 @@
 }
 
 ; Check negative displacements, which also need separate address logic.
-define double @f5(double %f1, double *%base) {
+define double @f5(double %f1, double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r2, -8
 ; CHECK: mdb %f0, 0(%r2)
@@ -78,7 +78,7 @@
 }
 
 ; Check that MDB allows indices.
-define double @f6(double %f1, double *%base, i64 %index) {
+define double @f6(double %f1, double *%base, i64 %index) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 3
 ; CHECK: mdb %f0, 800(%r1,%r2)
@@ -94,7 +94,7 @@
 }
 
 ; Check that multiplications of spilled values can use MDB rather than MDBR.
-define double @f7(double *%ptr0) {
+define double @f7(double *%ptr0) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: brasl %r14, foo@PLT
 ; CHECK-SCALAR: mdb %f0, 160(%r15)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-mul-04.ll b/llvm/test/CodeGen/SystemZ/fp-strict-mul-04.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-mul-04.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-mul-04.ll
@@ -10,7 +10,7 @@
 ; Check register multiplication.  "mxdbr %f0, %f2" is not valid from LLVM's
 ; point of view, because %f2 is the low register of the FP128 %f0.  Pass the
 ; multiplier in %f4 instead.
-define void @f1(double %f1, double %dummy, double %f2, fp128 *%dst) {
+define void @f1(double %f1, double %dummy, double %f2, fp128 *%dst) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: mxdbr %f0, %f4
 ; CHECK: std %f0, 0(%r2)
@@ -27,7 +27,7 @@
 }
 
 ; Check the low end of the MXDB range.
-define void @f2(double %f1, double *%ptr, fp128 *%dst) {
+define void @f2(double %f1, double *%ptr, fp128 *%dst) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: mxdb %f0, 0(%r2)
 ; CHECK: std %f0, 0(%r3)
@@ -45,7 +45,7 @@
 }
 
 ; Check the high end of the aligned MXDB range.
-define void @f3(double %f1, double *%base, fp128 *%dst) {
+define void @f3(double %f1, double *%base, fp128 *%dst) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: mxdb %f0, 4088(%r2)
 ; CHECK: std %f0, 0(%r3)
@@ -65,7 +65,7 @@
 
 ; Check the next doubleword up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
-define void @f4(double %f1, double *%base, fp128 *%dst) {
+define void @f4(double %f1, double *%base, fp128 *%dst) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r2, 4096
 ; CHECK: mxdb %f0, 0(%r2)
@@ -85,7 +85,7 @@
 }
 
 ; Check negative displacements, which also need separate address logic.
-define void @f5(double %f1, double *%base, fp128 *%dst) {
+define void @f5(double %f1, double *%base, fp128 *%dst) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r2, -8
 ; CHECK: mxdb %f0, 0(%r2)
@@ -105,7 +105,7 @@
 }
 
 ; Check that MXDB allows indices.
-define void @f6(double %f1, double *%base, i64 %index, fp128 *%dst) {
+define void @f6(double %f1, double *%base, i64 %index, fp128 *%dst) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 3
 ; CHECK: mxdb %f0, 800(%r1,%r2)
@@ -126,7 +126,7 @@
 }
 
 ; Check that multiplications of spilled values can use MXDB rather than MXDBR.
-define double @f7(double *%ptr0) {
+define double @f7(double *%ptr0) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: brasl %r14, foo@PLT
 ; CHECK: mxdb %f0, 160(%r15)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-mul-05.ll b/llvm/test/CodeGen/SystemZ/fp-strict-mul-05.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-mul-05.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-mul-05.ll
@@ -5,7 +5,7 @@
 declare fp128 @llvm.experimental.constrained.fmul.f128(fp128, fp128, metadata, metadata)
 
 ; There is no memory form of 128-bit multiplication.
-define void @f1(fp128 *%ptr, float %f2) {
+define void @f1(fp128 *%ptr, float %f2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK-DAG: lxebr %f0, %f0
 ; CHECK-DAG: ld %f1, 0(%r2)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-mul-06.ll b/llvm/test/CodeGen/SystemZ/fp-strict-mul-06.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-mul-06.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-mul-06.ll
@@ -5,7 +5,7 @@
 
 declare float @llvm.experimental.constrained.fma.f32(float, float, float, metadata, metadata)
 
-define float @f1(float %f1, float %f2, float %acc) {
+define float @f1(float %f1, float %f2, float %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK-SCALAR: maebr %f4, %f0, %f2
 ; CHECK-SCALAR: ler %f0, %f4
@@ -18,7 +18,7 @@
   ret float %res
 }
 
-define float @f2(float %f1, float *%ptr, float %acc) {
+define float @f2(float %f1, float *%ptr, float %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: maeb %f2, %f0, 0(%r2)
 ; CHECK-SCALAR: ler %f0, %f2
@@ -32,7 +32,7 @@
   ret float %res
 }
 
-define float @f3(float %f1, float *%base, float %acc) {
+define float @f3(float %f1, float *%base, float %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: maeb %f2, %f0, 4092(%r2)
 ; CHECK-SCALAR: ler %f0, %f2
@@ -47,7 +47,7 @@
   ret float %res
 }
 
-define float @f4(float %f1, float *%base, float %acc) {
+define float @f4(float %f1, float *%base, float %acc) strictfp noimplicitfloat {
 ; The important thing here is that we don't generate an out-of-range
 ; displacement.  Other sequences besides this one would be OK.
 ;
@@ -66,7 +66,7 @@
   ret float %res
 }
 
-define float @f5(float %f1, float *%base, float %acc) {
+define float @f5(float %f1, float *%base, float %acc) strictfp noimplicitfloat {
 ; Here too the important thing is that we don't generate an out-of-range
 ; displacement.  Other sequences besides this one would be OK.
 ;
@@ -85,7 +85,7 @@
   ret float %res
 }
 
-define float @f6(float %f1, float *%base, i64 %index, float %acc) {
+define float @f6(float %f1, float *%base, i64 %index, float %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 2
 ; CHECK: maeb %f2, %f0, 0(%r1,%r2)
@@ -101,7 +101,7 @@
   ret float %res
 }
 
-define float @f7(float %f1, float *%base, i64 %index, float %acc) {
+define float @f7(float %f1, float *%base, i64 %index, float %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: sllg %r1, %r3, 2
 ; CHECK: maeb %f2, %f0, 4092({{%r1,%r2|%r2,%r1}})
@@ -118,7 +118,7 @@
   ret float %res
 }
 
-define float @f8(float %f1, float *%base, i64 %index, float %acc) {
+define float @f8(float %f1, float *%base, i64 %index, float %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f8:
 ; CHECK: sllg %r1, %r3, 2
 ; CHECK: lay %r1, 4096({{%r1,%r2|%r2,%r1}})
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-mul-07.ll b/llvm/test/CodeGen/SystemZ/fp-strict-mul-07.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-mul-07.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-mul-07.ll
@@ -5,7 +5,7 @@
 
 declare double @llvm.experimental.constrained.fma.f64(double %f1, double %f2, double %f3, metadata, metadata)
 
-define double @f1(double %f1, double %f2, double %acc) {
+define double @f1(double %f1, double %f2, double %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK-SCALAR: madbr %f4, %f0, %f2
 ; CHECK-SCALAR: ldr %f0, %f4
@@ -18,7 +18,7 @@
   ret double %res
 }
 
-define double @f2(double %f1, double *%ptr, double %acc) {
+define double @f2(double %f1, double *%ptr, double %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: madb %f2, %f0, 0(%r2)
 ; CHECK: ldr %f0, %f2
@@ -31,7 +31,7 @@
   ret double %res
 }
 
-define double @f3(double %f1, double *%base, double %acc) {
+define double @f3(double %f1, double *%base, double %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: madb %f2, %f0, 4088(%r2)
 ; CHECK: ldr %f0, %f2
@@ -45,7 +45,7 @@
   ret double %res
 }
 
-define double @f4(double %f1, double *%base, double %acc) {
+define double @f4(double %f1, double *%base, double %acc) strictfp noimplicitfloat {
 ; The important thing here is that we don't generate an out-of-range
 ; displacement.  Other sequences besides this one would be OK.
 ;
@@ -63,7 +63,7 @@
   ret double %res
 }
 
-define double @f5(double %f1, double *%base, double %acc) {
+define double @f5(double %f1, double *%base, double %acc) strictfp noimplicitfloat {
 ; Here too the important thing is that we don't generate an out-of-range
 ; displacement.  Other sequences besides this one would be OK.
 ;
@@ -81,7 +81,7 @@
   ret double %res
 }
 
-define double @f6(double %f1, double *%base, i64 %index, double %acc) {
+define double @f6(double %f1, double *%base, i64 %index, double %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 3
 ; CHECK: madb %f2, %f0, 0(%r1,%r2)
@@ -96,7 +96,7 @@
   ret double %res
 }
 
-define double @f7(double %f1, double *%base, i64 %index, double %acc) {
+define double @f7(double %f1, double *%base, i64 %index, double %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: sllg %r1, %r3, 3
 ; CHECK: madb %f2, %f0, 4088({{%r1,%r2|%r2,%r1}})
@@ -112,7 +112,7 @@
   ret double %res
 }
 
-define double @f8(double %f1, double *%base, i64 %index, double %acc) {
+define double @f8(double %f1, double *%base, i64 %index, double %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f8:
 ; CHECK: sllg %r1, %r3, 3
 ; CHECK: lay %r1, 4096({{%r1,%r2|%r2,%r1}})
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-mul-08.ll b/llvm/test/CodeGen/SystemZ/fp-strict-mul-08.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-mul-08.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-mul-08.ll
@@ -5,7 +5,7 @@
 
 declare float @llvm.experimental.constrained.fma.f32(float %f1, float %f2, float %f3, metadata, metadata)
 
-define float @f1(float %f1, float %f2, float %acc) {
+define float @f1(float %f1, float %f2, float %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK-SCALAR: msebr %f4, %f0, %f2
 ; CHECK-SCALAR: ler %f0, %f4
@@ -19,7 +19,7 @@
   ret float %res
 }
 
-define float @f2(float %f1, float *%ptr, float %acc) {
+define float @f2(float %f1, float *%ptr, float %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: mseb %f2, %f0, 0(%r2)
 ; CHECK-SCALAR: ler %f0, %f2
@@ -34,7 +34,7 @@
   ret float %res
 }
 
-define float @f3(float %f1, float *%base, float %acc) {
+define float @f3(float %f1, float *%base, float %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: mseb %f2, %f0, 4092(%r2)
 ; CHECK-SCALAR: ler %f0, %f2
@@ -50,7 +50,7 @@
   ret float %res
 }
 
-define float @f4(float %f1, float *%base, float %acc) {
+define float @f4(float %f1, float *%base, float %acc) strictfp noimplicitfloat {
 ; The important thing here is that we don't generate an out-of-range
 ; displacement.  Other sequences besides this one would be OK.
 ;
@@ -70,7 +70,7 @@
   ret float %res
 }
 
-define float @f5(float %f1, float *%base, float %acc) {
+define float @f5(float %f1, float *%base, float %acc) strictfp noimplicitfloat {
 ; Here too the important thing is that we don't generate an out-of-range
 ; displacement.  Other sequences besides this one would be OK.
 ;
@@ -90,7 +90,7 @@
   ret float %res
 }
 
-define float @f6(float %f1, float *%base, i64 %index, float %acc) {
+define float @f6(float %f1, float *%base, i64 %index, float %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 2
 ; CHECK: mseb %f2, %f0, 0(%r1,%r2)
@@ -107,7 +107,7 @@
   ret float %res
 }
 
-define float @f7(float %f1, float *%base, i64 %index, float %acc) {
+define float @f7(float %f1, float *%base, i64 %index, float %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: sllg %r1, %r3, 2
 ; CHECK: mseb %f2, %f0, 4092({{%r1,%r2|%r2,%r1}})
@@ -125,7 +125,7 @@
   ret float %res
 }
 
-define float @f8(float %f1, float *%base, i64 %index, float %acc) {
+define float @f8(float %f1, float *%base, i64 %index, float %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f8:
 ; CHECK: sllg %r1, %r3, 2
 ; CHECK: lay %r1, 4096({{%r1,%r2|%r2,%r1}})
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-mul-09.ll b/llvm/test/CodeGen/SystemZ/fp-strict-mul-09.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-mul-09.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-mul-09.ll
@@ -5,7 +5,7 @@
 
 declare double @llvm.experimental.constrained.fma.f64(double %f1, double %f2, double %f3, metadata, metadata)
 
-define double @f1(double %f1, double %f2, double %acc) {
+define double @f1(double %f1, double %f2, double %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK-SCALAR: msdbr %f4, %f0, %f2
 ; CHECK-SCALAR: ldr %f0, %f4
@@ -19,7 +19,7 @@
   ret double %res
 }
 
-define double @f2(double %f1, double *%ptr, double %acc) {
+define double @f2(double %f1, double *%ptr, double %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: msdb %f2, %f0, 0(%r2)
 ; CHECK: ldr %f0, %f2
@@ -33,7 +33,7 @@
   ret double %res
 }
 
-define double @f3(double %f1, double *%base, double %acc) {
+define double @f3(double %f1, double *%base, double %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: msdb %f2, %f0, 4088(%r2)
 ; CHECK: ldr %f0, %f2
@@ -48,7 +48,7 @@
   ret double %res
 }
 
-define double @f4(double %f1, double *%base, double %acc) {
+define double @f4(double %f1, double *%base, double %acc) strictfp noimplicitfloat {
 ; The important thing here is that we don't generate an out-of-range
 ; displacement.  Other sequences besides this one would be OK.
 ;
@@ -67,7 +67,7 @@
   ret double %res
 }
 
-define double @f5(double %f1, double *%base, double %acc) {
+define double @f5(double %f1, double *%base, double %acc) strictfp noimplicitfloat {
 ; Here too the important thing is that we don't generate an out-of-range
 ; displacement.  Other sequences besides this one would be OK.
 ;
@@ -86,7 +86,7 @@
   ret double %res
 }
 
-define double @f6(double %f1, double *%base, i64 %index, double %acc) {
+define double @f6(double %f1, double *%base, i64 %index, double %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 3
 ; CHECK: msdb %f2, %f0, 0(%r1,%r2)
@@ -102,7 +102,7 @@
   ret double %res
 }
 
-define double @f7(double %f1, double *%base, i64 %index, double %acc) {
+define double @f7(double %f1, double *%base, i64 %index, double %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: sllg %r1, %r3, 3
 ; CHECK: msdb %f2, %f0, 4088({{%r1,%r2|%r2,%r1}})
@@ -119,7 +119,7 @@
   ret double %res
 }
 
-define double @f8(double %f1, double *%base, i64 %index, double %acc) {
+define double @f8(double %f1, double *%base, i64 %index, double %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f8:
 ; CHECK: sllg %r1, %r3, 3
 ; CHECK: lay %r1, 4096({{%r1,%r2|%r2,%r1}})
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-mul-10.ll b/llvm/test/CodeGen/SystemZ/fp-strict-mul-10.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-mul-10.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-mul-10.ll
@@ -3,7 +3,7 @@
 declare double @llvm.experimental.constrained.fma.f64(double %f1, double %f2, double %f3, metadata, metadata)
 declare float @llvm.experimental.constrained.fma.f32(float %f1, float %f2, float %f3, metadata, metadata)
 
-define double @f1(double %f1, double %f2, double %acc) {
+define double @f1(double %f1, double %f2, double %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: wfnmadb %f0, %f0, %f2, %f4
 ; CHECK: br %r14
@@ -15,7 +15,7 @@
   ret double %negres
 }
 
-define double @f2(double %f1, double %f2, double %acc) {
+define double @f2(double %f1, double %f2, double %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: wfnmsdb %f0, %f0, %f2, %f4
 ; CHECK: br %r14
@@ -28,7 +28,7 @@
   ret double %negres
 }
 
-define float @f3(float %f1, float %f2, float %acc) {
+define float @f3(float %f1, float %f2, float %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: wfnmasb %f0, %f0, %f2, %f4
 ; CHECK: br %r14
@@ -40,7 +40,7 @@
   ret float %negres
 }
 
-define float @f4(float %f1, float %f2, float %acc) {
+define float @f4(float %f1, float %f2, float %acc) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: wfnmssb %f0, %f0, %f2, %f4
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-mul-11.ll b/llvm/test/CodeGen/SystemZ/fp-strict-mul-11.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-mul-11.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-mul-11.ll
@@ -4,7 +4,7 @@
 
 declare fp128 @llvm.experimental.constrained.fmul.f128(fp128, fp128, metadata, metadata)
 
-define void @f1(fp128 *%ptr1, fp128 *%ptr2) {
+define void @f1(fp128 *%ptr1, fp128 *%ptr2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2)
 ; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3)
@@ -21,7 +21,7 @@
   ret void
 }
 
-define void @f2(double %f1, double %f2, fp128 *%dst) {
+define void @f2(double %f1, double %f2, fp128 *%dst) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK-DAG: wflld [[REG1:%v[0-9]+]], %f0
 ; CHECK-DAG: wflld [[REG2:%v[0-9]+]], %f2
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-round-01.ll b/llvm/test/CodeGen/SystemZ/fp-strict-round-01.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-round-01.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-round-01.ll
@@ -4,7 +4,7 @@
 
 ; Test rint for f32.
 declare float @llvm.experimental.constrained.rint.f32(float, metadata, metadata)
-define float @f1(float %f) {
+define float @f1(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: fiebr %f0, 0, %f0
 ; CHECK: br %r14
@@ -17,7 +17,7 @@
 
 ; Test rint for f64.
 declare double @llvm.experimental.constrained.rint.f64(double, metadata, metadata)
-define double @f2(double %f) {
+define double @f2(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: fidbr %f0, 0, %f0
 ; CHECK: br %r14
@@ -30,7 +30,7 @@
 
 ; Test rint for f128.
 declare fp128 @llvm.experimental.constrained.rint.f128(fp128, metadata, metadata)
-define void @f3(fp128 *%ptr) {
+define void @f3(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: fixbr %f0, 0, %f0
 ; CHECK: br %r14
@@ -45,7 +45,7 @@
 
 ; Test nearbyint for f32.
 declare float @llvm.experimental.constrained.nearbyint.f32(float, metadata, metadata)
-define float @f4(float %f) {
+define float @f4(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: brasl %r14, nearbyintf@PLT
 ; CHECK: br %r14
@@ -58,7 +58,7 @@
 
 ; Test nearbyint for f64.
 declare double @llvm.experimental.constrained.nearbyint.f64(double, metadata, metadata)
-define double @f5(double %f) {
+define double @f5(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: brasl %r14, nearbyint@PLT
 ; CHECK: br %r14
@@ -71,7 +71,7 @@
 
 ; Test nearbyint for f128.
 declare fp128 @llvm.experimental.constrained.nearbyint.f128(fp128, metadata, metadata)
-define void @f6(fp128 *%ptr) {
+define void @f6(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: brasl %r14, nearbyintl@PLT
 ; CHECK: br %r14
@@ -86,7 +86,7 @@
 
 ; Test floor for f32.
 declare float @llvm.experimental.constrained.floor.f32(float, metadata, metadata)
-define float @f7(float %f) {
+define float @f7(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: brasl %r14, floorf@PLT
 ; CHECK: br %r14
@@ -99,7 +99,7 @@
 
 ; Test floor for f64.
 declare double @llvm.experimental.constrained.floor.f64(double, metadata, metadata)
-define double @f8(double %f) {
+define double @f8(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f8:
 ; CHECK: brasl %r14, floor@PLT
 ; CHECK: br %r14
@@ -112,7 +112,7 @@
 
 ; Test floor for f128.
 declare fp128 @llvm.experimental.constrained.floor.f128(fp128, metadata, metadata)
-define void @f9(fp128 *%ptr) {
+define void @f9(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f9:
 ; CHECK: brasl %r14, floorl@PLT
 ; CHECK: br %r14
@@ -127,7 +127,7 @@
 
 ; Test ceil for f32.
 declare float @llvm.experimental.constrained.ceil.f32(float, metadata, metadata)
-define float @f10(float %f) {
+define float @f10(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f10:
 ; CHECK: brasl %r14, ceilf@PLT
 ; CHECK: br %r14
@@ -140,7 +140,7 @@
 
 ; Test ceil for f64.
 declare double @llvm.experimental.constrained.ceil.f64(double, metadata, metadata)
-define double @f11(double %f) {
+define double @f11(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f11:
 ; CHECK: brasl %r14, ceil@PLT
 ; CHECK: br %r14
@@ -153,7 +153,7 @@
 
 ; Test ceil for f128.
 declare fp128 @llvm.experimental.constrained.ceil.f128(fp128, metadata, metadata)
-define void @f12(fp128 *%ptr) {
+define void @f12(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f12:
 ; CHECK: brasl %r14, ceill@PLT
 ; CHECK: br %r14
@@ -168,7 +168,7 @@
 
 ; Test trunc for f32.
 declare float @llvm.experimental.constrained.trunc.f32(float, metadata, metadata)
-define float @f13(float %f) {
+define float @f13(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f13:
 ; CHECK: brasl %r14, truncf@PLT
 ; CHECK: br %r14
@@ -181,7 +181,7 @@
 
 ; Test trunc for f64.
 declare double @llvm.experimental.constrained.trunc.f64(double, metadata, metadata)
-define double @f14(double %f) {
+define double @f14(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f14:
 ; CHECK: brasl %r14, trunc@PLT
 ; CHECK: br %r14
@@ -194,7 +194,7 @@
 
 ; Test trunc for f128.
 declare fp128 @llvm.experimental.constrained.trunc.f128(fp128, metadata, metadata)
-define void @f15(fp128 *%ptr) {
+define void @f15(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f15:
 ; CHECK: brasl %r14, truncl@PLT
 ; CHECK: br %r14
@@ -209,7 +209,7 @@
 
 ; Test round for f32.
 declare float @llvm.experimental.constrained.round.f32(float, metadata, metadata)
-define float @f16(float %f) {
+define float @f16(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f16:
 ; CHECK: brasl %r14, roundf@PLT
 ; CHECK: br %r14
@@ -222,7 +222,7 @@
 
 ; Test round for f64.
 declare double @llvm.experimental.constrained.round.f64(double, metadata, metadata)
-define double @f17(double %f) {
+define double @f17(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f17:
 ; CHECK: brasl %r14, round@PLT
 ; CHECK: br %r14
@@ -235,7 +235,7 @@
 
 ; Test round for f128.
 declare fp128 @llvm.experimental.constrained.round.f128(fp128, metadata, metadata)
-define void @f18(fp128 *%ptr) {
+define void @f18(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f18:
 ; CHECK: brasl %r14, roundl@PLT
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-round-02.ll b/llvm/test/CodeGen/SystemZ/fp-strict-round-02.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-round-02.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-round-02.ll
@@ -7,7 +7,7 @@
 
 ; Test rint for f32.
 declare float @llvm.experimental.constrained.rint.f32(float, metadata, metadata)
-define float @f1(float %f) {
+define float @f1(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: fiebr %f0, 0, %f0
 ; CHECK: br %r14
@@ -20,7 +20,7 @@
 
 ; Test rint for f64.
 declare double @llvm.experimental.constrained.rint.f64(double, metadata, metadata)
-define double @f2(double %f) {
+define double @f2(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK-SCALAR: fidbr %f0, 0, %f0
 ; CHECK-VECTOR: fidbra %f0, 0, %f0, 0
@@ -34,7 +34,7 @@
 
 ; Test rint for f128.
 declare fp128 @llvm.experimental.constrained.rint.f128(fp128, metadata, metadata)
-define void @f3(fp128 *%ptr) {
+define void @f3(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: fixbr %f0, 0, %f0
 ; CHECK: br %r14
@@ -49,7 +49,7 @@
 
 ; Test nearbyint for f32.
 declare float @llvm.experimental.constrained.nearbyint.f32(float, metadata, metadata)
-define float @f4(float %f) {
+define float @f4(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: fiebra %f0, 0, %f0, 4
 ; CHECK: br %r14
@@ -62,7 +62,7 @@
 
 ; Test nearbyint for f64.
 declare double @llvm.experimental.constrained.nearbyint.f64(double, metadata, metadata)
-define double @f5(double %f) {
+define double @f5(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: fidbra %f0, 0, %f0, 4
 ; CHECK: br %r14
@@ -75,7 +75,7 @@
 
 ; Test nearbyint for f128.
 declare fp128 @llvm.experimental.constrained.nearbyint.f128(fp128, metadata, metadata)
-define void @f6(fp128 *%ptr) {
+define void @f6(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: fixbra %f0, 0, %f0, 4
 ; CHECK: br %r14
@@ -90,7 +90,7 @@
 
 ; Test floor for f32.
 declare float @llvm.experimental.constrained.floor.f32(float, metadata, metadata)
-define float @f7(float %f) {
+define float @f7(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: fiebra %f0, 7, %f0, 4
 ; CHECK: br %r14
@@ -103,7 +103,7 @@
 
 ; Test floor for f64.
 declare double @llvm.experimental.constrained.floor.f64(double, metadata, metadata)
-define double @f8(double %f) {
+define double @f8(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f8:
 ; CHECK: fidbra %f0, 7, %f0, 4
 ; CHECK: br %r14
@@ -116,7 +116,7 @@
 
 ; Test floor for f128.
 declare fp128 @llvm.experimental.constrained.floor.f128(fp128, metadata, metadata)
-define void @f9(fp128 *%ptr) {
+define void @f9(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f9:
 ; CHECK: fixbra %f0, 7, %f0, 4
 ; CHECK: br %r14
@@ -131,7 +131,7 @@
 
 ; Test ceil for f32.
 declare float @llvm.experimental.constrained.ceil.f32(float, metadata, metadata)
-define float @f10(float %f) {
+define float @f10(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f10:
 ; CHECK: fiebra %f0, 6, %f0, 4
 ; CHECK: br %r14
@@ -144,7 +144,7 @@
 
 ; Test ceil for f64.
 declare double @llvm.experimental.constrained.ceil.f64(double, metadata, metadata)
-define double @f11(double %f) {
+define double @f11(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f11:
 ; CHECK: fidbra %f0, 6, %f0, 4
 ; CHECK: br %r14
@@ -157,7 +157,7 @@
 
 ; Test ceil for f128.
 declare fp128 @llvm.experimental.constrained.ceil.f128(fp128, metadata, metadata)
-define void @f12(fp128 *%ptr) {
+define void @f12(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f12:
 ; CHECK: fixbra %f0, 6, %f0, 4
 ; CHECK: br %r14
@@ -172,7 +172,7 @@
 
 ; Test trunc for f32.
 declare float @llvm.experimental.constrained.trunc.f32(float, metadata, metadata)
-define float @f13(float %f) {
+define float @f13(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f13:
 ; CHECK: fiebra %f0, 5, %f0, 4
 ; CHECK: br %r14
@@ -185,7 +185,7 @@
 
 ; Test trunc for f64.
 declare double @llvm.experimental.constrained.trunc.f64(double, metadata, metadata)
-define double @f14(double %f) {
+define double @f14(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f14:
 ; CHECK: fidbra %f0, 5, %f0, 4
 ; CHECK: br %r14
@@ -198,7 +198,7 @@
 
 ; Test trunc for f128.
 declare fp128 @llvm.experimental.constrained.trunc.f128(fp128, metadata, metadata)
-define void @f15(fp128 *%ptr) {
+define void @f15(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f15:
 ; CHECK: fixbra %f0, 5, %f0, 4
 ; CHECK: br %r14
@@ -213,7 +213,7 @@
 
 ; Test round for f32.
 declare float @llvm.experimental.constrained.round.f32(float, metadata, metadata)
-define float @f16(float %f) {
+define float @f16(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f16:
 ; CHECK: fiebra %f0, 1, %f0, 4
 ; CHECK: br %r14
@@ -226,7 +226,7 @@
 
 ; Test round for f64.
 declare double @llvm.experimental.constrained.round.f64(double, metadata, metadata)
-define double @f17(double %f) {
+define double @f17(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f17:
 ; CHECK: fidbra %f0, 1, %f0, 4
 ; CHECK: br %r14
@@ -239,7 +239,7 @@
 
 ; Test round for f128.
 declare fp128 @llvm.experimental.constrained.round.f128(fp128, metadata, metadata)
-define void @f18(fp128 *%ptr) {
+define void @f18(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f18:
 ; CHECK: fixbra %f0, 1, %f0, 4
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-round-03.ll b/llvm/test/CodeGen/SystemZ/fp-strict-round-03.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-round-03.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-round-03.ll
@@ -4,7 +4,7 @@
 
 ; Test rint for f32.
 declare float @llvm.experimental.constrained.rint.f32(float, metadata, metadata)
-define float @f1(float %f) {
+define float @f1(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: fiebra %f0, 0, %f0, 0
 ; CHECK: br %r14
@@ -17,7 +17,7 @@
 
 ; Test rint for f64.
 declare double @llvm.experimental.constrained.rint.f64(double, metadata, metadata)
-define double @f2(double %f) {
+define double @f2(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: fidbra %f0, 0, %f0, 0
 ; CHECK: br %r14
@@ -30,7 +30,7 @@
 
 ; Test rint for f128.
 declare fp128 @llvm.experimental.constrained.rint.f128(fp128, metadata, metadata)
-define void @f3(fp128 *%ptr) {
+define void @f3(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: vl [[REG:%v[0-9]+]], 0(%r2)
 ; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 0, 0
@@ -47,7 +47,7 @@
 
 ; Test nearbyint for f32.
 declare float @llvm.experimental.constrained.nearbyint.f32(float, metadata, metadata)
-define float @f4(float %f) {
+define float @f4(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: fiebra %f0, 0, %f0, 4
 ; CHECK: br %r14
@@ -60,7 +60,7 @@
 
 ; Test nearbyint for f64.
 declare double @llvm.experimental.constrained.nearbyint.f64(double, metadata, metadata)
-define double @f5(double %f) {
+define double @f5(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: fidbra %f0, 0, %f0, 4
 ; CHECK: br %r14
@@ -73,7 +73,7 @@
 
 ; Test nearbyint for f128.
 declare fp128 @llvm.experimental.constrained.nearbyint.f128(fp128, metadata, metadata)
-define void @f6(fp128 *%ptr) {
+define void @f6(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: vl [[REG:%v[0-9]+]], 0(%r2)
 ; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 4, 0
@@ -90,7 +90,7 @@
 
 ; Test floor for f32.
 declare float @llvm.experimental.constrained.floor.f32(float, metadata, metadata)
-define float @f7(float %f) {
+define float @f7(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: fiebra %f0, 7, %f0, 4
 ; CHECK: br %r14
@@ -103,7 +103,7 @@
 
 ; Test floor for f64.
 declare double @llvm.experimental.constrained.floor.f64(double, metadata, metadata)
-define double @f8(double %f) {
+define double @f8(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f8:
 ; CHECK: fidbra %f0, 7, %f0, 4
 ; CHECK: br %r14
@@ -116,7 +116,7 @@
 
 ; Test floor for f128.
 declare fp128 @llvm.experimental.constrained.floor.f128(fp128, metadata, metadata)
-define void @f9(fp128 *%ptr) {
+define void @f9(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f9:
 ; CHECK: vl [[REG:%v[0-9]+]], 0(%r2)
 ; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 4, 7
@@ -133,7 +133,7 @@
 
 ; Test ceil for f32.
 declare float @llvm.experimental.constrained.ceil.f32(float, metadata, metadata)
-define float @f10(float %f) {
+define float @f10(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f10:
 ; CHECK: fiebra %f0, 6, %f0, 4
 ; CHECK: br %r14
@@ -146,7 +146,7 @@
 
 ; Test ceil for f64.
 declare double @llvm.experimental.constrained.ceil.f64(double, metadata, metadata)
-define double @f11(double %f) {
+define double @f11(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f11:
 ; CHECK: fidbra %f0, 6, %f0, 4
 ; CHECK: br %r14
@@ -159,7 +159,7 @@
 
 ; Test ceil for f128.
 declare fp128 @llvm.experimental.constrained.ceil.f128(fp128, metadata, metadata)
-define void @f12(fp128 *%ptr) {
+define void @f12(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f12:
 ; CHECK: vl [[REG:%v[0-9]+]], 0(%r2)
 ; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 4, 6
@@ -176,7 +176,7 @@
 
 ; Test trunc for f32.
 declare float @llvm.experimental.constrained.trunc.f32(float, metadata, metadata)
-define float @f13(float %f) {
+define float @f13(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f13:
 ; CHECK: fiebra %f0, 5, %f0, 4
 ; CHECK: br %r14
@@ -189,7 +189,7 @@
 
 ; Test trunc for f64.
 declare double @llvm.experimental.constrained.trunc.f64(double, metadata, metadata)
-define double @f14(double %f) {
+define double @f14(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f14:
 ; CHECK: fidbra %f0, 5, %f0, 4
 ; CHECK: br %r14
@@ -202,7 +202,7 @@
 
 ; Test trunc for f128.
 declare fp128 @llvm.experimental.constrained.trunc.f128(fp128, metadata, metadata)
-define void @f15(fp128 *%ptr) {
+define void @f15(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f15:
 ; CHECK: vl [[REG:%v[0-9]+]], 0(%r2)
 ; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 4, 5
@@ -219,7 +219,7 @@
 
 ; Test round for f32.
 declare float @llvm.experimental.constrained.round.f32(float, metadata, metadata)
-define float @f16(float %f) {
+define float @f16(float %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f16:
 ; CHECK: fiebra %f0, 1, %f0, 4
 ; CHECK: br %r14
@@ -232,7 +232,7 @@
 
 ; Test round for f64.
 declare double @llvm.experimental.constrained.round.f64(double, metadata, metadata)
-define double @f17(double %f) {
+define double @f17(double %f) strictfp noimplicitfloat {
 ; CHECK-LABEL: f17:
 ; CHECK: fidbra %f0, 1, %f0, 4
 ; CHECK: br %r14
@@ -245,7 +245,7 @@
 
 ; Test round for f128.
 declare fp128 @llvm.experimental.constrained.round.f128(fp128, metadata, metadata)
-define void @f18(fp128 *%ptr) {
+define void @f18(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f18:
 ; CHECK: vl [[REG:%v[0-9]+]], 0(%r2)
 ; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 4, 1
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-sqrt-01.ll b/llvm/test/CodeGen/SystemZ/fp-strict-sqrt-01.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-sqrt-01.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-sqrt-01.ll
@@ -7,7 +7,7 @@
 declare float @llvm.experimental.constrained.sqrt.f32(float, metadata, metadata)
 
 ; Check register square root.
-define float @f1(float %val) {
+define float @f1(float %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: sqebr %f0, %f0
 ; CHECK: br %r14
@@ -19,7 +19,7 @@
 }
 
 ; Check the low end of the SQEB range.
-define float @f2(float *%ptr) {
+define float @f2(float *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: sqeb %f0, 0(%r2)
 ; CHECK: br %r14
@@ -32,7 +32,7 @@
 }
 
 ; Check the high end of the aligned SQEB range.
-define float @f3(float *%base) {
+define float @f3(float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: sqeb %f0, 4092(%r2)
 ; CHECK: br %r14
@@ -47,7 +47,7 @@
 
 ; Check the next word up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
-define float @f4(float *%base) {
+define float @f4(float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r2, 4096
 ; CHECK: sqeb %f0, 0(%r2)
@@ -62,7 +62,7 @@
 }
 
 ; Check negative displacements, which also need separate address logic.
-define float @f5(float *%base) {
+define float @f5(float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r2, -4
 ; CHECK: sqeb %f0, 0(%r2)
@@ -77,7 +77,7 @@
 }
 
 ; Check that SQEB allows indices.
-define float @f6(float *%base, i64 %index) {
+define float @f6(float *%base, i64 %index) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 2
 ; CHECK: sqeb %f0, 400(%r1,%r2)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-sqrt-02.ll b/llvm/test/CodeGen/SystemZ/fp-strict-sqrt-02.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-sqrt-02.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-sqrt-02.ll
@@ -7,7 +7,7 @@
 declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata)
 
 ; Check register square root.
-define double @f1(double %val) {
+define double @f1(double %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: sqdbr %f0, %f0
 ; CHECK: br %r14
@@ -19,7 +19,7 @@
 }
 
 ; Check the low end of the SQDB range.
-define double @f2(double *%ptr) {
+define double @f2(double *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: sqdb %f0, 0(%r2)
 ; CHECK: br %r14
@@ -32,7 +32,7 @@
 }
 
 ; Check the high end of the aligned SQDB range.
-define double @f3(double *%base) {
+define double @f3(double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: sqdb %f0, 4088(%r2)
 ; CHECK: br %r14
@@ -47,7 +47,7 @@
 
 ; Check the next doubleword up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
-define double @f4(double *%base) {
+define double @f4(double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r2, 4096
 ; CHECK: sqdb %f0, 0(%r2)
@@ -62,7 +62,7 @@
 }
 
 ; Check negative displacements, which also need separate address logic.
-define double @f5(double *%base) {
+define double @f5(double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r2, -8
 ; CHECK: sqdb %f0, 0(%r2)
@@ -77,7 +77,7 @@
 }
 
 ; Check that SQDB allows indices.
-define double @f6(double *%base, i64 %index) {
+define double @f6(double *%base, i64 %index) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 3
 ; CHECK: sqdb %f0, 800(%r1,%r2)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-sqrt-03.ll b/llvm/test/CodeGen/SystemZ/fp-strict-sqrt-03.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-sqrt-03.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-sqrt-03.ll
@@ -5,7 +5,7 @@
 declare fp128 @llvm.experimental.constrained.sqrt.f128(fp128, metadata, metadata)
 
 ; There's no memory form of SQXBR.
-define void @f1(fp128 *%ptr) {
+define void @f1(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: ld %f0, 0(%r2)
 ; CHECK: ld %f2, 8(%r2)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-sqrt-04.ll b/llvm/test/CodeGen/SystemZ/fp-strict-sqrt-04.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-sqrt-04.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-sqrt-04.ll
@@ -4,7 +4,7 @@
 
 declare fp128 @llvm.experimental.constrained.sqrt.f128(fp128, metadata, metadata)
 
-define void @f1(fp128 *%ptr) {
+define void @f1(fp128 *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK-DAG: vl [[REG:%v[0-9]+]], 0(%r2)
 ; CHECK: wfsqxb [[RES:%v[0-9]+]], [[REG]]
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-sub-01.ll b/llvm/test/CodeGen/SystemZ/fp-strict-sub-01.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-sub-01.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-sub-01.ll
@@ -8,7 +8,7 @@
 declare float @llvm.experimental.constrained.fsub.f32(float, float, metadata, metadata)
 
 ; Check register subtraction.
-define float @f1(float %f1, float %f2) {
+define float @f1(float %f1, float %f2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: sebr %f0, %f2
 ; CHECK: br %r14
@@ -20,7 +20,7 @@
 }
 
 ; Check the low end of the SEB range.
-define float @f2(float %f1, float *%ptr) {
+define float @f2(float %f1, float *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: seb %f0, 0(%r2)
 ; CHECK: br %r14
@@ -33,7 +33,7 @@
 }
 
 ; Check the high end of the aligned SEB range.
-define float @f3(float %f1, float *%base) {
+define float @f3(float %f1, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: seb %f0, 4092(%r2)
 ; CHECK: br %r14
@@ -48,7 +48,7 @@
 
 ; Check the next word up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
-define float @f4(float %f1, float *%base) {
+define float @f4(float %f1, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r2, 4096
 ; CHECK: seb %f0, 0(%r2)
@@ -63,7 +63,7 @@
 }
 
 ; Check negative displacements, which also need separate address logic.
-define float @f5(float %f1, float *%base) {
+define float @f5(float %f1, float *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r2, -4
 ; CHECK: seb %f0, 0(%r2)
@@ -78,7 +78,7 @@
 }
 
 ; Check that SEB allows indices.
-define float @f6(float %f1, float *%base, i64 %index) {
+define float @f6(float %f1, float *%base, i64 %index) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 2
 ; CHECK: seb %f0, 400(%r1,%r2)
@@ -94,7 +94,7 @@
 }
 
 ; Check that subtractions of spilled values can use SEB rather than SEBR.
-define float @f7(float *%ptr0) {
+define float @f7(float *%ptr0) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: brasl %r14, foo@PLT
 ; CHECK-SCALAR: seb %f0, 16{{[04]}}(%r15)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-sub-02.ll b/llvm/test/CodeGen/SystemZ/fp-strict-sub-02.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-sub-02.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-sub-02.ll
@@ -8,7 +8,7 @@
 declare double @llvm.experimental.constrained.fsub.f64(double, double, metadata, metadata)
 
 ; Check register subtraction.
-define double @f1(double %f1, double %f2) {
+define double @f1(double %f1, double %f2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: sdbr %f0, %f2
 ; CHECK: br %r14
@@ -20,7 +20,7 @@
 }
 
 ; Check the low end of the SDB range.
-define double @f2(double %f1, double *%ptr) {
+define double @f2(double %f1, double *%ptr) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: sdb %f0, 0(%r2)
 ; CHECK: br %r14
@@ -33,7 +33,7 @@
 }
 
 ; Check the high end of the aligned SDB range.
-define double @f3(double %f1, double *%base) {
+define double @f3(double %f1, double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: sdb %f0, 4088(%r2)
 ; CHECK: br %r14
@@ -48,7 +48,7 @@
 
 ; Check the next doubleword up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
-define double @f4(double %f1, double *%base) {
+define double @f4(double %f1, double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r2, 4096
 ; CHECK: sdb %f0, 0(%r2)
@@ -63,7 +63,7 @@
 }
 
 ; Check negative displacements, which also need separate address logic.
-define double @f5(double %f1, double *%base) {
+define double @f5(double %f1, double *%base) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r2, -8
 ; CHECK: sdb %f0, 0(%r2)
@@ -78,7 +78,7 @@
 }
 
 ; Check that SDB allows indices.
-define double @f6(double %f1, double *%base, i64 %index) {
+define double @f6(double %f1, double *%base, i64 %index) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r3, 3
 ; CHECK: sdb %f0, 800(%r1,%r2)
@@ -94,7 +94,7 @@
 }
 
 ; Check that subtractions of spilled values can use SDB rather than SDBR.
-define double @f7(double *%ptr0) {
+define double @f7(double *%ptr0) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: brasl %r14, foo@PLT
 ; CHECK-SCALAR: sdb %f0, 16{{[04]}}(%r15)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-sub-03.ll b/llvm/test/CodeGen/SystemZ/fp-strict-sub-03.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-sub-03.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-sub-03.ll
@@ -5,7 +5,7 @@
 declare fp128 @llvm.experimental.constrained.fsub.f128(fp128, fp128, metadata, metadata)
 
 ; There is no memory form of 128-bit subtraction.
-define void @f1(fp128 *%ptr, float %f2) {
+define void @f1(fp128 *%ptr, float %f2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK-DAG: lxebr %f0, %f0
 ; CHECK-DAG: ld %f1, 0(%r2)
diff --git a/llvm/test/CodeGen/SystemZ/fp-strict-sub-04.ll b/llvm/test/CodeGen/SystemZ/fp-strict-sub-04.ll
--- a/llvm/test/CodeGen/SystemZ/fp-strict-sub-04.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-strict-sub-04.ll
@@ -4,7 +4,7 @@
 
 declare fp128 @llvm.experimental.constrained.fsub.f128(fp128, fp128, metadata, metadata)
 
-define void @f1(fp128 *%ptr1, fp128 *%ptr2) {
+define void @f1(fp128 *%ptr1, fp128 *%ptr2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2)
 ; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3)
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-add-01.ll b/llvm/test/CodeGen/SystemZ/vec-strict-add-01.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-add-01.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-add-01.ll
@@ -7,7 +7,7 @@
 
 ; Test a v2f64 addition.
 define <2 x double> @f5(<2 x double> %dummy, <2 x double> %val1,
-                        <2 x double> %val2) {
+                        <2 x double> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: vfadb %v24, %v26, %v28
 ; CHECK: br %r14
@@ -19,7 +19,7 @@
 }
 
 ; Test an f64 addition that uses vector registers.
-define double @f6(<2 x double> %val1, <2 x double> %val2) {
+define double @f6(<2 x double> %val1, <2 x double> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: wfadb %f0, %v24, %v26
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-add-02.ll b/llvm/test/CodeGen/SystemZ/vec-strict-add-02.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-add-02.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-add-02.ll
@@ -7,7 +7,7 @@
 
 ; Test a v4f32 addition.
 define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1,
-                       <4 x float> %val2) {
+                       <4 x float> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: vfasb %v24, %v26, %v28
 ; CHECK: br %r14
@@ -19,7 +19,7 @@
 }
 
 ; Test an f32 addition that uses vector registers.
-define float @f2(<4 x float> %val1, <4 x float> %val2) {
+define float @f2(<4 x float> %val1, <4 x float> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: wfasb %f0, %v24, %v26
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-conv-01.ll b/llvm/test/CodeGen/SystemZ/vec-strict-conv-01.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-conv-01.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-conv-01.ll
@@ -14,7 +14,7 @@
 declare <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f32(<2 x float>, metadata)
 
 ; Test conversion of f64s to signed i64s.
-define <2 x i64> @f1(<2 x double> %doubles) {
+define <2 x i64> @f1(<2 x double> %doubles) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: vcgdb %v24, %v24, 0, 5
 ; CHECK: br %r14
@@ -24,7 +24,7 @@
 }
 
 ; Test conversion of f64s to unsigned i64s.
-define <2 x i64> @f2(<2 x double> %doubles) {
+define <2 x i64> @f2(<2 x double> %doubles) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: vclgdb %v24, %v24, 0, 5
 ; CHECK: br %r14
@@ -34,7 +34,7 @@
 }
 
 ; Test conversion of f64s to signed i32s, which must compile.
-define void @f5(<2 x double> %doubles, <2 x i32> *%ptr) {
+define void @f5(<2 x double> %doubles, <2 x i32> *%ptr) strictfp noimplicitfloat {
   %words = call <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f64(<2 x double> %doubles,
                                                metadata !"fpexcept.strict")
   store <2 x i32> %words, <2 x i32> *%ptr
@@ -42,7 +42,7 @@
 }
 
 ; Test conversion of f64s to unsigned i32s, which must compile.
-define void @f6(<2 x double> %doubles, <2 x i32> *%ptr) {
+define void @f6(<2 x double> %doubles, <2 x i32> *%ptr) strictfp noimplicitfloat {
   %words = call <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f64(<2 x double> %doubles,
                                                metadata !"fpexcept.strict")
   store <2 x i32> %words, <2 x i32> *%ptr
@@ -50,7 +50,7 @@
 }
 
 ; Test conversion of f32s to signed i64s, which must compile.
-define <2 x i64> @f9(<2 x float> *%ptr) {
+define <2 x i64> @f9(<2 x float> *%ptr) strictfp noimplicitfloat {
   %floats = load <2 x float>, <2 x float> *%ptr
   %dwords = call <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f32(<2 x float> %floats,
                                                metadata !"fpexcept.strict")
@@ -58,7 +58,7 @@
 }
 
 ; Test conversion of f32s to unsigned i64s, which must compile.
-define <2 x i64> @f10(<2 x float> *%ptr) {
+define <2 x i64> @f10(<2 x float> *%ptr) strictfp noimplicitfloat {
   %floats = load <2 x float>, <2 x float> *%ptr
   %dwords = call <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f32(<2 x float> %floats,
                                                metadata !"fpexcept.strict")
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll b/llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll
@@ -8,7 +8,7 @@
 declare <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f32(<4 x float>, metadata)
 
 ; Test conversion of f32s to signed i32s.
-define <4 x i32> @f1(<4 x float> %floats) {
+define <4 x i32> @f1(<4 x float> %floats) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: vcfeb %v24, %v24, 0, 5
 ; CHECK: br %r14
@@ -18,7 +18,7 @@
 }
 
 ; Test conversion of f32s to unsigned i32s.
-define <4 x i32> @f2(<4 x float> %floats) {
+define <4 x i32> @f2(<4 x float> %floats) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: vclfeb %v24, %v24, 0, 5
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-div-01.ll b/llvm/test/CodeGen/SystemZ/vec-strict-div-01.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-div-01.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-div-01.ll
@@ -7,7 +7,7 @@
 
 ; Test a v2f64 division.
 define <2 x double> @f5(<2 x double> %dummy, <2 x double> %val1,
-                        <2 x double> %val2) {
+                        <2 x double> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: vfddb %v24, %v26, %v28
 ; CHECK: br %r14
@@ -19,7 +19,7 @@
 }
 
 ; Test an f64 division that uses vector registers.
-define double @f6(<2 x double> %val1, <2 x double> %val2) {
+define double @f6(<2 x double> %val1, <2 x double> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: wfddb %f0, %v24, %v26
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-div-02.ll b/llvm/test/CodeGen/SystemZ/vec-strict-div-02.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-div-02.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-div-02.ll
@@ -7,7 +7,7 @@
 
 ; Test a v4f32 division.
 define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1,
-                       <4 x float> %val2) {
+                       <4 x float> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: vfdsb %v24, %v26, %v28
 ; CHECK: br %r14
@@ -19,7 +19,7 @@
 }
 
 ; Test an f32 division that uses vector registers.
-define float @f2(<4 x float> %val1, <4 x float> %val2) {
+define float @f2(<4 x float> %val1, <4 x float> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: wfdsb %f0, %v24, %v26
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-max-01.ll b/llvm/test/CodeGen/SystemZ/vec-strict-max-01.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-max-01.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-max-01.ll
@@ -11,7 +11,7 @@
 declare fp128 @llvm.experimental.constrained.maxnum.f128(fp128, fp128, metadata, metadata)
 
 ; Test the f64 maxnum intrinsic.
-define double @f1(double %dummy, double %val1, double %val2) {
+define double @f1(double %dummy, double %val1, double %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: wfmaxdb %f0, %f2, %f4, 4
 ; CHECK: br %r14
@@ -24,7 +24,7 @@
 
 ; Test the v2f64 maxnum intrinsic.
 define <2 x double> @f2(<2 x double> %dummy, <2 x double> %val1,
-                        <2 x double> %val2) {
+                        <2 x double> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: vfmaxdb %v24, %v26, %v28, 4
 ; CHECK: br %r14
@@ -36,7 +36,7 @@
 }
 
 ; Test the f32 maxnum intrinsic.
-define float @f3(float %dummy, float %val1, float %val2) {
+define float @f3(float %dummy, float %val1, float %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: wfmaxsb %f0, %f2, %f4, 4
 ; CHECK: br %r14
@@ -49,7 +49,7 @@
 
 ; Test the v4f32 maxnum intrinsic.
 define <4 x float> @f4(<4 x float> %dummy, <4 x float> %val1,
-                       <4 x float> %val2) {
+                       <4 x float> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: vfmaxsb %v24, %v26, %v28, 4
 ; CHECK: br %r14
@@ -61,7 +61,7 @@
 }
 
 ; Test the f128 maxnum intrinsic.
-define void @f5(fp128 *%ptr1, fp128 *%ptr2, fp128 *%dst) {
+define void @f5(fp128 *%ptr1, fp128 *%ptr2, fp128 *%dst) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2)
 ; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3)
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-min-01.ll b/llvm/test/CodeGen/SystemZ/vec-strict-min-01.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-min-01.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-min-01.ll
@@ -11,7 +11,7 @@
 declare fp128 @llvm.experimental.constrained.minnum.f128(fp128, fp128, metadata, metadata)
 
 ; Test the f64 minnum intrinsic.
-define double @f1(double %dummy, double %val1, double %val2) {
+define double @f1(double %dummy, double %val1, double %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: wfmindb %f0, %f2, %f4, 4
 ; CHECK: br %r14
@@ -24,7 +24,7 @@
 
 ; Test the v2f64 minnum intrinsic.
 define <2 x double> @f2(<2 x double> %dummy, <2 x double> %val1,
-                        <2 x double> %val2) {
+                        <2 x double> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: vfmindb %v24, %v26, %v28, 4
 ; CHECK: br %r14
@@ -36,7 +36,7 @@
 }
 
 ; Test the f32 minnum intrinsic.
-define float @f3(float %dummy, float %val1, float %val2) {
+define float @f3(float %dummy, float %val1, float %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: wfminsb %f0, %f2, %f4, 4
 ; CHECK: br %r14
@@ -49,7 +49,7 @@
 
 ; Test the v4f32 minnum intrinsic.
 define <4 x float> @f4(<4 x float> %dummy, <4 x float> %val1,
-                       <4 x float> %val2) {
+                       <4 x float> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: vfminsb %v24, %v26, %v28, 4
 ; CHECK: br %r14
@@ -61,7 +61,7 @@
 }
 
 ; Test the f128 minnum intrinsic.
-define void @f5(fp128 *%ptr1, fp128 *%ptr2, fp128 *%dst) {
+define void @f5(fp128 *%ptr1, fp128 *%ptr2, fp128 *%dst) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2)
 ; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3)
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-mul-01.ll b/llvm/test/CodeGen/SystemZ/vec-strict-mul-01.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-mul-01.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-mul-01.ll
@@ -7,7 +7,7 @@
 
 ; Test a v2f64 multiplication.
 define <2 x double> @f5(<2 x double> %dummy, <2 x double> %val1,
-                        <2 x double> %val2) {
+                        <2 x double> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: vfmdb %v24, %v26, %v28
 ; CHECK: br %r14
@@ -19,7 +19,7 @@
 }
 
 ; Test an f64 multiplication that uses vector registers.
-define double @f6(<2 x double> %val1, <2 x double> %val2) {
+define double @f6(<2 x double> %val1, <2 x double> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: wfmdb %f0, %v24, %v26
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-mul-02.ll b/llvm/test/CodeGen/SystemZ/vec-strict-mul-02.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-mul-02.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-mul-02.ll
@@ -6,7 +6,8 @@
 
 ; Test a v2f64 multiply-and-add.
 define <2 x double> @f4(<2 x double> %dummy, <2 x double> %val1,
-                        <2 x double> %val2, <2 x double> %val3) {
+                        <2 x double> %val2, <2 x double> %val3)
+                        strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: vfmadb %v24, %v26, %v28, %v30
 ; CHECK: br %r14
@@ -21,7 +22,8 @@
 
 ; Test a v2f64 multiply-and-subtract.
 define <2 x double> @f5(<2 x double> %dummy, <2 x double> %val1,
-                        <2 x double> %val2, <2 x double> %val3) {
+                        <2 x double> %val2, <2 x double> %val3)
+                        strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: vfmsdb %v24, %v26, %v28, %v30
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-mul-03.ll b/llvm/test/CodeGen/SystemZ/vec-strict-mul-03.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-mul-03.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-mul-03.ll
@@ -7,7 +7,7 @@
 
 ; Test a v4f32 multiplication.
 define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1,
-                       <4 x float> %val2) {
+                       <4 x float> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: vfmsb %v24, %v26, %v28
 ; CHECK: br %r14
@@ -19,7 +19,7 @@
 }
 
 ; Test an f32 multiplication that uses vector registers.
-define float @f2(<4 x float> %val1, <4 x float> %val2) {
+define float @f2(<4 x float> %val1, <4 x float> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: wfmsb %f0, %v24, %v26
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-mul-04.ll b/llvm/test/CodeGen/SystemZ/vec-strict-mul-04.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-mul-04.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-mul-04.ll
@@ -6,7 +6,8 @@
 
 ; Test a v4f32 multiply-and-add.
 define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1,
-                       <4 x float> %val2, <4 x float> %val3) {
+                       <4 x float> %val2, <4 x float> %val3)
+                       strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: vfmasb %v24, %v26, %v28, %v30
 ; CHECK: br %r14
@@ -21,7 +22,8 @@
 
 ; Test a v4f32 multiply-and-subtract.
 define <4 x float> @f2(<4 x float> %dummy, <4 x float> %val1,
-                       <4 x float> %val2, <4 x float> %val3) {
+                       <4 x float> %val2, <4 x float> %val3)
+                       strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: vfmssb %v24, %v26, %v28, %v30
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-mul-05.ll b/llvm/test/CodeGen/SystemZ/vec-strict-mul-05.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-mul-05.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-mul-05.ll
@@ -7,7 +7,8 @@
 
 ; Test a v2f64 negative multiply-and-add.
 define <2 x double> @f1(<2 x double> %dummy, <2 x double> %val1,
-                        <2 x double> %val2, <2 x double> %val3) {
+                        <2 x double> %val2, <2 x double> %val3)
+                       strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: vfnmadb %v24, %v26, %v28, %v30
 ; CHECK: br %r14
@@ -23,7 +24,8 @@
 
 ; Test a v2f64 negative multiply-and-subtract.
 define <2 x double> @f2(<2 x double> %dummy, <2 x double> %val1,
-                        <2 x double> %val2, <2 x double> %val3) {
+                        <2 x double> %val2, <2 x double> %val3)
+                       strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: vfnmsdb %v24, %v26, %v28, %v30
 ; CHECK: br %r14
@@ -40,7 +42,8 @@
 
 ; Test a v4f32 negative multiply-and-add.
 define <4 x float> @f3(<4 x float> %dummy, <4 x float> %val1,
-                       <4 x float> %val2, <4 x float> %val3) {
+                       <4 x float> %val2, <4 x float> %val3)
+                       strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: vfnmasb %v24, %v26, %v28, %v30
 ; CHECK: br %r14
@@ -57,7 +60,8 @@
 
 ; Test a v4f32 negative multiply-and-subtract.
 define <4 x float> @f4(<4 x float> %dummy, <4 x float> %val1,
-                       <4 x float> %val2, <4 x float> %val3) {
+                       <4 x float> %val2, <4 x float> %val3)
+                       strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: vfnmssb %v24, %v26, %v28, %v30
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-round-01.ll b/llvm/test/CodeGen/SystemZ/vec-strict-round-01.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-round-01.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-round-01.ll
@@ -15,7 +15,7 @@
 declare <2 x double> @llvm.experimental.constrained.trunc.v2f64(<2 x double>, metadata, metadata)
 declare <2 x double> @llvm.experimental.constrained.round.v2f64(<2 x double>, metadata, metadata)
 
-define <2 x double> @f1(<2 x double> %val) {
+define <2 x double> @f1(<2 x double> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: vfidb %v24, %v24, 0, 0
 ; CHECK: br %r14
@@ -26,7 +26,7 @@
   ret <2 x double> %res
 }
 
-define <2 x double> @f2(<2 x double> %val) {
+define <2 x double> @f2(<2 x double> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: vfidb %v24, %v24, 4, 0
 ; CHECK: br %r14
@@ -37,7 +37,7 @@
   ret <2 x double> %res
 }
 
-define <2 x double> @f3(<2 x double> %val) {
+define <2 x double> @f3(<2 x double> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: vfidb %v24, %v24, 4, 7
 ; CHECK: br %r14
@@ -48,7 +48,7 @@
   ret <2 x double> %res
 }
 
-define <2 x double> @f4(<2 x double> %val) {
+define <2 x double> @f4(<2 x double> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: vfidb %v24, %v24, 4, 6
 ; CHECK: br %r14
@@ -59,7 +59,7 @@
   ret <2 x double> %res
 }
 
-define <2 x double> @f5(<2 x double> %val) {
+define <2 x double> @f5(<2 x double> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: vfidb %v24, %v24, 4, 5
 ; CHECK: br %r14
@@ -70,7 +70,7 @@
   ret <2 x double> %res
 }
 
-define <2 x double> @f6(<2 x double> %val) {
+define <2 x double> @f6(<2 x double> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: vfidb %v24, %v24, 4, 1
 ; CHECK: br %r14
@@ -81,7 +81,7 @@
   ret <2 x double> %res
 }
 
-define double @f7(<2 x double> %val) {
+define double @f7(<2 x double> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: wfidb %f0, %v24, 0, 0
 ; CHECK: br %r14
@@ -93,7 +93,7 @@
   ret double %res
 }
 
-define double @f8(<2 x double> %val) {
+define double @f8(<2 x double> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f8:
 ; CHECK: wfidb %f0, %v24, 4, 0
 ; CHECK: br %r14
@@ -105,7 +105,7 @@
   ret double %res
 }
 
-define double @f9(<2 x double> %val) {
+define double @f9(<2 x double> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f9:
 ; CHECK: wfidb %f0, %v24, 4, 7
 ; CHECK: br %r14
@@ -118,7 +118,7 @@
 }
 
 
-define double @f10(<2 x double> %val) {
+define double @f10(<2 x double> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f10:
 ; CHECK: wfidb %f0, %v24, 4, 6
 ; CHECK: br %r14
@@ -130,7 +130,7 @@
   ret double %res
 }
 
-define double @f11(<2 x double> %val) {
+define double @f11(<2 x double> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f11:
 ; CHECK: wfidb %f0, %v24, 4, 5
 ; CHECK: br %r14
@@ -142,7 +142,7 @@
   ret double %res
 }
 
-define double @f12(<2 x double> %val) {
+define double @f12(<2 x double> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f12:
 ; CHECK: wfidb %f0, %v24, 4, 1
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-round-02.ll b/llvm/test/CodeGen/SystemZ/vec-strict-round-02.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-round-02.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-round-02.ll
@@ -15,7 +15,7 @@
 declare <4 x float> @llvm.experimental.constrained.trunc.v4f32(<4 x float>, metadata, metadata)
 declare <4 x float> @llvm.experimental.constrained.round.v4f32(<4 x float>, metadata, metadata)
 
-define <4 x float> @f1(<4 x float> %val) {
+define <4 x float> @f1(<4 x float> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: vfisb %v24, %v24, 0, 0
 ; CHECK: br %r14
@@ -26,7 +26,7 @@
   ret <4 x float> %res
 }
 
-define <4 x float> @f2(<4 x float> %val) {
+define <4 x float> @f2(<4 x float> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: vfisb %v24, %v24, 4, 0
 ; CHECK: br %r14
@@ -37,7 +37,7 @@
   ret <4 x float> %res
 }
 
-define <4 x float> @f3(<4 x float> %val) {
+define <4 x float> @f3(<4 x float> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f3:
 ; CHECK: vfisb %v24, %v24, 4, 7
 ; CHECK: br %r14
@@ -48,7 +48,7 @@
   ret <4 x float> %res
 }
 
-define <4 x float> @f4(<4 x float> %val) {
+define <4 x float> @f4(<4 x float> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f4:
 ; CHECK: vfisb %v24, %v24, 4, 6
 ; CHECK: br %r14
@@ -59,7 +59,7 @@
   ret <4 x float> %res
 }
 
-define <4 x float> @f5(<4 x float> %val) {
+define <4 x float> @f5(<4 x float> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f5:
 ; CHECK: vfisb %v24, %v24, 4, 5
 ; CHECK: br %r14
@@ -70,7 +70,7 @@
   ret <4 x float> %res
 }
 
-define <4 x float> @f6(<4 x float> %val) {
+define <4 x float> @f6(<4 x float> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: vfisb %v24, %v24, 4, 1
 ; CHECK: br %r14
@@ -81,7 +81,7 @@
   ret <4 x float> %res
 }
 
-define float @f7(<4 x float> %val) {
+define float @f7(<4 x float> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: wfisb %f0, %v24, 0, 0
 ; CHECK: br %r14
@@ -93,7 +93,7 @@
   ret float %res
 }
 
-define float @f8(<4 x float> %val) {
+define float @f8(<4 x float> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f8:
 ; CHECK: wfisb %f0, %v24, 4, 0
 ; CHECK: br %r14
@@ -105,7 +105,7 @@
   ret float %res
 }
 
-define float @f9(<4 x float> %val) {
+define float @f9(<4 x float> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f9:
 ; CHECK: wfisb %f0, %v24, 4, 7
 ; CHECK: br %r14
@@ -117,7 +117,7 @@
   ret float %res
 }
 
-define float @f10(<4 x float> %val) {
+define float @f10(<4 x float> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f10:
 ; CHECK: wfisb %f0, %v24, 4, 6
 ; CHECK: br %r14
@@ -129,7 +129,7 @@
   ret float %res
 }
 
-define float @f11(<4 x float> %val) {
+define float @f11(<4 x float> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f11:
 ; CHECK: wfisb %f0, %v24, 4, 5
 ; CHECK: br %r14
@@ -141,7 +141,7 @@
   ret float %res
 }
 
-define float @f12(<4 x float> %val) {
+define float @f12(<4 x float> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f12:
 ; CHECK: wfisb %f0, %v24, 4, 1
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-sqrt-01.ll b/llvm/test/CodeGen/SystemZ/vec-strict-sqrt-01.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-sqrt-01.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-sqrt-01.ll
@@ -5,7 +5,7 @@
 declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata)
 declare <2 x double> @llvm.experimental.constrained.sqrt.v2f64(<2 x double>, metadata, metadata)
 
-define <2 x double> @f1(<2 x double> %val) {
+define <2 x double> @f1(<2 x double> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: vfsqdb %v24, %v24
 ; CHECK: br %r14
@@ -16,7 +16,7 @@
   ret <2 x double> %ret
 }
 
-define double @f2(<2 x double> %val) {
+define double @f2(<2 x double> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: wfsqdb %f0, %v24
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-sqrt-02.ll b/llvm/test/CodeGen/SystemZ/vec-strict-sqrt-02.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-sqrt-02.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-sqrt-02.ll
@@ -5,7 +5,7 @@
 declare float @llvm.experimental.constrained.sqrt.f32(float, metadata, metadata)
 declare <4 x float> @llvm.experimental.constrained.sqrt.v4f32(<4 x float>, metadata, metadata)
 
-define <4 x float> @f1(<4 x float> %val) {
+define <4 x float> @f1(<4 x float> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f1:
 ; CHECK: vfsqsb %v24, %v24
 ; CHECK: br %r14
@@ -16,7 +16,7 @@
   ret <4 x float> %ret
 }
 
-define float @f2(<4 x float> %val) {
+define float @f2(<4 x float> %val) strictfp noimplicitfloat {
 ; CHECK-LABEL: f2:
 ; CHECK: wfsqsb %f0, %v24
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-sub-01.ll b/llvm/test/CodeGen/SystemZ/vec-strict-sub-01.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-sub-01.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-sub-01.ll
@@ -7,7 +7,7 @@
 
 ; Test a v2f64 subtraction.
 define <2 x double> @f6(<2 x double> %dummy, <2 x double> %val1,
-                        <2 x double> %val2) {
+                        <2 x double> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: vfsdb %v24, %v26, %v28
 ; CHECK: br %r14
@@ -19,7 +19,7 @@
 }
 
 ; Test an f64 subtraction that uses vector registers.
-define double @f7(<2 x double> %val1, <2 x double> %val2) {
+define double @f7(<2 x double> %val1, <2 x double> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: wfsdb %f0, %v24, %v26
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-sub-02.ll b/llvm/test/CodeGen/SystemZ/vec-strict-sub-02.ll
--- a/llvm/test/CodeGen/SystemZ/vec-strict-sub-02.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-strict-sub-02.ll
@@ -7,7 +7,7 @@
 
 ; Test a v4f32 subtraction.
 define <4 x float> @f6(<4 x float> %dummy, <4 x float> %val1,
-                       <4 x float> %val2) {
+                       <4 x float> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f6:
 ; CHECK: vfssb %v24, %v26, %v28
 ; CHECK: br %r14
@@ -19,7 +19,7 @@
 }
 
 ; Test an f32 subtraction that uses vector registers.
-define float @f7(<4 x float> %val1, <4 x float> %val2) {
+define float @f7(<4 x float> %val1, <4 x float> %val2) strictfp noimplicitfloat {
 ; CHECK-LABEL: f7:
 ; CHECK: wfssb %f0, %v24, %v26
 ; CHECK: br %r14
diff --git a/llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll b/llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
--- a/llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
+++ b/llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
@@ -2,7 +2,7 @@
 ; RUN: llc -O3 -mtriple=s390x-linux-gnu  < %s | FileCheck --check-prefix=S390X %s
 ; RUN: llc -O3 -mtriple=s390x-linux-gnu -mcpu=z13 < %s | FileCheck --check-prefix=SZ13 %s
 
-define <1 x float> @constrained_vector_fdiv_v1f32() {
+define <1 x float> @constrained_vector_fdiv_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fdiv_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI0_0
@@ -27,7 +27,7 @@
   ret <1 x float> %div
 }
 
-define <2 x double> @constrained_vector_fdiv_v2f64() {
+define <2 x double> @constrained_vector_fdiv_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fdiv_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI1_0
@@ -57,7 +57,7 @@
   ret <2 x double> %div
 }
 
-define <3 x float> @constrained_vector_fdiv_v3f32() {
+define <3 x float> @constrained_vector_fdiv_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fdiv_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI2_0
@@ -97,7 +97,7 @@
   ret <3 x float> %div
 }
 
-define void @constrained_vector_fdiv_v3f64(<3 x double>* %a) {
+define void @constrained_vector_fdiv_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fdiv_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    ld %f0, 16(%r2)
@@ -139,7 +139,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_fdiv_v4f64() {
+define <4 x double> @constrained_vector_fdiv_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fdiv_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI4_0
@@ -180,7 +180,7 @@
   ret <4 x double> %div
 }
 
-define <1 x float> @constrained_vector_frem_v1f32() {
+define <1 x float> @constrained_vector_frem_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_frem_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -220,7 +220,7 @@
   ret <1 x float> %rem
 }
 
-define <2 x double> @constrained_vector_frem_v2f64() {
+define <2 x double> @constrained_vector_frem_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_frem_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -285,7 +285,7 @@
   ret <2 x double> %rem
 }
 
-define <3 x float> @constrained_vector_frem_v3f32() {
+define <3 x float> @constrained_vector_frem_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_frem_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -369,7 +369,7 @@
   ret <3 x float> %rem
 }
 
-define void @constrained_vector_frem_v3f64(<3 x double>* %a) {
+define void @constrained_vector_frem_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_frem_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
@@ -461,7 +461,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_frem_v4f64() {
+define <4 x double> @constrained_vector_frem_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_frem_v4f64:
 ; S390X:       # %bb.0:
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -562,7 +562,7 @@
   ret <4 x double> %rem
 }
 
-define <1 x float> @constrained_vector_fmul_v1f32() {
+define <1 x float> @constrained_vector_fmul_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fmul_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI10_0
@@ -587,7 +587,7 @@
   ret <1 x float> %mul
 }
 
-define <2 x double> @constrained_vector_fmul_v2f64() {
+define <2 x double> @constrained_vector_fmul_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fmul_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI11_0
@@ -617,7 +617,7 @@
   ret <2 x double> %mul
 }
 
-define <3 x float> @constrained_vector_fmul_v3f32() {
+define <3 x float> @constrained_vector_fmul_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fmul_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI12_0
@@ -656,7 +656,7 @@
   ret <3 x float> %mul
 }
 
-define void @constrained_vector_fmul_v3f64(<3 x double>* %a) {
+define void @constrained_vector_fmul_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fmul_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    ld %f0, 8(%r2)
@@ -696,7 +696,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_fmul_v4f64() {
+define <4 x double> @constrained_vector_fmul_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fmul_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI14_0
@@ -737,7 +737,7 @@
   ret <4 x double> %mul
 }
 
-define <1 x float> @constrained_vector_fadd_v1f32() {
+define <1 x float> @constrained_vector_fadd_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fadd_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI15_0
@@ -762,7 +762,7 @@
   ret <1 x float> %add
 }
 
-define <2 x double> @constrained_vector_fadd_v2f64() {
+define <2 x double> @constrained_vector_fadd_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fadd_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI16_0
@@ -792,7 +792,7 @@
   ret <2 x double> %add
 }
 
-define <3 x float> @constrained_vector_fadd_v3f32() {
+define <3 x float> @constrained_vector_fadd_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fadd_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI17_0
@@ -829,7 +829,7 @@
   ret <3 x float> %add
 }
 
-define void @constrained_vector_fadd_v3f64(<3 x double>* %a) {
+define void @constrained_vector_fadd_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fadd_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    ld %f0, 8(%r2)
@@ -869,7 +869,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_fadd_v4f64() {
+define <4 x double> @constrained_vector_fadd_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fadd_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI19_0
@@ -910,7 +910,7 @@
   ret <4 x double> %add
 }
 
-define <1 x float> @constrained_vector_fsub_v1f32() {
+define <1 x float> @constrained_vector_fsub_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fsub_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI20_0
@@ -935,7 +935,7 @@
   ret <1 x float> %sub
 }
 
-define <2 x double> @constrained_vector_fsub_v2f64() {
+define <2 x double> @constrained_vector_fsub_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fsub_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI21_0
@@ -964,7 +964,7 @@
   ret <2 x double> %sub
 }
 
-define <3 x float> @constrained_vector_fsub_v3f32() {
+define <3 x float> @constrained_vector_fsub_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fsub_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI22_0
@@ -1004,7 +1004,7 @@
   ret <3 x float> %sub
 }
 
-define void @constrained_vector_fsub_v3f64(<3 x double>* %a) {
+define void @constrained_vector_fsub_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fsub_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI23_0
@@ -1043,7 +1043,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_fsub_v4f64() {
+define <4 x double> @constrained_vector_fsub_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fsub_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI24_0
@@ -1084,7 +1084,7 @@
   ret <4 x double> %sub
 }
 
-define <1 x float> @constrained_vector_sqrt_v1f32() {
+define <1 x float> @constrained_vector_sqrt_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_sqrt_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI25_0
@@ -1105,7 +1105,7 @@
   ret <1 x float> %sqrt
 }
 
-define <2 x double> @constrained_vector_sqrt_v2f64() {
+define <2 x double> @constrained_vector_sqrt_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_sqrt_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI26_0
@@ -1129,7 +1129,7 @@
   ret <2 x double> %sqrt
 }
 
-define <3 x float> @constrained_vector_sqrt_v3f32() {
+define <3 x float> @constrained_vector_sqrt_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_sqrt_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI27_0
@@ -1160,7 +1160,7 @@
   ret <3 x float> %sqrt
 }
 
-define void @constrained_vector_sqrt_v3f64(<3 x double>* %a) {
+define void @constrained_vector_sqrt_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_sqrt_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    ld %f0, 8(%r2)
@@ -1191,7 +1191,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_sqrt_v4f64() {
+define <4 x double> @constrained_vector_sqrt_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_sqrt_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI29_0
@@ -1223,7 +1223,7 @@
   ret <4 x double> %sqrt
 }
 
-define <1 x float> @constrained_vector_pow_v1f32() {
+define <1 x float> @constrained_vector_pow_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_pow_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -1264,7 +1264,7 @@
   ret <1 x float> %pow
 }
 
-define <2 x double> @constrained_vector_pow_v2f64() {
+define <2 x double> @constrained_vector_pow_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_pow_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -1331,7 +1331,7 @@
   ret <2 x double> %pow
 }
 
-define <3 x float> @constrained_vector_pow_v3f32() {
+define <3 x float> @constrained_vector_pow_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_pow_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -1417,7 +1417,7 @@
   ret <3 x float> %pow
 }
 
-define void @constrained_vector_pow_v3f64(<3 x double>* %a) {
+define void @constrained_vector_pow_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_pow_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
@@ -1513,7 +1513,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_pow_v4f64() {
+define <4 x double> @constrained_vector_pow_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_pow_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -1617,7 +1617,7 @@
   ret <4 x double> %pow
 }
 
-define <1 x float> @constrained_vector_powi_v1f32() {
+define <1 x float> @constrained_vector_powi_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_powi_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -1656,7 +1656,7 @@
   ret <1 x float> %powi
 }
 
-define <2 x double> @constrained_vector_powi_v2f64() {
+define <2 x double> @constrained_vector_powi_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_powi_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -1713,7 +1713,7 @@
   ret <2 x double> %powi
 }
 
-define <3 x float> @constrained_vector_powi_v3f32() {
+define <3 x float> @constrained_vector_powi_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_powi_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -1789,7 +1789,7 @@
   ret <3 x float> %powi
 }
 
-define void @constrained_vector_powi_v3f64(<3 x double>* %a) {
+define void @constrained_vector_powi_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_powi_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
@@ -1870,7 +1870,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_powi_v4f64() {
+define <4 x double> @constrained_vector_powi_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_powi_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -1963,7 +1963,7 @@
   ret <4 x double> %powi
 }
 
-define <1 x float> @constrained_vector_sin_v1f32() {
+define <1 x float> @constrained_vector_sin_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_sin_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -1999,7 +1999,7 @@
   ret <1 x float> %sin
 }
 
-define <2 x double> @constrained_vector_sin_v2f64() {
+define <2 x double> @constrained_vector_sin_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_sin_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -2051,7 +2051,7 @@
   ret <2 x double> %sin
 }
 
-define <3 x float> @constrained_vector_sin_v3f32() {
+define <3 x float> @constrained_vector_sin_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_sin_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -2120,7 +2120,7 @@
   ret <3 x float> %sin
 }
 
-define void @constrained_vector_sin_v3f64(<3 x double>* %a) {
+define void @constrained_vector_sin_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_sin_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
@@ -2199,7 +2199,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_sin_v4f64() {
+define <4 x double> @constrained_vector_sin_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_sin_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -2283,7 +2283,7 @@
   ret <4 x double> %sin
 }
 
-define <1 x float> @constrained_vector_cos_v1f32() {
+define <1 x float> @constrained_vector_cos_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_cos_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -2319,7 +2319,7 @@
   ret <1 x float> %cos
 }
 
-define <2 x double> @constrained_vector_cos_v2f64() {
+define <2 x double> @constrained_vector_cos_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_cos_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -2371,7 +2371,7 @@
   ret <2 x double> %cos
 }
 
-define <3 x float> @constrained_vector_cos_v3f32() {
+define <3 x float> @constrained_vector_cos_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_cos_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -2440,7 +2440,7 @@
   ret <3 x float> %cos
 }
 
-define void @constrained_vector_cos_v3f64(<3 x double>* %a) {
+define void @constrained_vector_cos_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_cos_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
@@ -2519,7 +2519,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_cos_v4f64() {
+define <4 x double> @constrained_vector_cos_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_cos_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -2603,7 +2603,7 @@
   ret <4 x double> %cos
 }
 
-define <1 x float> @constrained_vector_exp_v1f32() {
+define <1 x float> @constrained_vector_exp_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_exp_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -2639,7 +2639,7 @@
   ret <1 x float> %exp
 }
 
-define <2 x double> @constrained_vector_exp_v2f64() {
+define <2 x double> @constrained_vector_exp_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_exp_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -2691,7 +2691,7 @@
   ret <2 x double> %exp
 }
 
-define <3 x float> @constrained_vector_exp_v3f32() {
+define <3 x float> @constrained_vector_exp_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_exp_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -2760,7 +2760,7 @@
   ret <3 x float> %exp
 }
 
-define void @constrained_vector_exp_v3f64(<3 x double>* %a) {
+define void @constrained_vector_exp_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_exp_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
@@ -2839,7 +2839,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_exp_v4f64() {
+define <4 x double> @constrained_vector_exp_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_exp_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -2923,7 +2923,7 @@
   ret <4 x double> %exp
 }
 
-define <1 x float> @constrained_vector_exp2_v1f32() {
+define <1 x float> @constrained_vector_exp2_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_exp2_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -2959,7 +2959,7 @@
   ret <1 x float> %exp2
 }
 
-define <2 x double> @constrained_vector_exp2_v2f64() {
+define <2 x double> @constrained_vector_exp2_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_exp2_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -3011,7 +3011,7 @@
   ret <2 x double> %exp2
 }
 
-define <3 x float> @constrained_vector_exp2_v3f32() {
+define <3 x float> @constrained_vector_exp2_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_exp2_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -3080,7 +3080,7 @@
   ret <3 x float> %exp2
 }
 
-define void @constrained_vector_exp2_v3f64(<3 x double>* %a) {
+define void @constrained_vector_exp2_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_exp2_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
@@ -3159,7 +3159,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_exp2_v4f64() {
+define <4 x double> @constrained_vector_exp2_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_exp2_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -3243,7 +3243,7 @@
   ret <4 x double> %exp2
 }
 
-define <1 x float> @constrained_vector_log_v1f32() {
+define <1 x float> @constrained_vector_log_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_log_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -3279,7 +3279,7 @@
   ret <1 x float> %log
 }
 
-define <2 x double> @constrained_vector_log_v2f64() {
+define <2 x double> @constrained_vector_log_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_log_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -3331,7 +3331,7 @@
   ret <2 x double> %log
 }
 
-define <3 x float> @constrained_vector_log_v3f32() {
+define <3 x float> @constrained_vector_log_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_log_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -3400,7 +3400,7 @@
   ret <3 x float> %log
 }
 
-define void @constrained_vector_log_v3f64(<3 x double>* %a) {
+define void @constrained_vector_log_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_log_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
@@ -3479,7 +3479,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_log_v4f64() {
+define <4 x double> @constrained_vector_log_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_log_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -3563,7 +3563,7 @@
   ret <4 x double> %log
 }
 
-define <1 x float> @constrained_vector_log10_v1f32() {
+define <1 x float> @constrained_vector_log10_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_log10_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -3599,7 +3599,7 @@
   ret <1 x float> %log10
 }
 
-define <2 x double> @constrained_vector_log10_v2f64() {
+define <2 x double> @constrained_vector_log10_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_log10_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -3651,7 +3651,7 @@
   ret <2 x double> %log10
 }
 
-define <3 x float> @constrained_vector_log10_v3f32() {
+define <3 x float> @constrained_vector_log10_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_log10_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -3720,7 +3720,7 @@
   ret <3 x float> %log10
 }
 
-define void @constrained_vector_log10_v3f64(<3 x double>* %a) {
+define void @constrained_vector_log10_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_log10_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
@@ -3799,7 +3799,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_log10_v4f64() {
+define <4 x double> @constrained_vector_log10_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_log10_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -3883,7 +3883,7 @@
   ret <4 x double> %log10
 }
 
-define <1 x float> @constrained_vector_log2_v1f32() {
+define <1 x float> @constrained_vector_log2_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_log2_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -3919,7 +3919,7 @@
   ret <1 x float> %log2
 }
 
-define <2 x double> @constrained_vector_log2_v2f64() {
+define <2 x double> @constrained_vector_log2_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_log2_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -3971,7 +3971,7 @@
   ret <2 x double> %log2
 }
 
-define <3 x float> @constrained_vector_log2_v3f32() {
+define <3 x float> @constrained_vector_log2_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_log2_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -4040,7 +4040,7 @@
   ret <3 x float> %log2
 }
 
-define void @constrained_vector_log2_v3f64(<3 x double>* %a) {
+define void @constrained_vector_log2_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_log2_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
@@ -4119,7 +4119,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_log2_v4f64() {
+define <4 x double> @constrained_vector_log2_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_log2_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -4203,7 +4203,7 @@
   ret <4 x double> %log2
 }
 
-define <1 x float> @constrained_vector_rint_v1f32() {
+define <1 x float> @constrained_vector_rint_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_rint_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI75_0
@@ -4226,7 +4226,7 @@
   ret <1 x float> %rint
 }
 
-define <2 x double> @constrained_vector_rint_v2f64() {
+define <2 x double> @constrained_vector_rint_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_rint_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI76_0
@@ -4251,7 +4251,7 @@
   ret <2 x double> %rint
 }
 
-define <3 x float> @constrained_vector_rint_v3f32() {
+define <3 x float> @constrained_vector_rint_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_rint_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI77_0
@@ -4288,7 +4288,7 @@
   ret <3 x float> %rint
 }
 
-define void @constrained_vector_rint_v3f64(<3 x double>* %a) {
+define void @constrained_vector_rint_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_rint_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    ld %f0, 0(%r2)
@@ -4321,7 +4321,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_rint_v4f64() {
+define <4 x double> @constrained_vector_rint_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_rint_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI79_0
@@ -4356,7 +4356,7 @@
   ret <4 x double> %rint
 }
 
-define <1 x float> @constrained_vector_nearbyint_v1f32() {
+define <1 x float> @constrained_vector_nearbyint_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_nearbyint_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -4385,7 +4385,7 @@
   ret <1 x float> %nearby
 }
 
-define <2 x double> @constrained_vector_nearbyint_v2f64() {
+define <2 x double> @constrained_vector_nearbyint_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_nearbyint_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -4423,7 +4423,7 @@
   ret <2 x double> %nearby
 }
 
-define <3 x float> @constrained_vector_nearbyint_v3f32() {
+define <3 x float> @constrained_vector_nearbyint_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_nearbyint_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -4479,7 +4479,7 @@
   ret <3 x float> %nearby
 }
 
-define void @constrained_vector_nearbyint_v3f64(<3 x double>* %a) {
+define void @constrained_vector_nearbyint_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_nearbyint_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
@@ -4533,7 +4533,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_nearbyint_v4f64() {
+define <4 x double> @constrained_vector_nearbyint_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_nearbyint_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -4593,7 +4593,7 @@
   ret <4 x double> %nearby
 }
 
-define <1 x float> @constrained_vector_maxnum_v1f32() {
+define <1 x float> @constrained_vector_maxnum_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_maxnum_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -4633,7 +4633,7 @@
   ret <1 x float> %max
 }
 
-define <2 x double> @constrained_vector_maxnum_v2f64() {
+define <2 x double> @constrained_vector_maxnum_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_maxnum_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -4694,7 +4694,7 @@
   ret <2 x double> %max
 }
 
-define <3 x float> @constrained_vector_maxnum_v3f32() {
+define <3 x float> @constrained_vector_maxnum_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_maxnum_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -4782,7 +4782,7 @@
   ret <3 x float> %max
 }
 
-define void @constrained_vector_log10_maxnum_v3f64(<3 x double>* %a) {
+define void @constrained_vector_log10_maxnum_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_log10_maxnum_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
@@ -4874,7 +4874,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_maxnum_v4f64() {
+define <4 x double> @constrained_vector_maxnum_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_maxnum_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -4976,7 +4976,7 @@
   ret <4 x double> %max
 }
 
-define <1 x float> @constrained_vector_minnum_v1f32() {
+define <1 x float> @constrained_vector_minnum_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_minnum_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -5016,7 +5016,7 @@
   ret <1 x float> %min
 }
 
-define <2 x double> @constrained_vector_minnum_v2f64() {
+define <2 x double> @constrained_vector_minnum_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_minnum_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -5077,7 +5077,7 @@
   ret <2 x double> %min
 }
 
-define <3 x float> @constrained_vector_minnum_v3f32() {
+define <3 x float> @constrained_vector_minnum_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_minnum_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -5165,7 +5165,7 @@
   ret <3 x float> %min
 }
 
-define void @constrained_vector_minnum_v3f64(<3 x double>* %a) {
+define void @constrained_vector_minnum_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_minnum_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
@@ -5261,7 +5261,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_minnum_v4f64() {
+define <4 x double> @constrained_vector_minnum_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_minnum_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -5363,7 +5363,7 @@
   ret <4 x double> %min
 }
 
-define <1 x float> @constrained_vector_fptrunc_v1f64() {
+define <1 x float> @constrained_vector_fptrunc_v1f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fptrunc_v1f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI95_0
@@ -5385,7 +5385,7 @@
   ret <1 x float> %result
 }
 
-define <2 x float> @constrained_vector_fptrunc_v2f64() {
+define <2 x float> @constrained_vector_fptrunc_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fptrunc_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI96_0
@@ -5415,7 +5415,7 @@
   ret <2 x float> %result
 }
 
-define void @constrained_vector_fptrunc_v3f64(<3 x double>* %src, <3 x float>* %dest) {
+define void @constrained_vector_fptrunc_v3f64(<3 x double>* %src, <3 x float>* %dest) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fptrunc_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    ld %f0, 0(%r2)
@@ -5456,7 +5456,7 @@
   ret void
 }
 
-define <4 x float> @constrained_vector_fptrunc_v4f64() {
+define <4 x float> @constrained_vector_fptrunc_v4f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fptrunc_v4f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI98_0
@@ -5500,7 +5500,7 @@
   ret <4 x float> %result
 }
 
-define <1 x double> @constrained_vector_fpext_v1f32() {
+define <1 x double> @constrained_vector_fpext_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fpext_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI99_0
@@ -5520,7 +5520,7 @@
   ret <1 x double> %result
 }
 
-define <2 x double> @constrained_vector_fpext_v2f32() {
+define <2 x double> @constrained_vector_fpext_v2f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fpext_v2f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI100_0
@@ -5544,7 +5544,7 @@
   ret <2 x double> %result
 }
 
-define void @constrained_vector_fpext_v3f64(<3 x float>* %src, <3 x double>* %dest) {
+define void @constrained_vector_fpext_v3f64(<3 x float>* %src, <3 x double>* %dest) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fpext_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    lg %r0, 0(%r2)
@@ -5581,7 +5581,7 @@
   ret void
 }
 
-define <4 x double> @constrained_vector_fpext_v4f32() {
+define <4 x double> @constrained_vector_fpext_v4f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_fpext_v4f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI102_0
@@ -5615,7 +5615,7 @@
   ret <4 x double> %result
 }
 
-define <1 x float> @constrained_vector_ceil_v1f32() {
+define <1 x float> @constrained_vector_ceil_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_ceil_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -5643,7 +5643,7 @@
   ret <1 x float> %ceil
 }
 
-define <2 x double> @constrained_vector_ceil_v2f64() {
+define <2 x double> @constrained_vector_ceil_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_ceil_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -5681,7 +5681,7 @@
   ret <2 x double> %ceil
 }
 
-define <3 x float> @constrained_vector_ceil_v3f32() {
+define <3 x float> @constrained_vector_ceil_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_ceil_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -5736,7 +5736,7 @@
   ret <3 x float> %ceil
 }
 
-define void @constrained_vector_ceil_v3f64(<3 x double>* %a) {
+define void @constrained_vector_ceil_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_ceil_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
@@ -5790,7 +5790,7 @@
   ret void
 }
 
-define <1 x float> @constrained_vector_floor_v1f32() {
+define <1 x float> @constrained_vector_floor_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_floor_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -5819,7 +5819,7 @@
 }
 
 
-define <2 x double> @constrained_vector_floor_v2f64() {
+define <2 x double> @constrained_vector_floor_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_floor_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -5857,7 +5857,7 @@
   ret <2 x double> %floor
 }
 
-define <3 x float> @constrained_vector_floor_v3f32() {
+define <3 x float> @constrained_vector_floor_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_floor_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -5912,7 +5912,7 @@
   ret <3 x float> %floor
 }
 
-define void @constrained_vector_floor_v3f64(<3 x double>* %a) {
+define void @constrained_vector_floor_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_floor_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
@@ -5966,7 +5966,7 @@
   ret void
 }
 
-define <1 x float> @constrained_vector_round_v1f32() {
+define <1 x float> @constrained_vector_round_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_round_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -5994,7 +5994,7 @@
   ret <1 x float> %round
 }
 
-define <2 x double> @constrained_vector_round_v2f64() {
+define <2 x double> @constrained_vector_round_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_round_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -6032,7 +6032,7 @@
   ret <2 x double> %round
 }
 
-define <3 x float> @constrained_vector_round_v3f32() {
+define <3 x float> @constrained_vector_round_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_round_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -6088,7 +6088,7 @@
 }
 
 
-define void @constrained_vector_round_v3f64(<3 x double>* %a) {
+define void @constrained_vector_round_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_round_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
@@ -6142,7 +6142,7 @@
   ret void
 }
 
-define <1 x float> @constrained_vector_trunc_v1f32() {
+define <1 x float> @constrained_vector_trunc_v1f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_trunc_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -6170,7 +6170,7 @@
   ret <1 x float> %trunc
 }
 
-define <2 x double> @constrained_vector_trunc_v2f64() {
+define <2 x double> @constrained_vector_trunc_v2f64() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_trunc_v2f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -6208,7 +6208,7 @@
   ret <2 x double> %trunc
 }
 
-define <3 x float> @constrained_vector_trunc_v3f32() {
+define <3 x float> @constrained_vector_trunc_v3f32() strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_trunc_v3f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r14, %r15, 112(%r15)
@@ -6263,7 +6263,7 @@
   ret <3 x float> %trunc
 }
 
-define void @constrained_vector_trunc_v3f64(<3 x double>* %a) {
+define void @constrained_vector_trunc_v3f64(<3 x double>* %a) strictfp noimplicitfloat {
 ; S390X-LABEL: constrained_vector_trunc_v3f64:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    stmg %r13, %r15, 104(%r15)
diff --git a/llvm/test/CodeGen/X86/constrained-fp80-trunc-ext.ll b/llvm/test/CodeGen/X86/constrained-fp80-trunc-ext.ll
--- a/llvm/test/CodeGen/X86/constrained-fp80-trunc-ext.ll
+++ b/llvm/test/CodeGen/X86/constrained-fp80-trunc-ext.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -O3 -mtriple=x86_64-gnu-linux < %s | FileCheck %s
 
-define x86_fp80 @constrained_fpext_f32_as_fp80(float %mem) {
+define x86_fp80 @constrained_fpext_f32_as_fp80(float %mem) strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_fpext_f32_as_fp80:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movss %xmm0, -{{[0-9]+}}(%rsp)
@@ -14,7 +14,7 @@
   ret x86_fp80 %ext
 }
 
-define float @constrained_fptrunc_f80_to_f32(x86_fp80 %reg) {
+define float @constrained_fptrunc_f80_to_f32(x86_fp80 %reg) strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_fptrunc_f80_to_f32:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    fldt {{[0-9]+}}(%rsp)
@@ -28,7 +28,7 @@
   ret float %trunc
 }
 
-define x86_fp80 @constrained_fpext_f64_to_f80(double %mem) {
+define x86_fp80 @constrained_fpext_f64_to_f80(double %mem) strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_fpext_f64_to_f80:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movsd %xmm0, -{{[0-9]+}}(%rsp)
@@ -41,7 +41,7 @@
   ret x86_fp80 %ext
 }
 
-define double @constrained_fptrunc_f80_to_f64(x86_fp80 %reg) {
+define double @constrained_fptrunc_f80_to_f64(x86_fp80 %reg) strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_fptrunc_f80_to_f64:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    fldt {{[0-9]+}}(%rsp)
diff --git a/llvm/test/CodeGen/X86/fp-intrinsics.ll b/llvm/test/CodeGen/X86/fp-intrinsics.ll
--- a/llvm/test/CodeGen/X86/fp-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/fp-intrinsics.ll
@@ -11,7 +11,7 @@
 ;
 ; CHECK-LABEL: f1
 ; COMMON: divsd
-define double @f1() {
+define double @f1() strictfp noimplicitfloat {
 entry:
   %div = call double @llvm.experimental.constrained.fdiv.f64(
                                                double 1.000000e+00,
@@ -31,7 +31,7 @@
 ;
 ; CHECK-LABEL: f2
 ; COMMON:  subsd
-define double @f2(double %a) {
+define double @f2(double %a) strictfp noimplicitfloat {
 entry:
   %sub = call double @llvm.experimental.constrained.fsub.f64(
                                                double %a,
@@ -54,7 +54,7 @@
 ; COMMON:  subsd
 ; COMMON:  mulsd
 ; COMMON:  subsd
-define double @f3(double %a, double %b) {
+define double @f3(double %a, double %b) strictfp noimplicitfloat {
 entry:
   %sub = call double @llvm.experimental.constrained.fsub.f64(
                                                double -0.000000e+00, double %a,
@@ -87,7 +87,7 @@
 ; COMMON: testl
 ; COMMON: jle
 ; COMMON: addsd
-define double @f4(i32 %n, double %a) {
+define double @f4(i32 %n, double %a) strictfp noimplicitfloat {
 entry:
   %cmp = icmp sgt i32 %n, 0
   br i1 %cmp, label %if.then, label %if.end
@@ -107,7 +107,7 @@
 ; Verify that sqrt(42.0) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f5
 ; COMMON:  sqrtsd
-define double @f5() {
+define double @f5() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.sqrt.f64(double 42.0,
                                                metadata !"round.dynamic",
@@ -118,7 +118,7 @@
 ; Verify that pow(42.1, 3.0) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f6
 ; COMMON:  pow
-define double @f6() {
+define double @f6() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.pow.f64(double 42.1,
                                                double 3.0,
@@ -130,7 +130,7 @@
 ; Verify that powi(42.1, 3) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f7
 ; COMMON:  powi
-define double @f7() {
+define double @f7() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.powi.f64(double 42.1,
                                                i32 3,
@@ -142,7 +142,7 @@
 ; Verify that sin(42.0) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f8
 ; COMMON:  sin
-define double @f8() {
+define double @f8() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.sin.f64(double 42.0,
                                                metadata !"round.dynamic",
@@ -153,7 +153,7 @@
 ; Verify that cos(42.0) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f9
 ; COMMON:  cos
-define double @f9() {
+define double @f9() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.cos.f64(double 42.0,
                                                metadata !"round.dynamic",
@@ -164,7 +164,7 @@
 ; Verify that exp(42.0) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f10
 ; COMMON:  exp
-define double @f10() {
+define double @f10() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.exp.f64(double 42.0,
                                                metadata !"round.dynamic",
@@ -175,7 +175,7 @@
 ; Verify that exp2(42.1) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f11
 ; COMMON:  exp2
-define double @f11() {
+define double @f11() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.exp2.f64(double 42.1,
                                                metadata !"round.dynamic",
@@ -186,7 +186,7 @@
 ; Verify that log(42.0) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f12
 ; COMMON:  log
-define double @f12() {
+define double @f12() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.log.f64(double 42.0,
                                                metadata !"round.dynamic",
@@ -197,7 +197,7 @@
 ; Verify that log10(42.0) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f13
 ; COMMON:  log10
-define double @f13() {
+define double @f13() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.log10.f64(double 42.0,
                                                metadata !"round.dynamic",
@@ -208,7 +208,7 @@
 ; Verify that log2(42.0) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f14
 ; COMMON:  log2
-define double @f14() {
+define double @f14() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.log2.f64(double 42.0,
                                                metadata !"round.dynamic",
@@ -220,7 +220,7 @@
 ; CHECK-LABEL: f15
 ; NO-FMA:  rint
 ; HAS-FMA: vroundsd
-define double @f15() {
+define double @f15() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.rint.f64(double 42.1,
                                                metadata !"round.dynamic",
@@ -233,7 +233,7 @@
 ; CHECK-LABEL: f16
 ; NO-FMA:  nearbyint
 ; HAS-FMA: vroundsd
-define double @f16() {
+define double @f16() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.nearbyint.f64(
                                                double 42.1,
@@ -247,7 +247,7 @@
 ; CHECK-LABEL: f17
 ; FMACALL32: jmp fmaf  # TAILCALL
 ; FMA32: vfmadd213ss
-define float @f17() {
+define float @f17() strictfp noimplicitfloat {
 entry:
   %result = call float @llvm.experimental.constrained.fma.f32(
                                                float 3.5,
@@ -263,7 +263,7 @@
 ; CHECK-LABEL: f18
 ; FMACALL64: jmp fma  # TAILCALL
 ; FMA64: vfmadd213sd
-define double @f18() {
+define double @f18() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.fma.f64(
                                                double 42.1,
@@ -276,7 +276,7 @@
 
 ; CHECK-LABEL: f19
 ; COMMON: fmod
-define double @f19() {
+define double @f19() strictfp noimplicitfloat {
 entry:
   %rem = call double @llvm.experimental.constrained.frem.f64(
                                                double 1.000000e+00,
@@ -312,7 +312,7 @@
 ; HAS-FMA: setae
 ; HAS-FMA: shll
 ; HAS-FMA: xorl
-define i32 @f20u(double %x) {
+define i32 @f20u(double %x) strictfp noimplicitfloat {
 entry:
   %result = call i32 @llvm.experimental.constrained.fptoui.i32.f64(double %x,
                                                metadata !"fpexcept.strict")
@@ -324,7 +324,7 @@
 ; Verify that no gross errors happen.
 ; CHECK-LABEL: @f21
 ; COMMON: cvtsd2ss
-define float @f21() {
+define float @f21() strictfp noimplicitfloat {
 entry:
   %result = call float @llvm.experimental.constrained.fptrunc.f32.f64(
                                                double 42.1,
@@ -335,7 +335,7 @@
 
 ; CHECK-LABEL: @f22
 ; COMMON: cvtss2sd
-define double @f22(float %x) {
+define double @f22(float %x) strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.fpext.f64.f32(float %x,
                                                metadata !"fpexcept.strict")
diff --git a/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-fma.ll b/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-fma.ll
--- a/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-fma.ll
+++ b/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-fma.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+fma < %s | FileCheck %s
 
-define <1 x float> @constrained_vector_fma_v1f32() {
+define <1 x float> @constrained_vector_fma_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fma_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
@@ -18,7 +18,7 @@
   ret <1 x float> %fma
 }
 
-define <2 x double> @constrained_vector_fma_v2f64() {
+define <2 x double> @constrained_vector_fma_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fma_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    vmovapd {{.*#+}} xmm1 = [1.5E+0,5.0E-1]
@@ -35,7 +35,7 @@
   ret <2 x double> %fma
 }
 
-define <3 x float> @constrained_vector_fma_v3f32() {
+define <3 x float> @constrained_vector_fma_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fma_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
@@ -60,7 +60,7 @@
   ret <3 x float> %fma
 }
 
-define <3 x double> @constrained_vector_fma_v3f64() {
+define <3 x double> @constrained_vector_fma_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fma_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
@@ -81,7 +81,7 @@
   ret <3 x double> %fma
 }
 
-define <4 x double> @constrained_vector_fma_v4f64() {
+define <4 x double> @constrained_vector_fma_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fma_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    vmovapd {{.*#+}} ymm1 = [3.5E+0,2.5E+0,1.5E+0,5.0E-1]
@@ -98,7 +98,7 @@
   ret <4 x double> %fma
 }
 
-define <4 x float> @constrained_vector_fma_v4f32() {
+define <4 x float> @constrained_vector_fma_v4f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fma_v4f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    vmovaps {{.*#+}} xmm1 = [3.5E+0,2.5E+0,1.5E+0,5.0E-1]
@@ -115,7 +115,7 @@
   ret <4 x float> %fma
 }
 
-define <8 x float> @constrained_vector_fma_v8f32() {
+define <8 x float> @constrained_vector_fma_v8f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fma_v8f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    vmovaps {{.*#+}} ymm1 = [3.5E+0,2.5E+0,1.5E+0,5.0E-1,7.5E+0,6.5E+0,5.5E+0,4.5E+0]
diff --git a/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll b/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
--- a/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
@@ -2,7 +2,7 @@
 ; RUN: llc -O3 -mtriple=x86_64-pc-linux < %s | FileCheck %s
 ; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+avx < %s | FileCheck --check-prefix=AVX %s
 
-define <1 x float> @constrained_vector_fdiv_v1f32() {
+define <1 x float> @constrained_vector_fdiv_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fdiv_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
@@ -23,7 +23,7 @@
   ret <1 x float> %div
 }
 
-define <2 x double> @constrained_vector_fdiv_v2f64() {
+define <2 x double> @constrained_vector_fdiv_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fdiv_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0]
@@ -44,7 +44,7 @@
   ret <2 x double> %div
 }
 
-define <3 x float> @constrained_vector_fdiv_v3f32() {
+define <3 x float> @constrained_vector_fdiv_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fdiv_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
@@ -79,7 +79,7 @@
   ret <3 x float> %div
 }
 
-define <3 x double> @constrained_vector_fdiv_v3f64() {
+define <3 x double> @constrained_vector_fdiv_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fdiv_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0]
@@ -109,7 +109,7 @@
   ret <3 x double> %div
 }
 
-define <4 x double> @constrained_vector_fdiv_v4f64() {
+define <4 x double> @constrained_vector_fdiv_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fdiv_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movapd {{.*#+}} xmm2 = [1.0E+1,1.0E+1]
@@ -135,7 +135,7 @@
   ret <4 x double> %div
 }
 
-define <1 x float> @constrained_vector_frem_v1f32() {
+define <1 x float> @constrained_vector_frem_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_frem_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -166,7 +166,7 @@
   ret <1 x float> %rem
 }
 
-define <2 x double> @constrained_vector_frem_v2f64() {
+define <2 x double> @constrained_vector_frem_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_frem_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -209,7 +209,7 @@
   ret <2 x double> %rem
 }
 
-define <3 x float> @constrained_vector_frem_v3f32() {
+define <3 x float> @constrained_vector_frem_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_frem_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -265,7 +265,7 @@
   ret <3 x float> %rem
 }
 
-define <3 x double> @constrained_vector_frem_v3f64() {
+define <3 x double> @constrained_vector_frem_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_frem_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -323,7 +323,7 @@
   ret <3 x double> %rem
 }
 
-define <4 x double> @constrained_vector_frem_v4f64() {
+define <4 x double> @constrained_vector_frem_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_frem_v4f64:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    subq $40, %rsp
@@ -390,7 +390,7 @@
   ret <4 x double> %rem
 }
 
-define <1 x float> @constrained_vector_fmul_v1f32() {
+define <1 x float> @constrained_vector_fmul_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fmul_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
@@ -411,7 +411,7 @@
   ret <1 x float> %mul
 }
 
-define <2 x double> @constrained_vector_fmul_v2f64() {
+define <2 x double> @constrained_vector_fmul_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fmul_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]
@@ -432,7 +432,7 @@
   ret <2 x double> %mul
 }
 
-define <3 x float> @constrained_vector_fmul_v3f32() {
+define <3 x float> @constrained_vector_fmul_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fmul_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
@@ -464,7 +464,7 @@
   ret <3 x float> %mul
 }
 
-define <3 x double> @constrained_vector_fmul_v3f64() {
+define <3 x double> @constrained_vector_fmul_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fmul_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]
@@ -495,7 +495,7 @@
   ret <3 x double> %mul
 }
 
-define <4 x double> @constrained_vector_fmul_v4f64() {
+define <4 x double> @constrained_vector_fmul_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fmul_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movapd {{.*#+}} xmm1 = [1.7976931348623157E+308,1.7976931348623157E+308]
@@ -520,7 +520,7 @@
   ret <4 x double> %mul
 }
 
-define <1 x float> @constrained_vector_fadd_v1f32() {
+define <1 x float> @constrained_vector_fadd_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fadd_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
@@ -541,7 +541,7 @@
   ret <1 x float> %add
 }
 
-define <2 x double> @constrained_vector_fadd_v2f64() {
+define <2 x double> @constrained_vector_fadd_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fadd_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
@@ -567,7 +567,7 @@
   ret <2 x double> %add
 }
 
-define <3 x float> @constrained_vector_fadd_v3f32() {
+define <3 x float> @constrained_vector_fadd_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fadd_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xorps %xmm1, %xmm1
@@ -600,7 +600,7 @@
   ret <3 x float> %add
 }
 
-define <3 x double> @constrained_vector_fadd_v3f64() {
+define <3 x double> @constrained_vector_fadd_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fadd_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xorpd %xmm2, %xmm2
@@ -633,7 +633,7 @@
   ret <3 x double> %add
 }
 
-define <4 x double> @constrained_vector_fadd_v4f64() {
+define <4 x double> @constrained_vector_fadd_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fadd_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movsd {{.*#+}} xmm1 = mem[0],zero
@@ -670,7 +670,7 @@
   ret <4 x double> %add
 }
 
-define <1 x float> @constrained_vector_fsub_v1f32() {
+define <1 x float> @constrained_vector_fsub_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fsub_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
@@ -691,7 +691,7 @@
   ret <1 x float> %sub
 }
 
-define <2 x double> @constrained_vector_fsub_v2f64() {
+define <2 x double> @constrained_vector_fsub_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fsub_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
@@ -717,7 +717,7 @@
   ret <2 x double> %sub
 }
 
-define <3 x float> @constrained_vector_fsub_v3f32() {
+define <3 x float> @constrained_vector_fsub_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fsub_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xorps %xmm0, %xmm0
@@ -751,7 +751,7 @@
   ret <3 x float> %sub
 }
 
-define <3 x double> @constrained_vector_fsub_v3f64() {
+define <3 x double> @constrained_vector_fsub_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fsub_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xorpd %xmm0, %xmm0
@@ -785,7 +785,7 @@
   ret <3 x double> %sub
 }
 
-define <4 x double> @constrained_vector_fsub_v4f64() {
+define <4 x double> @constrained_vector_fsub_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fsub_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movsd {{.*#+}} xmm1 = mem[0],zero
@@ -822,7 +822,7 @@
   ret <4 x double> %sub
 }
 
-define <1 x float> @constrained_vector_sqrt_v1f32() {
+define <1 x float> @constrained_vector_sqrt_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_sqrt_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
@@ -842,7 +842,7 @@
   ret <1 x float> %sqrt
 }
 
-define <2 x double> @constrained_vector_sqrt_v2f64() {
+define <2 x double> @constrained_vector_sqrt_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_sqrt_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    sqrtpd {{.*}}(%rip), %xmm0
@@ -860,7 +860,7 @@
   ret <2 x double> %sqrt
 }
 
-define <3 x float> @constrained_vector_sqrt_v3f32() {
+define <3 x float> @constrained_vector_sqrt_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_sqrt_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
@@ -892,7 +892,7 @@
   ret <3 x float> %sqrt
 }
 
-define <3 x double> @constrained_vector_sqrt_v3f64() {
+define <3 x double> @constrained_vector_sqrt_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_sqrt_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
@@ -919,7 +919,7 @@
   ret <3 x double> %sqrt
 }
 
-define <4 x double> @constrained_vector_sqrt_v4f64() {
+define <4 x double> @constrained_vector_sqrt_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_sqrt_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    sqrtpd {{.*}}(%rip), %xmm0
@@ -939,7 +939,7 @@
   ret <4 x double> %sqrt
 }
 
-define <1 x float> @constrained_vector_pow_v1f32() {
+define <1 x float> @constrained_vector_pow_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_pow_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -970,7 +970,7 @@
   ret <1 x float> %pow
 }
 
-define <2 x double> @constrained_vector_pow_v2f64() {
+define <2 x double> @constrained_vector_pow_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_pow_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -1013,7 +1013,7 @@
   ret <2 x double> %pow
 }
 
-define <3 x float> @constrained_vector_pow_v3f32() {
+define <3 x float> @constrained_vector_pow_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_pow_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -1069,7 +1069,7 @@
   ret <3 x float> %pow
 }
 
-define <3 x double> @constrained_vector_pow_v3f64() {
+define <3 x double> @constrained_vector_pow_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_pow_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -1127,7 +1127,7 @@
   ret <3 x double> %pow
 }
 
-define <4 x double> @constrained_vector_pow_v4f64() {
+define <4 x double> @constrained_vector_pow_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_pow_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -1195,7 +1195,7 @@
   ret <4 x double> %pow
 }
 
-define <1 x float> @constrained_vector_powi_v1f32() {
+define <1 x float> @constrained_vector_powi_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_powi_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -1226,7 +1226,7 @@
   ret <1 x float> %powi
 }
 
-define <2 x double> @constrained_vector_powi_v2f64() {
+define <2 x double> @constrained_vector_powi_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_powi_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -1269,7 +1269,7 @@
   ret <2 x double> %powi
 }
 
-define <3 x float> @constrained_vector_powi_v3f32() {
+define <3 x float> @constrained_vector_powi_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_powi_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -1325,7 +1325,7 @@
   ret <3 x float> %powi
 }
 
-define <3 x double> @constrained_vector_powi_v3f64() {
+define <3 x double> @constrained_vector_powi_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_powi_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -1383,7 +1383,7 @@
   ret <3 x double> %powi
 }
 
-define <4 x double> @constrained_vector_powi_v4f64() {
+define <4 x double> @constrained_vector_powi_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_powi_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -1450,7 +1450,7 @@
   ret <4 x double> %powi
 }
 
-define <1 x float> @constrained_vector_sin_v1f32() {
+define <1 x float> @constrained_vector_sin_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_sin_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -1478,7 +1478,7 @@
   ret <1 x float> %sin
 }
 
-define <2 x double> @constrained_vector_sin_v2f64() {
+define <2 x double> @constrained_vector_sin_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_sin_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -1516,7 +1516,7 @@
   ret <2 x double> %sin
 }
 
-define <3 x float> @constrained_vector_sin_v3f32() {
+define <3 x float> @constrained_vector_sin_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_sin_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -1565,7 +1565,7 @@
   ret <3 x float> %sin
 }
 
-define <3 x double> @constrained_vector_sin_v3f64() {
+define <3 x double> @constrained_vector_sin_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_sin_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -1616,7 +1616,7 @@
   ret <3 x double> %sin
 }
 
-define <4 x double> @constrained_vector_sin_v4f64() {
+define <4 x double> @constrained_vector_sin_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_sin_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -1674,7 +1674,7 @@
   ret <4 x double> %sin
 }
 
-define <1 x float> @constrained_vector_cos_v1f32() {
+define <1 x float> @constrained_vector_cos_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_cos_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -1702,7 +1702,7 @@
   ret <1 x float> %cos
 }
 
-define <2 x double> @constrained_vector_cos_v2f64() {
+define <2 x double> @constrained_vector_cos_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_cos_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -1740,7 +1740,7 @@
   ret <2 x double> %cos
 }
 
-define <3 x float> @constrained_vector_cos_v3f32() {
+define <3 x float> @constrained_vector_cos_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_cos_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -1789,7 +1789,7 @@
   ret <3 x float> %cos
 }
 
-define <3 x double> @constrained_vector_cos_v3f64() {
+define <3 x double> @constrained_vector_cos_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_cos_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -1840,7 +1840,7 @@
   ret <3 x double> %cos
 }
 
-define <4 x double> @constrained_vector_cos_v4f64() {
+define <4 x double> @constrained_vector_cos_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_cos_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -1898,7 +1898,7 @@
   ret <4 x double> %cos
 }
 
-define <1 x float> @constrained_vector_exp_v1f32() {
+define <1 x float> @constrained_vector_exp_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_exp_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -1926,7 +1926,7 @@
   ret <1 x float> %exp
 }
 
-define <2 x double> @constrained_vector_exp_v2f64() {
+define <2 x double> @constrained_vector_exp_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_exp_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -1964,7 +1964,7 @@
   ret <2 x double> %exp
 }
 
-define <3 x float> @constrained_vector_exp_v3f32() {
+define <3 x float> @constrained_vector_exp_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_exp_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -2013,7 +2013,7 @@
   ret <3 x float> %exp
 }
 
-define <3 x double> @constrained_vector_exp_v3f64() {
+define <3 x double> @constrained_vector_exp_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_exp_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -2064,7 +2064,7 @@
   ret <3 x double> %exp
 }
 
-define <4 x double> @constrained_vector_exp_v4f64() {
+define <4 x double> @constrained_vector_exp_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_exp_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -2122,7 +2122,7 @@
   ret <4 x double> %exp
 }
 
-define <1 x float> @constrained_vector_exp2_v1f32() {
+define <1 x float> @constrained_vector_exp2_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_exp2_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -2150,7 +2150,7 @@
   ret <1 x float> %exp2
 }
 
-define <2 x double> @constrained_vector_exp2_v2f64() {
+define <2 x double> @constrained_vector_exp2_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_exp2_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -2188,7 +2188,7 @@
   ret <2 x double> %exp2
 }
 
-define <3 x float> @constrained_vector_exp2_v3f32() {
+define <3 x float> @constrained_vector_exp2_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_exp2_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -2237,7 +2237,7 @@
   ret <3 x float> %exp2
 }
 
-define <3 x double> @constrained_vector_exp2_v3f64() {
+define <3 x double> @constrained_vector_exp2_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_exp2_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -2288,7 +2288,7 @@
   ret <3 x double> %exp2
 }
 
-define <4 x double> @constrained_vector_exp2_v4f64() {
+define <4 x double> @constrained_vector_exp2_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_exp2_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -2346,7 +2346,7 @@
   ret <4 x double> %exp2
 }
 
-define <1 x float> @constrained_vector_log_v1f32() {
+define <1 x float> @constrained_vector_log_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_log_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -2374,7 +2374,7 @@
   ret <1 x float> %log
 }
 
-define <2 x double> @constrained_vector_log_v2f64() {
+define <2 x double> @constrained_vector_log_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_log_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -2412,7 +2412,7 @@
   ret <2 x double> %log
 }
 
-define <3 x float> @constrained_vector_log_v3f32() {
+define <3 x float> @constrained_vector_log_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_log_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -2461,7 +2461,7 @@
   ret <3 x float> %log
 }
 
-define <3 x double> @constrained_vector_log_v3f64() {
+define <3 x double> @constrained_vector_log_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_log_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -2512,7 +2512,7 @@
   ret <3 x double> %log
 }
 
-define <4 x double> @constrained_vector_log_v4f64() {
+define <4 x double> @constrained_vector_log_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_log_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -2570,7 +2570,7 @@
   ret <4 x double> %log
 }
 
-define <1 x float> @constrained_vector_log10_v1f32() {
+define <1 x float> @constrained_vector_log10_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_log10_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -2598,7 +2598,7 @@
   ret <1 x float> %log10
 }
 
-define <2 x double> @constrained_vector_log10_v2f64() {
+define <2 x double> @constrained_vector_log10_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_log10_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -2636,7 +2636,7 @@
   ret <2 x double> %log10
 }
 
-define <3 x float> @constrained_vector_log10_v3f32() {
+define <3 x float> @constrained_vector_log10_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_log10_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -2685,7 +2685,7 @@
   ret <3 x float> %log10
 }
 
-define <3 x double> @constrained_vector_log10_v3f64() {
+define <3 x double> @constrained_vector_log10_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_log10_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -2736,7 +2736,7 @@
   ret <3 x double> %log10
 }
 
-define <4 x double> @constrained_vector_log10_v4f64() {
+define <4 x double> @constrained_vector_log10_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_log10_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -2794,7 +2794,7 @@
   ret <4 x double> %log10
 }
 
-define <1 x float> @constrained_vector_log2_v1f32() {
+define <1 x float> @constrained_vector_log2_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_log2_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -2822,7 +2822,7 @@
   ret <1 x float> %log2
 }
 
-define <2 x double> @constrained_vector_log2_v2f64() {
+define <2 x double> @constrained_vector_log2_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_log2_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -2860,7 +2860,7 @@
   ret <2 x double> %log2
 }
 
-define <3 x float> @constrained_vector_log2_v3f32() {
+define <3 x float> @constrained_vector_log2_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_log2_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -2909,7 +2909,7 @@
   ret <3 x float> %log2
 }
 
-define <3 x double> @constrained_vector_log2_v3f64() {
+define <3 x double> @constrained_vector_log2_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_log2_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -2960,7 +2960,7 @@
   ret <3 x double> %log2
 }
 
-define <4 x double> @constrained_vector_log2_v4f64() {
+define <4 x double> @constrained_vector_log2_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_log2_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -3018,7 +3018,7 @@
   ret <4 x double> %log2
 }
 
-define <1 x float> @constrained_vector_rint_v1f32() {
+define <1 x float> @constrained_vector_rint_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_rint_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -3042,7 +3042,7 @@
   ret <1 x float> %rint
 }
 
-define <2 x double> @constrained_vector_rint_v2f64() {
+define <2 x double> @constrained_vector_rint_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_rint_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -3070,7 +3070,7 @@
   ret <2 x double> %rint
 }
 
-define <3 x float> @constrained_vector_rint_v3f32() {
+define <3 x float> @constrained_vector_rint_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_rint_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -3111,7 +3111,7 @@
   ret <3 x float> %rint
 }
 
-define <3 x double> @constrained_vector_rint_v3f64() {
+define <3 x double> @constrained_vector_rint_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_rint_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -3149,7 +3149,7 @@
   ret <3 x double> %rint
 }
 
-define <4 x double> @constrained_vector_rint_v4f64() {
+define <4 x double> @constrained_vector_rint_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_rint_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -3188,7 +3188,7 @@
   ret <4 x double> %rint
 }
 
-define <1 x float> @constrained_vector_nearbyint_v1f32() {
+define <1 x float> @constrained_vector_nearbyint_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_nearbyint_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -3212,7 +3212,7 @@
   ret <1 x float> %nearby
 }
 
-define <2 x double> @constrained_vector_nearbyint_v2f64() {
+define <2 x double> @constrained_vector_nearbyint_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_nearbyint_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -3240,7 +3240,7 @@
   ret <2 x double> %nearby
 }
 
-define <3 x float> @constrained_vector_nearbyint_v3f32() {
+define <3 x float> @constrained_vector_nearbyint_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_nearbyint_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -3281,7 +3281,7 @@
   ret <3 x float> %nearby
 }
 
-define <3 x double> @constrained_vector_nearby_v3f64() {
+define <3 x double> @constrained_vector_nearby_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_nearby_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -3319,7 +3319,7 @@
   ret <3 x double> %nearby
 }
 
-define <4 x double> @constrained_vector_nearbyint_v4f64() {
+define <4 x double> @constrained_vector_nearbyint_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_nearbyint_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -3358,7 +3358,7 @@
   ret <4 x double> %nearby
 }
 
-define <1 x float> @constrained_vector_maxnum_v1f32() {
+define <1 x float> @constrained_vector_maxnum_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_maxnum_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -3388,7 +3388,7 @@
   ret <1 x float> %max
 }
 
-define <2 x double> @constrained_vector_maxnum_v2f64() {
+define <2 x double> @constrained_vector_maxnum_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_maxnum_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -3431,7 +3431,7 @@
   ret <2 x double> %max
 }
 
-define <3 x float> @constrained_vector_maxnum_v3f32() {
+define <3 x float> @constrained_vector_maxnum_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_maxnum_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -3487,7 +3487,7 @@
   ret <3 x float> %max
 }
 
-define <3 x double> @constrained_vector_max_v3f64() {
+define <3 x double> @constrained_vector_max_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_max_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -3545,7 +3545,7 @@
   ret <3 x double> %max
 }
 
-define <4 x double> @constrained_vector_maxnum_v4f64() {
+define <4 x double> @constrained_vector_maxnum_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_maxnum_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -3613,7 +3613,7 @@
   ret <4 x double> %max
 }
 
-define <1 x float> @constrained_vector_minnum_v1f32() {
+define <1 x float> @constrained_vector_minnum_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_minnum_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -3643,7 +3643,7 @@
   ret <1 x float> %min
 }
 
-define <2 x double> @constrained_vector_minnum_v2f64() {
+define <2 x double> @constrained_vector_minnum_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_minnum_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -3686,7 +3686,7 @@
   ret <2 x double> %min
 }
 
-define <3 x float> @constrained_vector_minnum_v3f32() {
+define <3 x float> @constrained_vector_minnum_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_minnum_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -3742,7 +3742,7 @@
   ret <3 x float> %min
 }
 
-define <3 x double> @constrained_vector_min_v3f64() {
+define <3 x double> @constrained_vector_min_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_min_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -3800,7 +3800,7 @@
   ret <3 x double> %min
 }
 
-define <4 x double> @constrained_vector_minnum_v4f64() {
+define <4 x double> @constrained_vector_minnum_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_minnum_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -3868,7 +3868,7 @@
   ret <4 x double> %min
 }
 
-define <1 x i32> @constrained_vector_fptosi_v1i32_v1f32() {
+define <1 x i32> @constrained_vector_fptosi_v1i32_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptosi_v1i32_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttss2si {{.*}}(%rip), %eax
@@ -3885,7 +3885,7 @@
   ret <1 x i32> %result
 }
 
-define <2 x i32> @constrained_vector_fptosi_v2i32_v2f32() {
+define <2 x i32> @constrained_vector_fptosi_v2i32_v2f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptosi_v2i32_v2f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttss2si {{.*}}(%rip), %eax
@@ -3909,7 +3909,7 @@
   ret <2 x i32> %result
 }
 
-define <3 x i32> @constrained_vector_fptosi_v3i32_v3f32() {
+define <3 x i32> @constrained_vector_fptosi_v3i32_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptosi_v3i32_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttss2si {{.*}}(%rip), %eax
@@ -3939,7 +3939,7 @@
   ret <3 x i32> %result
 }
 
-define <4 x i32> @constrained_vector_fptosi_v4i32_v4f32() {
+define <4 x i32> @constrained_vector_fptosi_v4i32_v4f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptosi_v4i32_v4f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttss2si {{.*}}(%rip), %eax
@@ -3974,7 +3974,7 @@
   ret <4 x i32> %result
 }
 
-define <1 x i64> @constrained_vector_fptosi_v1i64_v1f32() {
+define <1 x i64> @constrained_vector_fptosi_v1i64_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptosi_v1i64_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttss2si {{.*}}(%rip), %rax
@@ -3991,7 +3991,7 @@
   ret <1 x i64> %result
 }
 
-define <2 x i64> @constrained_vector_fptosi_v2i64_v2f32() {
+define <2 x i64> @constrained_vector_fptosi_v2i64_v2f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptosi_v2i64_v2f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttss2si {{.*}}(%rip), %rax
@@ -4016,7 +4016,7 @@
   ret <2 x i64> %result
 }
 
-define <3 x i64> @constrained_vector_fptosi_v3i64_v3f32() {
+define <3 x i64> @constrained_vector_fptosi_v3i64_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptosi_v3i64_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttss2si {{.*}}(%rip), %rax
@@ -4043,7 +4043,7 @@
   ret <3 x i64> %result
 }
 
-define <4 x i64> @constrained_vector_fptosi_v4i64_v4f32() {
+define <4 x i64> @constrained_vector_fptosi_v4i64_v4f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptosi_v4i64_v4f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttss2si {{.*}}(%rip), %rax
@@ -4080,7 +4080,7 @@
   ret <4 x i64> %result
 }
 
-define <1 x i32> @constrained_vector_fptosi_v1i32_v1f64() {
+define <1 x i32> @constrained_vector_fptosi_v1i32_v1f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptosi_v1i32_v1f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttsd2si {{.*}}(%rip), %eax
@@ -4098,7 +4098,7 @@
 }
 
 
-define <2 x i32> @constrained_vector_fptosi_v2i32_v2f64() {
+define <2 x i32> @constrained_vector_fptosi_v2i32_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptosi_v2i32_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttsd2si {{.*}}(%rip), %eax
@@ -4122,7 +4122,7 @@
   ret <2 x i32> %result
 }
 
-define <3 x i32> @constrained_vector_fptosi_v3i32_v3f64() {
+define <3 x i32> @constrained_vector_fptosi_v3i32_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptosi_v3i32_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttsd2si {{.*}}(%rip), %eax
@@ -4152,7 +4152,7 @@
   ret <3 x i32> %result
 }
 
-define <4 x i32> @constrained_vector_fptosi_v4i32_v4f64() {
+define <4 x i32> @constrained_vector_fptosi_v4i32_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptosi_v4i32_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttsd2si {{.*}}(%rip), %eax
@@ -4187,7 +4187,7 @@
   ret <4 x i32> %result
 }
 
-define <1 x i64> @constrained_vector_fptosi_v1i64_v1f64() {
+define <1 x i64> @constrained_vector_fptosi_v1i64_v1f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptosi_v1i64_v1f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttsd2si {{.*}}(%rip), %rax
@@ -4204,7 +4204,7 @@
   ret <1 x i64> %result
 }
 
-define <2 x i64> @constrained_vector_fptosi_v2i64_v2f64() {
+define <2 x i64> @constrained_vector_fptosi_v2i64_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptosi_v2i64_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttsd2si {{.*}}(%rip), %rax
@@ -4229,7 +4229,7 @@
   ret <2 x i64> %result
 }
 
-define <3 x i64> @constrained_vector_fptosi_v3i64_v3f64() {
+define <3 x i64> @constrained_vector_fptosi_v3i64_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptosi_v3i64_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttsd2si {{.*}}(%rip), %rax
@@ -4256,7 +4256,7 @@
   ret <3 x i64> %result
 }
 
-define <4 x i64> @constrained_vector_fptosi_v4i64_v4f64() {
+define <4 x i64> @constrained_vector_fptosi_v4i64_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptosi_v4i64_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttsd2si {{.*}}(%rip), %rax
@@ -4293,7 +4293,7 @@
   ret <4 x i64> %result
 }
 
-define <1 x i32> @constrained_vector_fptoui_v1i32_v1f32() {
+define <1 x i32> @constrained_vector_fptoui_v1i32_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptoui_v1i32_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttss2si {{.*}}(%rip), %eax
@@ -4310,7 +4310,7 @@
   ret <1 x i32> %result
 }
 
-define <2 x i32> @constrained_vector_fptoui_v2i32_v2f32() {
+define <2 x i32> @constrained_vector_fptoui_v2i32_v2f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptoui_v2i32_v2f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttss2si {{.*}}(%rip), %eax
@@ -4334,7 +4334,7 @@
   ret <2 x i32> %result
 }
 
-define <3 x i32> @constrained_vector_fptoui_v3i32_v3f32() {
+define <3 x i32> @constrained_vector_fptoui_v3i32_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptoui_v3i32_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttss2si {{.*}}(%rip), %eax
@@ -4364,7 +4364,7 @@
   ret <3 x i32> %result
 }
 
-define <4 x i32> @constrained_vector_fptoui_v4i32_v4f32() {
+define <4 x i32> @constrained_vector_fptoui_v4i32_v4f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptoui_v4i32_v4f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttss2si {{.*}}(%rip), %eax
@@ -4399,7 +4399,7 @@
   ret <4 x i32> %result
 }
 
-define <1 x i64> @constrained_vector_fptoui_v1i64_v1f32() {
+define <1 x i64> @constrained_vector_fptoui_v1i64_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptoui_v1i64_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttss2si {{.*}}(%rip), %rax
@@ -4416,7 +4416,7 @@
   ret <1 x i64> %result
 }
 
-define <2 x i64> @constrained_vector_fptoui_v2i64_v2f32() {
+define <2 x i64> @constrained_vector_fptoui_v2i64_v2f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptoui_v2i64_v2f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttss2si {{.*}}(%rip), %rax
@@ -4441,7 +4441,7 @@
   ret <2 x i64> %result
 }
 
-define <3 x i64> @constrained_vector_fptoui_v3i64_v3f32() {
+define <3 x i64> @constrained_vector_fptoui_v3i64_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptoui_v3i64_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttss2si {{.*}}(%rip), %rax
@@ -4468,7 +4468,7 @@
   ret <3 x i64> %result
 }
 
-define <4 x i64> @constrained_vector_fptoui_v4i64_v4f32() {
+define <4 x i64> @constrained_vector_fptoui_v4i64_v4f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptoui_v4i64_v4f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttss2si {{.*}}(%rip), %rax
@@ -4505,7 +4505,7 @@
   ret <4 x i64> %result
 }
 
-define <1 x i32> @constrained_vector_fptoui_v1i32_v1f64() {
+define <1 x i32> @constrained_vector_fptoui_v1i32_v1f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptoui_v1i32_v1f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttsd2si {{.*}}(%rip), %eax
@@ -4522,7 +4522,7 @@
   ret <1 x i32> %result
 }
 
-define <2 x i32> @constrained_vector_fptoui_v2i32_v2f64() {
+define <2 x i32> @constrained_vector_fptoui_v2i32_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptoui_v2i32_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttsd2si {{.*}}(%rip), %eax
@@ -4546,7 +4546,7 @@
   ret <2 x i32> %result
 }
 
-define <3 x i32> @constrained_vector_fptoui_v3i32_v3f64() {
+define <3 x i32> @constrained_vector_fptoui_v3i32_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptoui_v3i32_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttsd2si {{.*}}(%rip), %eax
@@ -4576,7 +4576,7 @@
   ret <3 x i32> %result
 }
 
-define <4 x i32> @constrained_vector_fptoui_v4i32_v4f64() {
+define <4 x i32> @constrained_vector_fptoui_v4i32_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptoui_v4i32_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttsd2si {{.*}}(%rip), %eax
@@ -4611,7 +4611,7 @@
   ret <4 x i32> %result
 }
 
-define <1 x i64> @constrained_vector_fptoui_v1i64_v1f64() {
+define <1 x i64> @constrained_vector_fptoui_v1i64_v1f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptoui_v1i64_v1f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttsd2si {{.*}}(%rip), %rax
@@ -4628,7 +4628,7 @@
   ret <1 x i64> %result
 }
 
-define <2 x i64> @constrained_vector_fptoui_v2i64_v2f64() {
+define <2 x i64> @constrained_vector_fptoui_v2i64_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptoui_v2i64_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttsd2si {{.*}}(%rip), %rax
@@ -4653,7 +4653,7 @@
   ret <2 x i64> %result
 }
 
-define <3 x i64> @constrained_vector_fptoui_v3i64_v3f64() {
+define <3 x i64> @constrained_vector_fptoui_v3i64_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptoui_v3i64_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttsd2si {{.*}}(%rip), %rax
@@ -4680,7 +4680,7 @@
   ret <3 x i64> %result
 }
 
-define <4 x i64> @constrained_vector_fptoui_v4i64_v4f64() {
+define <4 x i64> @constrained_vector_fptoui_v4i64_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptoui_v4i64_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cvttsd2si {{.*}}(%rip), %rax
@@ -4718,7 +4718,7 @@
 }
 
 
-define <1 x float> @constrained_vector_fptrunc_v1f64() {
+define <1 x float> @constrained_vector_fptrunc_v1f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptrunc_v1f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
@@ -4738,7 +4738,7 @@
   ret <1 x float> %result
 }
 
-define <2 x float> @constrained_vector_fptrunc_v2f64() {
+define <2 x float> @constrained_vector_fptrunc_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptrunc_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
@@ -4764,7 +4764,7 @@
   ret <2 x float> %result
 }
 
-define <3 x float> @constrained_vector_fptrunc_v3f64() {
+define <3 x float> @constrained_vector_fptrunc_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptrunc_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
@@ -4797,7 +4797,7 @@
   ret <3 x float> %result
 }
 
-define <4 x float> @constrained_vector_fptrunc_v4f64() {
+define <4 x float> @constrained_vector_fptrunc_v4f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fptrunc_v4f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
@@ -4826,7 +4826,7 @@
   ret <4 x float> %result
 }
 
-define <1 x double> @constrained_vector_fpext_v1f32() {
+define <1 x double> @constrained_vector_fpext_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fpext_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
@@ -4845,7 +4845,7 @@
   ret <1 x double> %result
 }
 
-define <2 x double> @constrained_vector_fpext_v2f32() {
+define <2 x double> @constrained_vector_fpext_v2f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fpext_v2f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
@@ -4870,7 +4870,7 @@
   ret <2 x double> %result
 }
 
-define <3 x double> @constrained_vector_fpext_v3f32() {
+define <3 x double> @constrained_vector_fpext_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fpext_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
@@ -4902,7 +4902,7 @@
   ret <3 x double> %result
 }
 
-define <4 x double> @constrained_vector_fpext_v4f32() {
+define <4 x double> @constrained_vector_fpext_v4f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_fpext_v4f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
@@ -4929,7 +4929,7 @@
   ret <4 x double> %result
 }
 
-define <1 x float> @constrained_vector_ceil_v1f32() {
+define <1 x float> @constrained_vector_ceil_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_ceil_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -4953,7 +4953,7 @@
   ret <1 x float> %ceil
 }
 
-define <2 x double> @constrained_vector_ceil_v2f64() {
+define <2 x double> @constrained_vector_ceil_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_ceil_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -4981,7 +4981,7 @@
   ret <2 x double> %ceil
 }
 
-define <3 x float> @constrained_vector_ceil_v3f32() {
+define <3 x float> @constrained_vector_ceil_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_ceil_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -5022,7 +5022,7 @@
   ret <3 x float> %ceil
 }
 
-define <3 x double> @constrained_vector_ceil_v3f64() {
+define <3 x double> @constrained_vector_ceil_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_ceil_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -5060,7 +5060,7 @@
   ret <3 x double> %ceil
 }
 
-define <1 x float> @constrained_vector_floor_v1f32() {
+define <1 x float> @constrained_vector_floor_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_floor_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -5085,7 +5085,7 @@
 }
 
 
-define <2 x double> @constrained_vector_floor_v2f64() {
+define <2 x double> @constrained_vector_floor_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_floor_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -5113,7 +5113,7 @@
   ret <2 x double> %floor
 }
 
-define <3 x float> @constrained_vector_floor_v3f32() {
+define <3 x float> @constrained_vector_floor_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_floor_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -5154,7 +5154,7 @@
   ret <3 x float> %floor
 }
 
-define <3 x double> @constrained_vector_floor_v3f64() {
+define <3 x double> @constrained_vector_floor_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_floor_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -5192,7 +5192,7 @@
   ret <3 x double> %floor
 }
 
-define <1 x float> @constrained_vector_round_v1f32() {
+define <1 x float> @constrained_vector_round_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_round_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -5220,7 +5220,7 @@
   ret <1 x float> %round
 }
 
-define <2 x double> @constrained_vector_round_v2f64() {
+define <2 x double> @constrained_vector_round_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_round_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -5258,7 +5258,7 @@
   ret <2 x double> %round
 }
 
-define <3 x float> @constrained_vector_round_v3f32() {
+define <3 x float> @constrained_vector_round_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_round_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -5308,7 +5308,7 @@
 }
 
 
-define <3 x double> @constrained_vector_round_v3f64() {
+define <3 x double> @constrained_vector_round_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_round_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -5359,7 +5359,7 @@
   ret <3 x double> %round
 }
 
-define <1 x float> @constrained_vector_trunc_v1f32() {
+define <1 x float> @constrained_vector_trunc_v1f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_trunc_v1f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
@@ -5383,7 +5383,7 @@
   ret <1 x float> %trunc
 }
 
-define <2 x double> @constrained_vector_trunc_v2f64() {
+define <2 x double> @constrained_vector_trunc_v2f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_trunc_v2f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
@@ -5411,7 +5411,7 @@
   ret <2 x double> %trunc
 }
 
-define <3 x float> @constrained_vector_trunc_v3f32() {
+define <3 x float> @constrained_vector_trunc_v3f32() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_trunc_v3f32:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $40, %rsp
@@ -5452,7 +5452,7 @@
   ret <3 x float> %trunc
 }
 
-define <3 x double> @constrained_vector_trunc_v3f64() {
+define <3 x double> @constrained_vector_trunc_v3f64() strictfp noimplicitfloat {
 ; CHECK-LABEL: constrained_vector_trunc_v3f64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subq $24, %rsp
diff --git a/llvm/test/Feature/fp-intrinsics.ll b/llvm/test/Feature/fp-intrinsics.ll
--- a/llvm/test/Feature/fp-intrinsics.ll
+++ b/llvm/test/Feature/fp-intrinsics.ll
@@ -3,7 +3,7 @@
 ; Test to verify that constants aren't folded when the rounding mode is unknown.
 ; CHECK-LABEL: @f1
 ; CHECK: call double @llvm.experimental.constrained.fdiv.f64
-define double @f1() {
+define double @f1() strictfp noimplicitfloat {
 entry:
   %div = call double @llvm.experimental.constrained.fdiv.f64(
                                                double 1.000000e+00,
@@ -23,7 +23,7 @@
 ;
 ; CHECK-LABEL: @f2
 ; CHECK: call double @llvm.experimental.constrained.fsub.f64
-define double @f2(double %a) {
+define double @f2(double %a) strictfp noimplicitfloat {
 entry:
   %div = call double @llvm.experimental.constrained.fsub.f64(
                                                double %a, double 0.000000e+00,
@@ -45,7 +45,7 @@
 ; CHECK: call double @llvm.experimental.constrained.fsub.f64
 ; CHECK: call double @llvm.experimental.constrained.fmul.f64
 ; CHECK: call double @llvm.experimental.constrained.fsub.f64
-define double @f3(double %a, double %b) {
+define double @f3(double %a, double %b) strictfp noimplicitfloat {
 entry:
   %sub = call double @llvm.experimental.constrained.fsub.f64(
                                                double -0.000000e+00, double %a,
@@ -77,7 +77,7 @@
 ; CHECK-LABEL: @f4
 ; CHECK-NOT: select
 ; CHECK: br i1 %cmp
-define double @f4(i32 %n, double %a) {
+define double @f4(i32 %n, double %a) strictfp noimplicitfloat {
 entry:
   %cmp = icmp sgt i32 %n, 0
   br i1 %cmp, label %if.then, label %if.end
@@ -97,7 +97,7 @@
 ; Verify that sqrt(42.0) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f5
 ; CHECK: call double @llvm.experimental.constrained.sqrt
-define double @f5() {
+define double @f5() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.sqrt.f64(double 42.0,
                                                metadata !"round.dynamic",
@@ -108,7 +108,7 @@
 ; Verify that pow(42.1, 3.0) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f6
 ; CHECK: call double @llvm.experimental.constrained.pow
-define double @f6() {
+define double @f6() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.pow.f64(double 42.1,
                                                double 3.0,
@@ -120,7 +120,7 @@
 ; Verify that powi(42.1, 3) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f7
 ; CHECK: call double @llvm.experimental.constrained.powi
-define double @f7() {
+define double @f7() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.powi.f64(double 42.1,
                                                i32 3,
@@ -132,7 +132,7 @@
 ; Verify that sin(42.0) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f8
 ; CHECK: call double @llvm.experimental.constrained.sin
-define double @f8() {
+define double @f8() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.sin.f64(double 42.0,
                                                metadata !"round.dynamic",
@@ -143,7 +143,7 @@
 ; Verify that cos(42.0) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f9
 ; CHECK: call double @llvm.experimental.constrained.cos
-define double @f9() {
+define double @f9() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.cos.f64(double 42.0,
                                                metadata !"round.dynamic",
@@ -154,7 +154,7 @@
 ; Verify that exp(42.0) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f10
 ; CHECK: call double @llvm.experimental.constrained.exp
-define double @f10() {
+define double @f10() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.exp.f64(double 42.0,
                                                metadata !"round.dynamic",
@@ -165,7 +165,7 @@
 ; Verify that exp2(42.1) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f11
 ; CHECK: call double @llvm.experimental.constrained.exp2
-define double @f11() {
+define double @f11() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.exp2.f64(double 42.1,
                                                metadata !"round.dynamic",
@@ -176,7 +176,7 @@
 ; Verify that log(42.0) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f12
 ; CHECK: call double @llvm.experimental.constrained.log
-define double @f12() {
+define double @f12() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.log.f64(double 42.0,
                                                metadata !"round.dynamic",
@@ -187,7 +187,7 @@
 ; Verify that log10(42.0) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f13
 ; CHECK: call double @llvm.experimental.constrained.log10
-define double @f13() {
+define double @f13() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.log10.f64(double 42.0,
                                                metadata !"round.dynamic",
@@ -198,7 +198,7 @@
 ; Verify that log2(42.0) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f14
 ; CHECK: call double @llvm.experimental.constrained.log2
-define double @f14() {
+define double @f14() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.log2.f64(double 42.0,
                                                metadata !"round.dynamic",
@@ -209,7 +209,7 @@
 ; Verify that rint(42.1) isn't simplified when the rounding mode is unknown.
 ; CHECK-LABEL: f15
 ; CHECK: call double @llvm.experimental.constrained.rint
-define double @f15() {
+define double @f15() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.rint.f64(double 42.1,
                                                metadata !"round.dynamic",
@@ -221,7 +221,7 @@
 ; unknown.
 ; CHECK-LABEL: f16
 ; CHECK: call double @llvm.experimental.constrained.nearbyint
-define double @f16() {
+define double @f16() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.nearbyint.f64(
                                                double 42.1,
@@ -234,7 +234,7 @@
 ; unknown.
 ; CHECK-LABEL: f17
 ; CHECK: call double @llvm.experimental.constrained.fma
-define double @f17() {
+define double @f17() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.fma.f64(double 42.1, double 42.1, double 42.1,
                                                metadata !"round.dynamic",
@@ -246,7 +246,7 @@
 ; unknown.
 ; CHECK-LABEL: f18
 ; CHECK: call zeroext i32 @llvm.experimental.constrained.fptoui
-define zeroext i32 @f18() {
+define zeroext i32 @f18() strictfp noimplicitfloat {
 entry:
   %result = call zeroext i32 @llvm.experimental.constrained.fptoui.i32.f64(
                                                double 42.1,
@@ -258,7 +258,7 @@
 ; unknown.
 ; CHECK-LABEL: f19
 ; CHECK: call i32 @llvm.experimental.constrained.fptosi
-define i32 @f19() {
+define i32 @f19() strictfp noimplicitfloat {
 entry:
   %result = call i32 @llvm.experimental.constrained.fptosi.i32.f64(double 42.1,
                                                metadata !"fpexcept.strict")
@@ -269,7 +269,7 @@
 ; unknown.
 ; CHECK-LABEL: f20
 ; CHECK: call float @llvm.experimental.constrained.fptrunc
-define float @f20() {
+define float @f20() strictfp noimplicitfloat {
 entry:
   %result = call float @llvm.experimental.constrained.fptrunc.f32.f64(
                                                double 42.1,
@@ -282,7 +282,7 @@
 ; unknown.
 ; CHECK-LABEL: f21
 ; CHECK: call double @llvm.experimental.constrained.fpext
-define double @f21() {
+define double @f21() strictfp noimplicitfloat {
 entry:
   %result = call double @llvm.experimental.constrained.fpext.f64.f32(float 42.0,
                                                metadata !"fpexcept.strict")
diff --git a/llvm/test/Verifier/fp-intrinsics.ll b/llvm/test/Verifier/fp-intrinsics.ll
--- a/llvm/test/Verifier/fp-intrinsics.ll
+++ b/llvm/test/Verifier/fp-intrinsics.ll
@@ -15,7 +15,7 @@
 ; CHECK1: attributes #[[ATTR]] = { inaccessiblememonly nounwind willreturn }
 ; Note: FP exceptions aren't usually caught through normal unwind mechanisms,
 ;       but we may want to revisit this for asynchronous exception handling.
-define double @f1(double %a, double %b) {
+define double @f1(double %a, double %b) strictfp noimplicitfloat {
 entry:
   %fadd = call double @llvm.experimental.constrained.fadd.f64(
                                                double %a, double %b,
@@ -24,7 +24,7 @@
   ret double %fadd
 }
 
-define double @f1u(double %a) {
+define double @f1u(double %a) strictfp noimplicitfloat {
 entry:
   %fsqrt = call double @llvm.experimental.constrained.sqrt.f64(
                                                double %a,
@@ -35,7 +35,7 @@
 
 ; Test an illegal value for the rounding mode argument.
 ; CHECK2: invalid rounding mode argument
-;T2: define double @f2(double %a, double %b) {
+;T2: define double @f2(double %a, double %b) strictfp noimplicitfloat {
 ;T2: entry:
 ;T2:   %fadd = call double @llvm.experimental.constrained.fadd.f64(
 ;T2:                                           double %a, double %b,
@@ -46,7 +46,7 @@
 
 ; Test an illegal value for the exception behavior argument.
 ; CHECK3: invalid exception behavior argument
-;T3: define double @f3(double %a, double %b) {
+;T3: define double @f3(double %a, double %b) strictfp noimplicitfloat {
 ;T3: entry:
 ;T3:   %fadd = call double @llvm.experimental.constrained.fadd.f64(
 ;T3:                                         double %a, double %b,
@@ -57,7 +57,7 @@
 
 ; Test an illegal value for the rounding mode argument.
 ; CHECK4: invalid rounding mode argument
-;T4: define double @f4(double %a) {
+;T4: define double @f4(double %a) strictfp noimplicitfloat {
 ;T4: entry:
 ;T4:   %fadd = call double @llvm.experimental.constrained.sqrt.f64(
 ;T4:                                           double %a,
@@ -68,7 +68,7 @@
 
 ; Test an illegal value for the exception behavior argument.
 ; CHECK5: invalid exception behavior argument
-;T5: define double @f5(double %a) {
+;T5: define double @f5(double %a) strictfp noimplicitfloat {
 ;T5: entry:
 ;T5:   %fadd = call double @llvm.experimental.constrained.sqrt.f64(
 ;T5:                                         double %a,