Index: lib/CodeGen/LiveInterval.cpp
===================================================================
--- lib/CodeGen/LiveInterval.cpp
+++ lib/CodeGen/LiveInterval.cpp
@@ -917,7 +917,8 @@
   for (VNInfo *VNI : ToBeRemoved)
     SR.removeValNo(VNI);
 
-  assert(!SR.empty() && "At least one value should be defined by this mask");
+  // If the subrange is empty at this point, the MIR is invalid. Do not assert
+  // and let the verifier catch this case.
 }
 
 void LiveInterval::refineSubRanges(
Index: test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir
@@ -0,0 +1,28 @@
+# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs  -run-pass=machine-scheduler -verify-misched -o /dev/null %s  2>&1  | FileCheck %s
+
+# CHECK: *** Bad machine code: No live subrange at use ***
+# CHECK-NEXT: - function:    at_least_one_value_should_be_defined_by_this_mask
+# CHECK-NEXT: - basic block: %bb.0
+# CHECK-NEXT: - instruction: 48B	dead undef %2.sub0:vreg_128 = COPY %0.sub0:vreg_128
+# CHECK-NEXT: - operand 1:   %0.sub0:vreg_128
+# CHECK-NEXT: - interval:    %0 [16r,48r:0)  0@16r L00000002 [16r,32r:0)  0@16r weight:0.000000e+00
+
+# This used to assert with: !SR.empty() && "At least one value should be defined by this mask"
+
+# This MIR is invalid and should be caught by the verifier. %0.sub0 is
+# used, but not defined. There are also lanes in %0 that are not used
+# or defined anywhere. Previously there was an assertion in the
+# LiveInterval computation, which was more confusing. The invalid
+# LiveRange should be produced and the verifier will catch it.
+
+---
+name: at_least_one_value_should_be_defined_by_this_mask
+tracksRegLiveness: true
+body:             |
+  bb.0:
+
+    undef %0.sub1:vreg_128 = V_MOV_B32_e32 0, implicit $exec
+    %1:vreg_128 = COPY %0
+    undef %2.sub0:vreg_128 = COPY %0.sub0
+
+...