Index: cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def =================================================================== --- cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def +++ cfe/trunk/include/clang/Basic/BuiltinsWebAssembly.def @@ -118,5 +118,19 @@ TARGET_BUILTIN(__builtin_wasm_trunc_saturate_s_i64x2_f64x2, "V2LLiV2d", "nc", "unimplemented-simd128") TARGET_BUILTIN(__builtin_wasm_trunc_saturate_u_i64x2_f64x2, "V2LLiV2d", "nc", "unimplemented-simd128") +TARGET_BUILTIN(__builtin_wasm_narrow_s_i8x16_i16x8, "V16cV8sV8s", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_narrow_u_i8x16_i16x8, "V16cV8sV8s", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_narrow_s_i16x8_i32x4, "V8sV4iV4i", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_narrow_u_i16x8_i32x4, "V8sV4iV4i", "nc", "simd128") + +TARGET_BUILTIN(__builtin_wasm_widen_low_s_i16x8_i8x16, "V8sV16c", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_widen_high_s_i16x8_i8x16, "V8sV16c", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_widen_low_u_i16x8_i8x16, "V8sV16c", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_widen_high_u_i16x8_i8x16, "V8sV16c", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_widen_low_s_i32x4_i16x8, "V4iV8s", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_widen_high_s_i32x4_i16x8, "V4iV8s", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_widen_low_u_i32x4_i16x8, "V4iV8s", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_widen_high_u_i32x4_i16x8, "V4iV8s", "nc", "simd128") + #undef BUILTIN #undef TARGET_BUILTIN Index: cfe/trunk/lib/CodeGen/CGBuiltin.cpp =================================================================== --- cfe/trunk/lib/CodeGen/CGBuiltin.cpp +++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp @@ -14196,6 +14196,63 @@ Function *Callee = CGM.getIntrinsic(IntNo, A->getType()); return Builder.CreateCall(Callee, {A, B, C}); } + case WebAssembly::BI__builtin_wasm_narrow_s_i8x16_i16x8: + case WebAssembly::BI__builtin_wasm_narrow_u_i8x16_i16x8: + case WebAssembly::BI__builtin_wasm_narrow_s_i16x8_i32x4: + case WebAssembly::BI__builtin_wasm_narrow_u_i16x8_i32x4: { + Value *Low = EmitScalarExpr(E->getArg(0)); + Value *High = EmitScalarExpr(E->getArg(1)); + unsigned IntNo; + switch (BuiltinID) { + case WebAssembly::BI__builtin_wasm_narrow_s_i8x16_i16x8: + case WebAssembly::BI__builtin_wasm_narrow_s_i16x8_i32x4: + IntNo = Intrinsic::wasm_narrow_signed; + break; + case WebAssembly::BI__builtin_wasm_narrow_u_i8x16_i16x8: + case WebAssembly::BI__builtin_wasm_narrow_u_i16x8_i32x4: + IntNo = Intrinsic::wasm_narrow_unsigned; + break; + default: + llvm_unreachable("unexpected builtin ID"); + } + Function *Callee = + CGM.getIntrinsic(IntNo, {ConvertType(E->getType()), Low->getType()}); + return Builder.CreateCall(Callee, {Low, High}); + } + case WebAssembly::BI__builtin_wasm_widen_low_s_i16x8_i8x16: + case WebAssembly::BI__builtin_wasm_widen_high_s_i16x8_i8x16: + case WebAssembly::BI__builtin_wasm_widen_low_u_i16x8_i8x16: + case WebAssembly::BI__builtin_wasm_widen_high_u_i16x8_i8x16: + case WebAssembly::BI__builtin_wasm_widen_low_s_i32x4_i16x8: + case WebAssembly::BI__builtin_wasm_widen_high_s_i32x4_i16x8: + case WebAssembly::BI__builtin_wasm_widen_low_u_i32x4_i16x8: + case WebAssembly::BI__builtin_wasm_widen_high_u_i32x4_i16x8: { + Value *Vec = EmitScalarExpr(E->getArg(0)); + unsigned IntNo; + switch (BuiltinID) { + case WebAssembly::BI__builtin_wasm_widen_low_s_i16x8_i8x16: + case WebAssembly::BI__builtin_wasm_widen_low_s_i32x4_i16x8: + IntNo = Intrinsic::wasm_widen_low_signed; + break; + case WebAssembly::BI__builtin_wasm_widen_high_s_i16x8_i8x16: + case WebAssembly::BI__builtin_wasm_widen_high_s_i32x4_i16x8: + IntNo = Intrinsic::wasm_widen_high_signed; + break; + case WebAssembly::BI__builtin_wasm_widen_low_u_i16x8_i8x16: + case WebAssembly::BI__builtin_wasm_widen_low_u_i32x4_i16x8: + IntNo = Intrinsic::wasm_widen_low_unsigned; + break; + case WebAssembly::BI__builtin_wasm_widen_high_u_i16x8_i8x16: + case WebAssembly::BI__builtin_wasm_widen_high_u_i32x4_i16x8: + IntNo = Intrinsic::wasm_widen_high_unsigned; + break; + default: + llvm_unreachable("unexpected builtin ID"); + } + Function *Callee = + CGM.getIntrinsic(IntNo, {ConvertType(E->getType()), Vec->getType()}); + return Builder.CreateCall(Callee, Vec); + } default: return nullptr; } Index: cfe/trunk/test/CodeGen/builtins-wasm.c =================================================================== --- cfe/trunk/test/CodeGen/builtins-wasm.c +++ cfe/trunk/test/CodeGen/builtins-wasm.c @@ -463,3 +463,79 @@ // WEBASSEMBLY: call <2 x i64> @llvm.wasm.trunc.saturate.unsigned.v2i64.v2f64(<2 x double> %f) // WEBASSEMBLY-NEXT: ret } + +i8x16 narrow_s_i8x16_i16x8(i16x8 low, i16x8 high) { + return __builtin_wasm_narrow_s_i8x16_i16x8(low, high); + // WEBASSEMBLY: call <16 x i8> @llvm.wasm.narrow.signed.v16i8.v8i16( + // WEBASSEMBLY-SAME: <8 x i16> %low, <8 x i16> %high) + // WEBASSEMBLY: ret +} + +i8x16 narrow_u_i8x16_i16x8(i16x8 low, i16x8 high) { + return __builtin_wasm_narrow_u_i8x16_i16x8(low, high); + // WEBASSEMBLY: call <16 x i8> @llvm.wasm.narrow.unsigned.v16i8.v8i16( + // WEBASSEMBLY-SAME: <8 x i16> %low, <8 x i16> %high) + // WEBASSEMBLY: ret +} + +i16x8 narrow_s_i16x8_i32x4(i32x4 low, i32x4 high) { + return __builtin_wasm_narrow_s_i16x8_i32x4(low, high); + // WEBASSEMBLY: call <8 x i16> @llvm.wasm.narrow.signed.v8i16.v4i32( + // WEBASSEMBLY-SAME: <4 x i32> %low, <4 x i32> %high) + // WEBASSEMBLY: ret +} + +i16x8 narrow_u_i16x8_i32x4(i32x4 low, i32x4 high) { + return __builtin_wasm_narrow_u_i16x8_i32x4(low, high); + // WEBASSEMBLY: call <8 x i16> @llvm.wasm.narrow.unsigned.v8i16.v4i32( + // WEBASSEMBLY-SAME: <4 x i32> %low, <4 x i32> %high) + // WEBASSEMBLY: ret +} + +i16x8 widen_low_s_i16x8_i8x16(i8x16 v) { + return __builtin_wasm_widen_low_s_i16x8_i8x16(v); + // WEBASSEMBLY: call <8 x i16> @llvm.wasm.widen.low.signed.v8i16.v16i8(<16 x i8> %v) + // WEBASSEMBLY: ret +} + +i16x8 widen_high_s_i16x8_i8x16(i8x16 v) { + return __builtin_wasm_widen_high_s_i16x8_i8x16(v); + // WEBASSEMBLY: call <8 x i16> @llvm.wasm.widen.high.signed.v8i16.v16i8(<16 x i8> %v) + // WEBASSEMBLY: ret +} + +i16x8 widen_low_u_i16x8_i8x16(i8x16 v) { + return __builtin_wasm_widen_low_u_i16x8_i8x16(v); + // WEBASSEMBLY: call <8 x i16> @llvm.wasm.widen.low.unsigned.v8i16.v16i8(<16 x i8> %v) + // WEBASSEMBLY: ret +} + +i16x8 widen_high_u_i16x8_i8x16(i8x16 v) { + return __builtin_wasm_widen_high_u_i16x8_i8x16(v); + // WEBASSEMBLY: call <8 x i16> @llvm.wasm.widen.high.unsigned.v8i16.v16i8(<16 x i8> %v) + // WEBASSEMBLY: ret +} + +i32x4 widen_low_s_i32x4_i16x8(i16x8 v) { + return __builtin_wasm_widen_low_s_i32x4_i16x8(v); + // WEBASSEMBLY: call <4 x i32> @llvm.wasm.widen.low.signed.v4i32.v8i16(<8 x i16> %v) + // WEBASSEMBLY: ret +} + +i32x4 widen_high_s_i32x4_i16x8(i16x8 v) { + return __builtin_wasm_widen_high_s_i32x4_i16x8(v); + // WEBASSEMBLY: call <4 x i32> @llvm.wasm.widen.high.signed.v4i32.v8i16(<8 x i16> %v) + // WEBASSEMBLY: ret +} + +i32x4 widen_low_u_i32x4_i16x8(i16x8 v) { + return __builtin_wasm_widen_low_u_i32x4_i16x8(v); + // WEBASSEMBLY: call <4 x i32> @llvm.wasm.widen.low.unsigned.v4i32.v8i16(<8 x i16> %v) + // WEBASSEMBLY: ret +} + +i32x4 widen_high_u_i32x4_i16x8(i16x8 v) { + return __builtin_wasm_widen_high_u_i32x4_i16x8(v); + // WEBASSEMBLY: call <4 x i32> @llvm.wasm.widen.high.unsigned.v4i32.v8i16(<8 x i16> %v) + // WEBASSEMBLY: ret +} Index: llvm/trunk/include/llvm/IR/IntrinsicsWebAssembly.td =================================================================== --- llvm/trunk/include/llvm/IR/IntrinsicsWebAssembly.td +++ llvm/trunk/include/llvm/IR/IntrinsicsWebAssembly.td @@ -117,6 +117,31 @@ Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem, IntrSpeculatable]>; +def int_wasm_narrow_signed : + Intrinsic<[llvm_anyvector_ty], + [llvm_anyvector_ty, LLVMMatchType<1>], + [IntrNoMem, IntrSpeculatable]>; +def int_wasm_narrow_unsigned : + Intrinsic<[llvm_anyvector_ty], + [llvm_anyvector_ty, LLVMMatchType<1>], + [IntrNoMem, IntrSpeculatable]>; +def int_wasm_widen_low_signed : + Intrinsic<[llvm_anyvector_ty], + [llvm_anyvector_ty], + [IntrNoMem, IntrSpeculatable]>; +def int_wasm_widen_high_signed : + Intrinsic<[llvm_anyvector_ty], + [llvm_anyvector_ty], + [IntrNoMem, IntrSpeculatable]>; +def int_wasm_widen_low_unsigned : + Intrinsic<[llvm_anyvector_ty], + [llvm_anyvector_ty], + [IntrNoMem, IntrSpeculatable]>; +def int_wasm_widen_high_unsigned : + Intrinsic<[llvm_anyvector_ty], + [llvm_anyvector_ty], + [IntrNoMem, IntrSpeculatable]>; + //===----------------------------------------------------------------------===// // Bulk memory intrinsics Index: llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td =================================================================== --- llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td +++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td @@ -712,6 +712,42 @@ defm "" : SIMDConvert; defm "" : SIMDConvert; +// Widening operations +multiclass SIMDWiden baseInst> { + defm "" : SIMDConvert; + defm "" : SIMDConvert; + defm "" : SIMDConvert; + defm "" : SIMDConvert; +} + +defm "" : SIMDWiden; +defm "" : SIMDWiden; + +// Narrowing operations +multiclass SIMDNarrow baseInst> { + defm NARROW_S_#vec_t : + SIMD_I<(outs V128:$dst), (ins V128:$low, V128:$high), (outs), (ins), + [(set (vec_t V128:$dst), (vec_t (int_wasm_narrow_signed + (arg_t V128:$low), (arg_t V128:$high))))], + vec#".narrow_"#arg#"_s\t$dst, $low, $high", vec#".narrow_"#arg#"_s", + baseInst>; + defm NARROW_U_#vec_t : + SIMD_I<(outs V128:$dst), (ins V128:$low, V128:$high), (outs), (ins), + [(set (vec_t V128:$dst), (vec_t (int_wasm_narrow_unsigned + (arg_t V128:$low), (arg_t V128:$high))))], + vec#".narrow_"#arg#"_u\t$dst, $low, $high", vec#".narrow_"#arg#"_u", + !add(baseInst, 1)>; +} + +defm "" : SIMDNarrow; +defm "" : SIMDNarrow; + // Lower llvm.wasm.trunc.saturate.* to saturating instructions def : Pat<(v4i32 (int_wasm_trunc_saturate_signed (v4f32 V128:$src))), (fp_to_sint_v4i32_v4f32 (v4f32 V128:$src))>; Index: llvm/trunk/test/CodeGen/WebAssembly/simd-intrinsics.ll =================================================================== --- llvm/trunk/test/CodeGen/WebAssembly/simd-intrinsics.ll +++ llvm/trunk/test/CodeGen/WebAssembly/simd-intrinsics.ll @@ -87,6 +87,30 @@ ret <16 x i8> %a } +; CHECK-LABEL: narrow_signed_v16i8: +; SIMD128-NEXT: .functype narrow_signed_v16i8 (v128, v128) -> (v128){{$}} +; SIMD128-NEXT: i8x16.narrow_i16x8_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <16 x i8> @llvm.wasm.narrow.signed.v16i8.v8i16(<8 x i16>, <8 x i16>) +define <16 x i8> @narrow_signed_v16i8(<8 x i16> %low, <8 x i16> %high) { + %a = call <16 x i8> @llvm.wasm.narrow.signed.v16i8.v8i16( + <8 x i16> %low, <8 x i16> %high + ) + ret <16 x i8> %a +} + +; CHECK-LABEL: narrow_unsigned_v16i8: +; SIMD128-NEXT: .functype narrow_unsigned_v16i8 (v128, v128) -> (v128){{$}} +; SIMD128-NEXT: i8x16.narrow_i16x8_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <16 x i8> @llvm.wasm.narrow.unsigned.v16i8.v8i16(<8 x i16>, <8 x i16>) +define <16 x i8> @narrow_unsigned_v16i8(<8 x i16> %low, <8 x i16> %high) { + %a = call <16 x i8> @llvm.wasm.narrow.unsigned.v16i8.v8i16( + <8 x i16> %low, <8 x i16> %high + ) + ret <16 x i8> %a +} + ; ============================================================================== ; 8 x i16 ; ============================================================================== @@ -166,6 +190,70 @@ ret <8 x i16> %a } +; CHECK-LABEL: narrow_signed_v8i16: +; SIMD128-NEXT: .functype narrow_signed_v8i16 (v128, v128) -> (v128){{$}} +; SIMD128-NEXT: i16x8.narrow_i32x4_s $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <8 x i16> @llvm.wasm.narrow.signed.v8i16.v4i32(<4 x i32>, <4 x i32>) +define <8 x i16> @narrow_signed_v8i16(<4 x i32> %low, <4 x i32> %high) { + %a = call <8 x i16> @llvm.wasm.narrow.signed.v8i16.v4i32( + <4 x i32> %low, <4 x i32> %high + ) + ret <8 x i16> %a +} + +; CHECK-LABEL: narrow_unsigned_v8i16: +; SIMD128-NEXT: .functype narrow_unsigned_v8i16 (v128, v128) -> (v128){{$}} +; SIMD128-NEXT: i16x8.narrow_i32x4_u $push[[R:[0-9]+]]=, $0, $1{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <8 x i16> @llvm.wasm.narrow.unsigned.v8i16.v4i32(<4 x i32>, <4 x i32>) +define <8 x i16> @narrow_unsigned_v8i16(<4 x i32> %low, <4 x i32> %high) { + %a = call <8 x i16> @llvm.wasm.narrow.unsigned.v8i16.v4i32( + <4 x i32> %low, <4 x i32> %high + ) + ret <8 x i16> %a +} + +; CHECK-LABEL: widen_low_signed_v8i16: +; SIMD128-NEXT: .functype widen_low_signed_v8i16 (v128) -> (v128){{$}} +; SIMD128-NEXT: i16x8.widen_low_i8x16_s $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <8 x i16> @llvm.wasm.widen.low.signed.v8i16.v16i8(<16 x i8>) +define <8 x i16> @widen_low_signed_v8i16(<16 x i8> %v) { + %a = call <8 x i16> @llvm.wasm.widen.low.signed.v8i16.v16i8(<16 x i8> %v) + ret <8 x i16> %a +} + +; CHECK-LABEL: widen_high_signed_v8i16: +; SIMD128-NEXT: .functype widen_high_signed_v8i16 (v128) -> (v128){{$}} +; SIMD128-NEXT: i16x8.widen_high_i8x16_s $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <8 x i16> @llvm.wasm.widen.high.signed.v8i16.v16i8(<16 x i8>) +define <8 x i16> @widen_high_signed_v8i16(<16 x i8> %v) { + %a = call <8 x i16> @llvm.wasm.widen.high.signed.v8i16.v16i8(<16 x i8> %v) + ret <8 x i16> %a +} + +; CHECK-LABEL: widen_low_unsigned_v8i16: +; SIMD128-NEXT: .functype widen_low_unsigned_v8i16 (v128) -> (v128){{$}} +; SIMD128-NEXT: i16x8.widen_low_i8x16_u $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <8 x i16> @llvm.wasm.widen.low.unsigned.v8i16.v16i8(<16 x i8>) +define <8 x i16> @widen_low_unsigned_v8i16(<16 x i8> %v) { + %a = call <8 x i16> @llvm.wasm.widen.low.unsigned.v8i16.v16i8(<16 x i8> %v) + ret <8 x i16> %a +} + +; CHECK-LABEL: widen_high_unsigned_v8i16: +; SIMD128-NEXT: .functype widen_high_unsigned_v8i16 (v128) -> (v128){{$}} +; SIMD128-NEXT: i16x8.widen_high_i8x16_u $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <8 x i16> @llvm.wasm.widen.high.unsigned.v8i16.v16i8(<16 x i8>) +define <8 x i16> @widen_high_unsigned_v8i16(<16 x i8> %v) { + %a = call <8 x i16> @llvm.wasm.widen.high.unsigned.v8i16.v16i8(<16 x i8> %v) + ret <8 x i16> %a +} + ; ============================================================================== ; 4 x i32 ; ============================================================================== @@ -223,6 +311,46 @@ ret <4 x i32> %a } +; CHECK-LABEL: widen_low_signed_v4i32: +; SIMD128-NEXT: .functype widen_low_signed_v4i32 (v128) -> (v128){{$}} +; SIMD128-NEXT: i32x4.widen_low_i16x8_s $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <4 x i32> @llvm.wasm.widen.low.signed.v4i32.v8i16(<8 x i16>) +define <4 x i32> @widen_low_signed_v4i32(<8 x i16> %v) { + %a = call <4 x i32> @llvm.wasm.widen.low.signed.v4i32.v8i16(<8 x i16> %v) + ret <4 x i32> %a +} + +; CHECK-LABEL: widen_high_signed_v4i32: +; SIMD128-NEXT: .functype widen_high_signed_v4i32 (v128) -> (v128){{$}} +; SIMD128-NEXT: i32x4.widen_high_i16x8_s $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <4 x i32> @llvm.wasm.widen.high.signed.v4i32.v8i16(<8 x i16>) +define <4 x i32> @widen_high_signed_v4i32(<8 x i16> %v) { + %a = call <4 x i32> @llvm.wasm.widen.high.signed.v4i32.v8i16(<8 x i16> %v) + ret <4 x i32> %a +} + +; CHECK-LABEL: widen_low_unsigned_v4i32: +; SIMD128-NEXT: .functype widen_low_unsigned_v4i32 (v128) -> (v128){{$}} +; SIMD128-NEXT: i32x4.widen_low_i16x8_u $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <4 x i32> @llvm.wasm.widen.low.unsigned.v4i32.v8i16(<8 x i16>) +define <4 x i32> @widen_low_unsigned_v4i32(<8 x i16> %v) { + %a = call <4 x i32> @llvm.wasm.widen.low.unsigned.v4i32.v8i16(<8 x i16> %v) + ret <4 x i32> %a +} + +; CHECK-LABEL: widen_high_unsigned_v4i32: +; SIMD128-NEXT: .functype widen_high_unsigned_v4i32 (v128) -> (v128){{$}} +; SIMD128-NEXT: i32x4.widen_high_i16x8_u $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <4 x i32> @llvm.wasm.widen.high.unsigned.v4i32.v8i16(<8 x i16>) +define <4 x i32> @widen_high_unsigned_v4i32(<8 x i16> %v) { + %a = call <4 x i32> @llvm.wasm.widen.high.unsigned.v4i32.v8i16(<8 x i16> %v) + ret <4 x i32> %a +} + ; ============================================================================== ; 2 x i64 ; ============================================================================== Index: llvm/trunk/test/MC/WebAssembly/simd-encodings.s =================================================================== --- llvm/trunk/test/MC/WebAssembly/simd-encodings.s +++ llvm/trunk/test/MC/WebAssembly/simd-encodings.s @@ -463,4 +463,40 @@ # CHECK: f64x2.convert_i64x2_u # encoding: [0xfd,0xb2,0x01] f64x2.convert_i64x2_u + # CHECK: i8x16.narrow_i16x8_s # encoding: [0xfd,0xc6,0x01] + i8x16.narrow_i16x8_s + + # CHECK: i8x16.narrow_i16x8_u # encoding: [0xfd,0xc7,0x01] + i8x16.narrow_i16x8_u + + # CHECK: i16x8.narrow_i32x4_s # encoding: [0xfd,0xc8,0x01] + i16x8.narrow_i32x4_s + + # CHECK: i16x8.narrow_i32x4_u # encoding: [0xfd,0xc9,0x01] + i16x8.narrow_i32x4_u + + # CHECK: i16x8.widen_low_i8x16_s # encoding: [0xfd,0xca,0x01] + i16x8.widen_low_i8x16_s + + # CHECK: i16x8.widen_high_i8x16_s # encoding: [0xfd,0xcb,0x01] + i16x8.widen_high_i8x16_s + + # CHECK: i16x8.widen_low_i8x16_u # encoding: [0xfd,0xcc,0x01] + i16x8.widen_low_i8x16_u + + # CHECK: i16x8.widen_high_i8x16_u # encoding: [0xfd,0xcd,0x01] + i16x8.widen_high_i8x16_u + + # CHECK: i32x4.widen_low_i16x8_s # encoding: [0xfd,0xce,0x01] + i32x4.widen_low_i16x8_s + + # CHECK: i32x4.widen_high_i16x8_s # encoding: [0xfd,0xcf,0x01] + i32x4.widen_high_i16x8_s + + # CHECK: i32x4.widen_low_i16x8_u # encoding: [0xfd,0xd0,0x01] + i32x4.widen_low_i16x8_u + + # CHECK: i32x4.widen_high_i16x8_u # encoding: [0xfd,0xd1,0x01] + i32x4.widen_high_i16x8_u + end_function