Index: llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp +++ llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp @@ -518,9 +518,7 @@ } void AArch64PassConfig::addPreGlobalInstructionSelect() { - // Workaround the deficiency of the fast register allocator. - if (TM->getOptLevel() == CodeGenOpt::None) - addPass(new Localizer()); + addPass(new Localizer()); } bool AArch64PassConfig::addGlobalInstructionSelect() { Index: llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll =================================================================== --- llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll +++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll @@ -51,7 +51,7 @@ ; VERIFY-NEXT: Verify generated machine code ; ENABLED-NEXT: RegBankSelect ; VERIFY-NEXT: Verify generated machine code -; ENABLED-O0-NEXT: Localizer +; ENABLED-NEXT: Localizer ; VERIFY-O0-NEXT: Verify generated machine code ; ENABLED-NEXT: Analysis for ComputingKnownBits ; ENABLED-NEXT: InstructionSelect Index: llvm/trunk/test/CodeGen/AArch64/GlobalISel/localizer-in-O0-pipeline.mir =================================================================== --- llvm/trunk/test/CodeGen/AArch64/GlobalISel/localizer-in-O0-pipeline.mir +++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/localizer-in-O0-pipeline.mir @@ -60,18 +60,18 @@ # Second block will get the constant 1.0 when the localizer is enabled. # CHECK: bb.1.{{[a-zA-Z0-9]+}}: -# OPT-NOT: G_FCONSTANT +# OPT: [[FONE:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00 # OPTNONE: [[FONE:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00 # CHECK: G_BR %bb.3 # Thrid block will get the constant 2.0 when the localizer is enabled. # CHECK: bb.2.{{[a-zA-Z0-9]+}}: -# OPT-NOT: G_FCONSTANT +# OPT: [[FTWO:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 2.000000e+00 # OPTNONE: [[FTWO:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 2.000000e+00 # CHECK: bb.3.end # OPTNONE: %2:fpr(s32) = PHI [[FONE]](s32), %bb.1, [[FTWO]](s32), %bb.2 -# OPT: %2:fpr(s32) = PHI %4(s32), %bb.1, %5(s32), %bb.2 +# OPT: %2:fpr(s32) = PHI [[FONE]](s32), %bb.1, [[FTWO]](s32), %bb.2 # CHECK-NEXT: G_FADD %0, %2 body: | bb.0 (%ir-block.0): Index: llvm/trunk/test/CodeGen/AArch64/GlobalISel/swifterror.ll =================================================================== --- llvm/trunk/test/CodeGen/AArch64/GlobalISel/swifterror.ll +++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/swifterror.ll @@ -98,9 +98,9 @@ define float @foo_if(%swift_error** swifterror %error_ptr_ref, i32 %cc) { ; CHECK-LABEL: foo_if: ; CHECK: cbz w0 -; CHECK: mov [[ID:w[0-9]+]], #1 ; CHECK: mov w0, #16 ; CHECK: malloc +; CHECK: mov [[ID:w[0-9]+]], #1 ; CHECK: strb [[ID]], [x0, #8] ; CHECK: mov x21, x0 ; CHECK-NOT: x21