diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -2110,10 +2110,9 @@
   }
 
   /// Set the target's preferred function alignment.  This should be set if
-  /// there is a performance benefit to higher-than-minimum alignment (in
-  /// log2(bytes))
-  void setPrefFunctionLogAlignment(unsigned LogAlign) {
-    PrefFunctionAlignment = llvm::Align(1ULL << LogAlign);
+  /// there is a performance benefit to higher-than-minimum alignment
+  void setPrefFunctionAlignment(llvm::Align Align) {
+    PrefFunctionAlignment = Align;
   }
 
   /// Set the target's preferred loop alignment. Default alignment is zero, it
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -642,7 +642,8 @@
   // Set required alignment.
   setMinFunctionAlignment(llvm::Align(4));
   // Set preferred alignments.
-  setPrefFunctionLogAlignment(STI.getPrefFunctionLogAlignment());
+  setPrefFunctionAlignment(
+      llvm::Align(1ULL << STI.getPrefFunctionLogAlignment()));
   setPrefLoopLogAlignment(STI.getPrefLoopLogAlignment());
 
   // Only change the limit for entries in a jump table if specified by
diff --git a/llvm/lib/Target/BPF/BPFISelLowering.cpp b/llvm/lib/Target/BPF/BPFISelLowering.cpp
--- a/llvm/lib/Target/BPF/BPFISelLowering.cpp
+++ b/llvm/lib/Target/BPF/BPFISelLowering.cpp
@@ -132,9 +132,9 @@
 
   setBooleanContents(ZeroOrOneBooleanContent);
 
-  // Function alignments (log2)
+  // Function alignments
   setMinFunctionAlignment(llvm::Align(8));
-  setPrefFunctionLogAlignment(3);
+  setPrefFunctionAlignment(llvm::Align(8));
 
   if (BPFExpandMemcpyInOrder) {
     // LLVM generic code will try to expand memcpy into load/store pairs at this
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
@@ -1236,8 +1236,8 @@
   auto &HRI = *Subtarget.getRegisterInfo();
 
   setPrefLoopLogAlignment(4);
-  setPrefFunctionLogAlignment(4);
   setMinFunctionAlignment(llvm::Align(4));
+  setPrefFunctionAlignment(llvm::Align(16));
   setStackPointerRegisterToSaveRestore(HRI.getStackRegister());
   setBooleanContents(TargetLoweringBase::UndefinedBooleanContent);
   setBooleanVectorContents(TargetLoweringBase::UndefinedBooleanContent);
diff --git a/llvm/lib/Target/Lanai/LanaiISelLowering.cpp b/llvm/lib/Target/Lanai/LanaiISelLowering.cpp
--- a/llvm/lib/Target/Lanai/LanaiISelLowering.cpp
+++ b/llvm/lib/Target/Lanai/LanaiISelLowering.cpp
@@ -144,9 +144,9 @@
   setTargetDAGCombine(ISD::OR);
   setTargetDAGCombine(ISD::XOR);
 
-  // Function alignments (log2)
+  // Function alignments
   setMinFunctionAlignment(llvm::Align(4));
-  setPrefFunctionLogAlignment(2);
+  setPrefFunctionAlignment(llvm::Align(4));
 
   setJumpIsExpensive(true);
 
diff --git a/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp b/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
--- a/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
+++ b/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
@@ -328,7 +328,7 @@
   // TODO: __mspabi_srall, __mspabi_srlll, __mspabi_sllll
 
   setMinFunctionAlignment(llvm::Align(2));
-  setPrefFunctionLogAlignment(1);
+  setPrefFunctionAlignment(llvm::Align(2));
 }
 
 SDValue MSP430TargetLowering::LowerOperation(SDValue Op,
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1182,7 +1182,7 @@
 
   setMinFunctionAlignment(llvm::Align(4));
   if (Subtarget.isDarwin())
-    setPrefFunctionLogAlignment(4);
+    setPrefFunctionAlignment(llvm::Align(16));
 
   switch (Subtarget.getDarwinDirective()) {
   default: break;
@@ -1199,7 +1199,7 @@
   case PPC::DIR_PWR7:
   case PPC::DIR_PWR8:
   case PPC::DIR_PWR9:
-    setPrefFunctionLogAlignment(4);
+    setPrefFunctionAlignment(llvm::Align(16));
     setPrefLoopLogAlignment(4);
     break;
   }
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -197,10 +197,10 @@
 
   setBooleanContents(ZeroOrOneBooleanContent);
 
-  // Function alignments (log2).
+  // Function alignments.
   const llvm::Align FunctionAlignment(Subtarget.hasStdExtC() ? 2 : 4);
   setMinFunctionAlignment(FunctionAlignment);
-  setPrefFunctionLogAlignment(Log2(FunctionAlignment));
+  setPrefFunctionAlignment(FunctionAlignment);
 
   // Effectively disable jump table generation.
   setMinimumJumpTableEntries(INT_MAX);
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -122,7 +122,7 @@
   // Instructions are strings of 2-byte aligned 2-byte values.
   setMinFunctionAlignment(llvm::Align(4));
   // For performance reasons we prefer 16-byte alignment.
-  setPrefFunctionLogAlignment(4);
+  setPrefFunctionAlignment(llvm::Align(16));
 
   // Handle operations that are handled in a similar way for all types.
   for (unsigned I = MVT::FIRST_INTEGER_VALUETYPE;
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -1898,7 +1898,7 @@
   // but a conditional move could be stalled by an expensive earlier operation.
   PredictableSelectIsExpensive = Subtarget.getSchedModel().isOutOfOrder();
   EnableExtLdPromotion = true;
-  setPrefFunctionLogAlignment(4); // 2^4 bytes.
+  setPrefFunctionAlignment(llvm::Align(16));
 
   verifyIntrinsicTables();
 }
diff --git a/llvm/lib/Target/XCore/XCoreISelLowering.cpp b/llvm/lib/Target/XCore/XCoreISelLowering.cpp
--- a/llvm/lib/Target/XCore/XCoreISelLowering.cpp
+++ b/llvm/lib/Target/XCore/XCoreISelLowering.cpp
@@ -172,7 +172,7 @@
   setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN);
 
   setMinFunctionAlignment(llvm::Align(2));
-  setPrefFunctionLogAlignment(2);
+  setPrefFunctionAlignment(llvm::Align(4));
 }
 
 bool XCoreTargetLowering::isZExtFree(SDValue Val, EVT VT2) const {