diff --git a/lld/test/wasm/data-segments.ll b/lld/test/wasm/data-segments.ll
--- a/lld/test/wasm/data-segments.ll
+++ b/lld/test/wasm/data-segments.ll
@@ -66,7 +66,7 @@
 ; PASSIVE-NEXT:        Body:            0B
 ; PASSIVE-NEXT:      - Index:           1
 ; PASSIVE-NEXT:        Locals:          []
-; PASSIVE-NEXT:        Body:            41B4D60041004101FE480200044041B4D6004101427FFE0102001A0541800841004114FC08000041940841004190CE00FC08010041A4D6004100410DFC08020041B4D6004102FE17020041B4D600417FFE0002001A0BFC0900FC0901FC09020B
+; PASSIVE-NEXT:        Body:            41B4D60041004101FE480200044041B4D6004101427FFE0102001A0541800841004114FC08000041940841004190CE00FC08010041A4D6004100410DFC080200FE030041B4D6004102FE17020041B4D600417FFE0002001A0BFC0900FC0901FC09020B
 ; PASSIVE-NEXT:  - Index:           2
 ; PASSIVE-NEXT:    Locals:          []
 ; PASSIVE-NEXT:    Body:            0B
diff --git a/lld/wasm/Writer.cpp b/lld/wasm/Writer.cpp
--- a/lld/wasm/Writer.cpp
+++ b/lld/wasm/Writer.cpp
@@ -726,6 +726,7 @@
       //   )
       //   (else
       //    ( ... initialize data segments ... )
+      //    (atomic.fence)
       //    (i32.atomic.store align=2 offset=0
       //     (i32.const $__init_memory_flag)
       //     (i32.const 2)
@@ -779,6 +780,11 @@
         }
       }
 
+      // Fence to commit stores from memory.init instructions
+      writeU8(os, WASM_OPCODE_ATOMICS_PREFIX, "atomics prefix");
+      writeUleb128(os, WASM_OPCODE_ATOMIC_FENCE, "atomic.fence");
+      writeU8(os, 0, "memory ordering");
+
       // Set flag to 2 to mark end of initialization
       writeI32Const(os, flagAddress, "flag address");
       writeI32Const(os, 2, "flag value");
diff --git a/llvm/include/llvm/BinaryFormat/Wasm.h b/llvm/include/llvm/BinaryFormat/Wasm.h
--- a/llvm/include/llvm/BinaryFormat/Wasm.h
+++ b/llvm/include/llvm/BinaryFormat/Wasm.h
@@ -264,6 +264,7 @@
   WASM_OPCODE_ATOMICS_PREFIX = 0xfe,
   WASM_OPCODE_ATOMIC_NOTIFY = 0x00,
   WASM_OPCODE_I32_ATOMIC_WAIT = 0x01,
+  WASM_OPCODE_ATOMIC_FENCE = 0x03,
   WASM_OPCODE_I32_ATOMIC_STORE = 0x17,
   WASM_OPCODE_I32_RMW_CMPXCHG = 0x48,
 };