[X86] Use MOVSX instead of CBW to extend i8 to AX for i8 sdiv.

[craig.topper]

Summary

The CBW instruction sign extends AL to AX. But if the input isn't in AL yet we need to copy it there. MOVSX on the other hand has an independent source and destination register. So it can copy any 8-bit value into AX in one operation saving the copy. It can also fold a load which CBW can't.

This patch switches our sdiv isel to use MOVSX to allow these improvements. I'm extending all the way to i32 because that's one byte shorter to encode. It also avoids a partial register dependency on bits 31:16 of the output register on recent Intel CPUs. Unfortunately, this prevents X86MCInstLowering from being able to turn the MOVSX back into CBW if the register allocation works out that the input is in AL already. CBW is immune to the partial read issue on recent CPUs. But I think CBW is 3 bytes to encode and MOVSX i8->i32 is also 3 bytes so maybe this loss doesn't matter. If its important we could probably emit i8->i16 from isel and teach FixupBWInst to turn i8->i16 into i8->i32 when it won't interfere with CBW formation.

[craig.topper]

Actually CBW is 2 bytes. So that would be better than MOVSX

[RKSimon]

I'm not clear on why we can't peephole replace MOVSX with CBW at a later stage.

[craig.topper]

You can't peephole replace MOVSX %al, %eax with CBW without proving that the upper 48-bits of %rax are dead. CBW is equivalent to MOVSX %al, %ax which leaves the upper 48-bits unmodified.

[craig.topper]

Ok I've recovered CBW formation by using MOVSX16rr8 out of isel and fixing it with FixupBWInsts. To avoid complicating the isel code to do something different for udiv/idiv, I've also changed to MOVZX16rr8. I'm also using the 16-bit form for the loads since they might get unfolded later. So FixupBWInsts has to handle all 4 instructions.

Realistically there 3 patches in here if we agree this is the way to go.
-Update FixupBWInsts to handle extends. This by itself will affect the fast-isel test.
-Change udiv to use MOVZX16rr8
-Change sdiv to use MOVSX16rr8

[xbolva00]

New codegen looks nice

Realistically there 3 patches

Maybe review this as one patch and then commit as three patches?

[andreadb]

Looks good to me.
Thanks for the changes in FixupBWInsts. Personally I was already happy with the previous version patch. But this one is looks even better.

I also agree that this change should be split into three commits.

llvm/lib/Target/X86/X86FixupBWInsts.cpp

242 ↗

(On Diff #218973)

Extra '//' between 'something' and 'else'

[xbolva00]

Please also update the patch summary before commiting

llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp

case ISD::UDIVREM: {
     }
 
     unsigned LoReg, HiReg, ClrReg;
     unsigned SExtOpcode;
     switch (NVT.SimpleTy) {
     default: llvm_unreachable("Unsupported VT!");
     case MVT::i8:
       LoReg = X86::AL;  ClrReg = HiReg = X86::AH;
-      SExtOpcode = X86::CBW;
+      SExtOpcode = 0; // Not used.
       break;
     case MVT::i16:
       LoReg = X86::AX;  HiReg = X86::DX;
       ClrReg = X86::DX;
       SExtOpcode = X86::CWD;
       break;
     case MVT::i32:
       LoReg = X86::EAX; ClrReg = HiReg = X86::EDX;
       SExtOpcode = X86::CDQ;
       break;
     case MVT::i64:
       LoReg = X86::RAX; ClrReg = HiReg = X86::RDX;
       SExtOpcode = X86::CQO;
       break;
     }
 
     SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4;
     bool foldedLoad = tryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4);
     bool signBitIsZero = CurDAG->SignBitIsZero(N0);
 
     SDValue InFlag;
-    if (NVT == MVT::i8 && (!isSigned || signBitIsZero)) {
+    if (NVT == MVT::i8) {
       // Special case for div8, just use a move with zero extension to AX to
       // clear the upper 8 bits (AH).
       SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Chain;
       MachineSDNode *Move;
       if (tryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) {
         SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N0.getOperand(0) };
-        Move = CurDAG->getMachineNode(X86::MOVZX16rm8, dl, MVT::i32,
-                                      MVT::Other, Ops);
+        unsigned Opc = (isSigned && !signBitIsZero) ? X86::MOVSX16rm8
+                                                    : X86::MOVZX16rm8;
+        Move = CurDAG->getMachineNode(Opc, dl, MVT::i16, MVT::Other, Ops);
         Chain = SDValue(Move, 1);
         ReplaceUses(N0.getValue(1), Chain);
         // Record the mem-refs
         CurDAG->setNodeMemRefs(Move, {cast<LoadSDNode>(N0)->getMemOperand()});
       } else {
-        Move = CurDAG->getMachineNode(X86::MOVZX16rr8, dl, MVT::i32, N0);
+        unsigned Opc = (isSigned && !signBitIsZero) ? X86::MOVSX16rr8
+                                                    : X86::MOVZX16rr8;
+        Move = CurDAG->getMachineNode(Opc, dl, MVT::i16, N0);
         Chain = CurDAG->getEntryNode();
       }
       Chain  = CurDAG->getCopyToReg(Chain, dl, X86::AX, SDValue(Move, 0),
                                     SDValue());
       InFlag = Chain.getValue(1);
     } else {
       InFlag =
         CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl,

llvm/trunk/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll

 ; Make sure we load the constants i and j starting offset zero.
 ; Also make sure that we sign-extend it.
 ; Based on /gcc-4_2-testsuite/src/gcc.c-torture/execute/pr23135.c
 
 define i32 @main() nounwind uwtable {
 ; CHECK-LABEL: main:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
-; CHECK-NEXT:    pextrb $1, %xmm0, %eax
+; CHECK-NEXT:    pextrb $1, %xmm0, %ecx
 ; CHECK-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero
-; CHECK-NEXT:    pextrb $1, %xmm1, %ecx
-; CHECK-NEXT:    # kill: def $al killed $al killed $eax
+; CHECK-NEXT:    pextrb $1, %xmm1, %eax
 ; CHECK-NEXT:    cbtw
+; CHECK-NEXT:    pextrb $0, %xmm0, %edx
+; CHECK-NEXT:    pextrb $0, %xmm1, %esi
 ; CHECK-NEXT:    idivb %cl
 ; CHECK-NEXT:    movl %eax, %ecx
-; CHECK-NEXT:    pextrb $0, %xmm0, %eax
-; CHECK-NEXT:    # kill: def $al killed $al killed $eax
-; CHECK-NEXT:    cbtw
-; CHECK-NEXT:    pextrb $0, %xmm1, %edx
+; CHECK-NEXT:    movsbl %sil, %eax
 ; CHECK-NEXT:    idivb %dl
 ; CHECK-NEXT:    movzbl %cl, %ecx
 ; CHECK-NEXT:    movzbl %al, %eax
 ; CHECK-NEXT:    movd %eax, %xmm0
 ; CHECK-NEXT:    pinsrb $1, %ecx, %xmm0
 ; CHECK-NEXT:    pextrw $0, %xmm0, {{.*}}(%rip)
 ; CHECK-NEXT:    xorl %eax, %eax
 ; CHECK-NEXT:    retq
 entry:
   %0 = load <2 x i8>, <2 x i8>* @i, align 8
   %1 = load <2 x i8>, <2 x i8>* @j, align 8
   %div = sdiv <2 x i8> %1, %0
   store <2 x i8> %div, <2 x i8>* getelementptr inbounds (%union.anon, %union.anon* @res, i32 0, i32 0), align 8
   ret i32 0
 }

llvm/trunk/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=i686-unknown-unknown   -mattr=+sse,+sse2 | FileCheck %s --check-prefixes=ALL,X86
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse,+sse2 | FileCheck %s --check-prefixes=ALL,X64
 
 ; If the target does not have a single div/rem operation,
 ; -div-rem-pairs pass will decompose the remainder calculation as:
 ;   X % Y --> X - ((X / Y) * Y)
 ; But if the target does have a single div/rem operation,
 ; the opposite transform is likely beneficial.
 
 define i8 @scalar_i8(i8 %x, i8 %y, i8* %divdst) nounwind {
 ; X86-LABEL: scalar_i8:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT:    movb {{[0-9]+}}(%esp), %cl
-; X86-NEXT:    movl %ecx, %eax
-; X86-NEXT:    cbtw
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %ch
+; X86-NEXT:    movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT:    movsbl %cl, %eax
 ; X86-NEXT:    idivb %ch
 ; X86-NEXT:    movb %al, (%edx)
 ; X86-NEXT:    mulb %ch
 ; X86-NEXT:    subb %al, %cl
 ; X86-NEXT:    movl %ecx, %eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: scalar_i8:
 ; X64:       # %bb.0:
-; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl %dil, %ecx
+; X64-NEXT:    movl %ecx, %eax
 ; X64-NEXT:    idivb %sil
 ; X64-NEXT:    movb %al, (%rdx)
 ; X64-NEXT:    mulb %sil
-; X64-NEXT:    subb %al, %dil
-; X64-NEXT:    movl %edi, %eax
+; X64-NEXT:    subb %al, %cl
+; X64-NEXT:    movl %ecx, %eax
 ; X64-NEXT:    retq
   %div = sdiv i8 %x, %y
   store i8 %div, i8* %divdst, align 4
   %t1 = mul i8 %div, %y
   %t2 = sub i8 %x, %t1
   ret i8 %t2
 }
 

 ; X86-NEXT:    movl %esp, %ebp
 ; X86-NEXT:    pushl %ebx
 ; X86-NEXT:    pushl %edi
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    andl $-16, %esp
 ; X86-NEXT:    subl $48, %esp
 ; X86-NEXT:    movdqa %xmm0, (%esp)
 ; X86-NEXT:    movdqa %xmm1, {{[0-9]+}}(%esp)
-; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X86-NEXT:    cbtw
+; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X86-NEXT:    movzbl %al, %eax
 ; X86-NEXT:    movd %eax, %xmm2
-; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X86-NEXT:    cbtw
+; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X86-NEXT:    movzbl %al, %eax
 ; X86-NEXT:    movd %eax, %xmm3
 ; X86-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
-; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X86-NEXT:    cbtw
+; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X86-NEXT:    movzbl %al, %eax
 ; X86-NEXT:    movd %eax, %xmm4
-; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X86-NEXT:    cbtw
+; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X86-NEXT:    movzbl %al, %eax
 ; X86-NEXT:    movd %eax, %xmm2
 ; X86-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7]
 ; X86-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
-; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X86-NEXT:    cbtw
+; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X86-NEXT:    movzbl %al, %eax
 ; X86-NEXT:    movd %eax, %xmm3
-; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X86-NEXT:    cbtw
+; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X86-NEXT:    movzbl %al, %eax
 ; X86-NEXT:    movd %eax, %xmm4
 ; X86-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
-; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X86-NEXT:    cbtw
+; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X86-NEXT:    movzbl %al, %eax
 ; X86-NEXT:    movd %eax, %xmm5
-; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X86-NEXT:    cbtw
+; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X86-NEXT:    movzbl %al, %eax
 ; X86-NEXT:    movd %eax, %xmm3
 ; X86-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3],xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
-; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X86-NEXT:    cbtw
+; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X86-NEXT:    movzbl %al, %eax
 ; X86-NEXT:    movd %eax, %xmm5
-; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X86-NEXT:    cbtw
+; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X86-NEXT:    movzbl %al, %eax
 ; X86-NEXT:    movd %eax, %xmm6
-; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X86-NEXT:    cbtw
+; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    idivb {{[0-9]+}}(%esp)
+; X86-NEXT:    movzbl %al, %edx
+; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X86-NEXT:    movzbl %al, %esi
-; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X86-NEXT:    cbtw
+; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X86-NEXT:    movzbl %al, %edi
-; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X86-NEXT:    cbtw
+; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X86-NEXT:    movzbl %al, %ebx
-; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X86-NEXT:    cbtw
+; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X86-NEXT:    movl %eax, %ecx
-; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X86-NEXT:    cbtw
-; X86-NEXT:    movb (%esp), %dl
+; X86-NEXT:    movsbl (%esp), %eax
 ; X86-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X86-NEXT:    punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
-; X86-NEXT:    movd %esi, %xmm4
+; X86-NEXT:    movd %edx, %xmm4
 ; X86-NEXT:    punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; X86-NEXT:    movd %edi, %xmm2
+; X86-NEXT:    movd %esi, %xmm2
 ; X86-NEXT:    punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3],xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
+; X86-NEXT:    movd %edi, %xmm5
 ; X86-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7]
+; X86-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm6[0],xmm2[1],xmm6[1],xmm2[2],xmm6[2],xmm2[3],xmm6[3]
 ; X86-NEXT:    movd %ebx, %xmm4
 ; X86-NEXT:    movzbl %cl, %ecx
-; X86-NEXT:    movd %ecx, %xmm5
+; X86-NEXT:    movd %ecx, %xmm6
 ; X86-NEXT:    movl 8(%ebp), %ecx
-; X86-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm6[0],xmm2[1],xmm6[1],xmm2[2],xmm6[2],xmm2[3],xmm6[3]
-; X86-NEXT:    punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
-; X86-NEXT:    movzbl %al, %eax
-; X86-NEXT:    movd %eax, %xmm4
-; X86-NEXT:    movl %edx, %eax
-; X86-NEXT:    cbtw
-; X86-NEXT:    idivb {{[0-9]+}}(%esp)
+; X86-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3],xmm4[4],xmm5[4],xmm4[5],xmm5[5],xmm4[6],xmm5[6],xmm4[7],xmm5[7]
 ; X86-NEXT:    movzbl %al, %eax
-; X86-NEXT:    movd %eax, %xmm6
-; X86-NEXT:    punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3],xmm6[4],xmm4[4],xmm6[5],xmm4[5],xmm6[6],xmm4[6],xmm6[7],xmm4[7]
-; X86-NEXT:    punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3]
-; X86-NEXT:    punpckldq {{.*#+}} xmm6 = xmm6[0],xmm2[0],xmm6[1],xmm2[1]
-; X86-NEXT:    movdqa %xmm6, %xmm2
+; X86-NEXT:    movd %eax, %xmm5
+; X86-NEXT:    punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3],xmm5[4],xmm6[4],xmm5[5],xmm6[5],xmm5[6],xmm6[6],xmm5[7],xmm6[7]
+; X86-NEXT:    punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
+; X86-NEXT:    punpckldq {{.*#+}} xmm5 = xmm5[0],xmm2[0],xmm5[1],xmm2[1]
+; X86-NEXT:    movdqa %xmm5, %xmm2
 ; X86-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
 ; X86-NEXT:    movdqa %xmm2, (%ecx)
 ; X86-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
 ; X86-NEXT:    movdqa %xmm1, %xmm2
 ; X86-NEXT:    punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm0[8],xmm2[9],xmm0[9],xmm2[10],xmm0[10],xmm2[11],xmm0[11],xmm2[12],xmm0[12],xmm2[13],xmm0[13],xmm2[14],xmm0[14],xmm2[15],xmm0[15]
 ; X86-NEXT:    pmullw %xmm3, %xmm2
 ; X86-NEXT:    movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255]
 ; X86-NEXT:    pand %xmm3, %xmm2
-; X86-NEXT:    punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm0[0],xmm6[1],xmm0[1],xmm6[2],xmm0[2],xmm6[3],xmm0[3],xmm6[4],xmm0[4],xmm6[5],xmm0[5],xmm6[6],xmm0[6],xmm6[7],xmm0[7]
+; X86-NEXT:    punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm0[0],xmm5[1],xmm0[1],xmm5[2],xmm0[2],xmm5[3],xmm0[3],xmm5[4],xmm0[4],xmm5[5],xmm0[5],xmm5[6],xmm0[6],xmm5[7],xmm0[7]
 ; X86-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
-; X86-NEXT:    pmullw %xmm6, %xmm1
+; X86-NEXT:    pmullw %xmm5, %xmm1
 ; X86-NEXT:    pand %xmm3, %xmm1
 ; X86-NEXT:    packuswb %xmm2, %xmm1
 ; X86-NEXT:    psubb %xmm1, %xmm0
 ; X86-NEXT:    leal -12(%ebp), %esp
 ; X86-NEXT:    popl %esi
 ; X86-NEXT:    popl %edi
 ; X86-NEXT:    popl %ebx
 ; X86-NEXT:    popl %ebp
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: vector_i128_i8:
 ; X64:       # %bb.0:
 ; X64-NEXT:    pushq %rbp
 ; X64-NEXT:    pushq %r15
 ; X64-NEXT:    pushq %r14
 ; X64-NEXT:    pushq %r13
 ; X64-NEXT:    pushq %r12
 ; X64-NEXT:    pushq %rbx
 ; X64-NEXT:    movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
 ; X64-NEXT:    movdqa %xmm0, -{{[0-9]+}}(%rsp)
 ; X64-NEXT:    movdqa %xmm1, -{{[0-9]+}}(%rsp)
-; X64-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; X64-NEXT:    movzbl %al, %eax
 ; X64-NEXT:    movd %eax, %xmm2
-; X64-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; X64-NEXT:    movzbl %al, %r8d
-; X64-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; X64-NEXT:    movzbl %al, %r9d
-; X64-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; X64-NEXT:    movzbl %al, %r10d
-; X64-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; X64-NEXT:    movzbl %al, %r11d
-; X64-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; X64-NEXT:    movzbl %al, %r14d
-; X64-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; X64-NEXT:    movzbl %al, %r15d
-; X64-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; X64-NEXT:    movzbl %al, %r12d
-; X64-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; X64-NEXT:    movzbl %al, %r13d
-; X64-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
+; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
+; X64-NEXT:    movzbl %al, %edi
+; X64-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
+; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
+; X64-NEXT:    movzbl %al, %esi
+; X64-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; X64-NEXT:    movzbl %al, %ebx
-; X64-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; X64-NEXT:    movzbl %al, %ebp
-; X64-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; X64-NEXT:    cbtw
-; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT:    movzbl %al, %edi
-; X64-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT:    movzbl %al, %esi
-; X64-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; X64-NEXT:    cbtw
+; X64-NEXT:    movzbl %al, %edx
+; X64-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; X64-NEXT:    movl %eax, %ecx
-; X64-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; X64-NEXT:    cbtw
-; X64-NEXT:    movb -{{[0-9]+}}(%rsp), %dl
+; X64-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; X64-NEXT:    movd %r8d, %xmm3
 ; X64-NEXT:    movd %r9d, %xmm4
 ; X64-NEXT:    movd %r10d, %xmm5
 ; X64-NEXT:    movd %r11d, %xmm6
 ; X64-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
 ; X64-NEXT:    movd %r14d, %xmm2
 ; X64-NEXT:    punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
 ; X64-NEXT:    movd %r15d, %xmm4
 ; X64-NEXT:    punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3]
 ; X64-NEXT:    movd %r12d, %xmm3
 ; X64-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm6[0],xmm2[1],xmm6[1],xmm2[2],xmm6[2],xmm2[3],xmm6[3],xmm2[4],xmm6[4],xmm2[5],xmm6[5],xmm2[6],xmm6[6],xmm2[7],xmm6[7]
 ; X64-NEXT:    movd %r13d, %xmm6
 ; X64-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
-; X64-NEXT:    movd %ebx, %xmm4
+; X64-NEXT:    movd %edi, %xmm4
 ; X64-NEXT:    punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
-; X64-NEXT:    movd %ebp, %xmm2
+; X64-NEXT:    movd %esi, %xmm2
 ; X64-NEXT:    punpckldq {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1]
-; X64-NEXT:    movd %edi, %xmm5
+; X64-NEXT:    movd %ebx, %xmm5
 ; X64-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm6[0],xmm4[1],xmm6[1],xmm4[2],xmm6[2],xmm4[3],xmm6[3],xmm4[4],xmm6[4],xmm4[5],xmm6[5],xmm4[6],xmm6[6],xmm4[7],xmm6[7]
-; X64-NEXT:    movd %esi, %xmm6
+; X64-NEXT:    movd %ebp, %xmm6
 ; X64-NEXT:    punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm2[0],xmm5[1],xmm2[1],xmm5[2],xmm2[2],xmm5[3],xmm2[3],xmm5[4],xmm2[4],xmm5[5],xmm2[5],xmm5[6],xmm2[6],xmm5[7],xmm2[7]
-; X64-NEXT:    movzbl %cl, %ecx
-; X64-NEXT:    movd %ecx, %xmm2
+; X64-NEXT:    movd %edx, %xmm2
 ; X64-NEXT:    punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
+; X64-NEXT:    movzbl %cl, %ecx
+; X64-NEXT:    movd %ecx, %xmm4
 ; X64-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm6[0],xmm2[1],xmm6[1],xmm2[2],xmm6[2],xmm2[3],xmm6[3],xmm2[4],xmm6[4],xmm2[5],xmm6[5],xmm2[6],xmm6[6],xmm2[7],xmm6[7]
 ; X64-NEXT:    movzbl %al, %eax
-; X64-NEXT:    movd %eax, %xmm4
-; X64-NEXT:    movl %edx, %eax
-; X64-NEXT:    cbtw
-; X64-NEXT:    idivb -{{[0-9]+}}(%rsp)
-; X64-NEXT:    movzbl %al, %eax
 ; X64-NEXT:    movd %eax, %xmm6
 ; X64-NEXT:    punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3],xmm6[4],xmm4[4],xmm6[5],xmm4[5],xmm6[6],xmm4[6],xmm6[7],xmm4[7]
 ; X64-NEXT:    punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm2[0],xmm6[1],xmm2[1],xmm6[2],xmm2[2],xmm6[3],xmm2[3]
 ; X64-NEXT:    punpckldq {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
 ; X64-NEXT:    movdqa %xmm6, %xmm2
 ; X64-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
 ; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
 ; X64-NEXT:    movdqa %xmm2, (%rax)

llvm/trunk/test/CodeGen/X86/divrem.ll

; X64-NEXT:    retq
   store i16 %t, i16* %q
   ret void
 }
 
 define void @si8(i8 %x, i8 %y, i8* %p, i8* %q) nounwind {
 ; X32-LABEL: si8:
 ; X32:       # %bb.0:
 ; X32-NEXT:    pushl %ebx
-; X32-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X32-NEXT:    cbtw
+; X32-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X32-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %edx
 ; X32-NEXT:    movsbl %ah, %ebx
 ; X32-NEXT:    movb %al, (%edx)
 ; X32-NEXT:    movb %bl, (%ecx)
 ; X32-NEXT:    popl %ebx
 ; X32-NEXT:    retl
 ;
 ; X64-LABEL: si8:
 ; X64:       # %bb.0:
-; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    # kill: def $al killed $al killed $eax
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl %dil, %eax
 ; X64-NEXT:    idivb %sil
 ; X64-NEXT:    movsbl %ah, %esi
 ; X64-NEXT:    movb %al, (%rdx)
 ; X64-NEXT:    movb %sil, (%rcx)
 ; X64-NEXT:    retq
   %r = sdiv i8 %x, %y
   %t = srem i8 %x, %y
   store i8 %r, i8* %p

llvm/trunk/test/CodeGen/X86/divrem8_ext.ll

; X64-NEXT:    retq
   %1 = urem i8 %x, %y
   %2 = zext i8 %1 to i64
   ret i64 %2
 }
 
 define signext i8 @test_sdivrem_sext_ah(i8 %x, i8 %y) {
 ; X32-LABEL: test_sdivrem_sext_ah:
 ; X32:       # %bb.0:
-; X32-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X32-NEXT:    cbtw
+; X32-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X32-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X32-NEXT:    movsbl %ah, %ecx
 ; X32-NEXT:    movb %al, z
 ; X32-NEXT:    movl %ecx, %eax
 ; X32-NEXT:    retl
 ;
 ; X64-LABEL: test_sdivrem_sext_ah:
 ; X64:       # %bb.0:
-; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    # kill: def $al killed $al killed $eax
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl %dil, %eax
 ; X64-NEXT:    idivb %sil
 ; X64-NEXT:    movsbl %ah, %ecx
 ; X64-NEXT:    movb %al, {{.*}}(%rip)
 ; X64-NEXT:    movl %ecx, %eax
 ; X64-NEXT:    retq
   %div = sdiv i8 %x, %y
   store i8 %div, i8* @z
   %1 = srem i8 %x, %y
   ret i8 %1
 }
 
 define signext i8 @test_srem_sext_ah(i8 %x, i8 %y) {
 ; X32-LABEL: test_srem_sext_ah:
 ; X32:       # %bb.0:
-; X32-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X32-NEXT:    cbtw
+; X32-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X32-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X32-NEXT:    movsbl %ah, %eax
 ; X32-NEXT:    # kill: def $al killed $al killed $eax
 ; X32-NEXT:    retl
 ;
 ; X64-LABEL: test_srem_sext_ah:
 ; X64:       # %bb.0:
-; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    # kill: def $al killed $al killed $eax
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl %dil, %eax
 ; X64-NEXT:    idivb %sil
 ; X64-NEXT:    movsbl %ah, %eax
 ; X64-NEXT:    # kill: def $al killed $al killed $eax
 ; X64-NEXT:    retq
   %1 = srem i8 %x, %y
   ret i8 %1
 }
 
 define i8 @test_srem_noext_ah(i8 %x, i8 %y) {
 ; X32-LABEL: test_srem_noext_ah:
 ; X32:       # %bb.0:
-; X32-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X32-NEXT:    cbtw
 ; X32-NEXT:    movb {{[0-9]+}}(%esp), %cl
+; X32-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X32-NEXT:    idivb %cl
 ; X32-NEXT:    movsbl %ah, %eax
 ; X32-NEXT:    addb %cl, %al
 ; X32-NEXT:    # kill: def $al killed $al killed $eax
 ; X32-NEXT:    retl
 ;
 ; X64-LABEL: test_srem_noext_ah:
 ; X64:       # %bb.0:
-; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    # kill: def $al killed $al killed $eax
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl %dil, %eax
 ; X64-NEXT:    idivb %sil
 ; X64-NEXT:    movsbl %ah, %eax
 ; X64-NEXT:    addb %sil, %al
 ; X64-NEXT:    # kill: def $al killed $al killed $eax
 ; X64-NEXT:    retq
   %1 = srem i8 %x, %y
   %2 = add i8 %1, %y
   ret i8 %2
 }
 
 define i64 @test_srem_sext64_ah(i8 %x, i8 %y) {
 ; X32-LABEL: test_srem_sext64_ah:
 ; X32:       # %bb.0:
-; X32-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X32-NEXT:    cbtw
+; X32-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X32-NEXT:    idivb {{[0-9]+}}(%esp)
 ; X32-NEXT:    movsbl %ah, %eax
 ; X32-NEXT:    movl %eax, %edx
 ; X32-NEXT:    sarl $31, %edx
 ; X32-NEXT:    retl
 ;
 ; X64-LABEL: test_srem_sext64_ah:
 ; X64:       # %bb.0:
-; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    # kill: def $al killed $al killed $eax
-; X64-NEXT:    cbtw
+; X64-NEXT:    movsbl %dil, %eax
 ; X64-NEXT:    idivb %sil
 ; X64-NEXT:    movsbl %ah, %eax
 ; X64-NEXT:    cltq
 ; X64-NEXT:    retq
   %1 = srem i8 %x, %y
   %2 = sext i8 %1 to i64
   ret i64 %2
 }

llvm/trunk/test/CodeGen/X86/scalar_widen_div.ll

entry:
   store <2 x i32> %tmp10, <2 x i32> addrspace(1)* %arrayidx
   ret void
 }
 
 ; CHECK: test_char_div
 define <3 x i8> @test_char_div(<3 x i8> %num, <3 x i8> %div) {
 ; CHECK-LABEL: test_char_div:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movl %edx, %r10d
-; CHECK-NEXT:    movl %edi, %eax
-; CHECK-NEXT:    # kill: def $al killed $al killed $eax
-; CHECK-NEXT:    cbtw
+; CHECK-NEXT:    movsbl %dil, %eax
 ; CHECK-NEXT:    idivb %cl
 ; CHECK-NEXT:    movl %eax, %edi
-; CHECK-NEXT:    movl %esi, %eax
-; CHECK-NEXT:    cbtw
+; CHECK-NEXT:    movsbl %sil, %eax
 ; CHECK-NEXT:    idivb %r8b
-; CHECK-NEXT:    movl %eax, %edx
-; CHECK-NEXT:    movl %r10d, %eax
-; CHECK-NEXT:    cbtw
+; CHECK-NEXT:    movl %eax, %esi
+; CHECK-NEXT:    movsbl %dl, %eax
 ; CHECK-NEXT:    idivb %r9b
 ; CHECK-NEXT:    movl %eax, %ecx
 ; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    movl %esi, %edx
 ; CHECK-NEXT:    retq
   %div.r = sdiv <3 x i8> %num, %div
   ret <3 x i8>  %div.r
 }
 
 ; CHECK: test_uchar_div
 define <3 x i8> @test_uchar_div(<3 x i8> %num, <3 x i8> %div) {
 ; CHECK-LABEL: test_uchar_div:
; CHECK-NEXT:    retq
   %div.r = udiv <3 x i64> %num, %div
   ret <3 x i64>  %div.r
 }
 
 ; CHECK: test_char_rem
 define <4 x i8> @test_char_rem(<4 x i8> %num, <4 x i8> %rem) {
 ; CHECK-LABEL: test_char_rem:
 ; CHECK:       # %bb.0:
+; CHECK-NEXT:    pextrb $1, %xmm1, %ecx
 ; CHECK-NEXT:    pextrb $1, %xmm0, %eax
-; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    cbtw
-; CHECK-NEXT:    pextrb $1, %xmm1, %ecx
 ; CHECK-NEXT:    idivb %cl
 ; CHECK-NEXT:    movsbl %ah, %ecx
+; CHECK-NEXT:    pextrb $0, %xmm1, %edx
 ; CHECK-NEXT:    pextrb $0, %xmm0, %eax
-; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    cbtw
-; CHECK-NEXT:    pextrb $0, %xmm1, %edx
 ; CHECK-NEXT:    idivb %dl
 ; CHECK-NEXT:    movsbl %ah, %eax
 ; CHECK-NEXT:    movd %eax, %xmm2
-; CHECK-NEXT:    pextrb $2, %xmm0, %eax
-; CHECK-NEXT:    # kill: def $al killed $al killed $eax
-; CHECK-NEXT:    cbtw
 ; CHECK-NEXT:    pinsrb $1, %ecx, %xmm2
 ; CHECK-NEXT:    pextrb $2, %xmm1, %ecx
+; CHECK-NEXT:    pextrb $2, %xmm0, %eax
+; CHECK-NEXT:    cbtw
 ; CHECK-NEXT:    idivb %cl
-; CHECK-NEXT:    movsbl %ah, %ecx
+; CHECK-NEXT:    movsbl %ah, %eax
+; CHECK-NEXT:    pinsrb $2, %eax, %xmm2
+; CHECK-NEXT:    pextrb $3, %xmm1, %ecx
 ; CHECK-NEXT:    pextrb $3, %xmm0, %eax
-; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    cbtw
-; CHECK-NEXT:    pinsrb $2, %ecx, %xmm2
-; CHECK-NEXT:    pextrb $3, %xmm1, %ecx
 ; CHECK-NEXT:    idivb %cl
 ; CHECK-NEXT:    movsbl %ah, %eax
 ; CHECK-NEXT:    pinsrb $3, %eax, %xmm2
 ; CHECK-NEXT:    movdqa %xmm2, %xmm0
 ; CHECK-NEXT:    retq
   %rem.r = srem <4 x i8> %num, %rem
   ret <4 x i8>  %rem.r
 }

llvm/trunk/test/CodeGen/X86/vector-idiv-sdiv-128.ll

 }
 
 ; This test is just to show what an scalarized v16i8 division looks like.
 define <16 x i8> @test_rem_variable_16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
 ; SSE2-LABEL: test_rem_variable_16i8:
 ; SSE2:       # %bb.0:
 ; SSE2-NEXT:    movaps %xmm0, -{{[0-9]+}}(%rsp)
 ; SSE2-NEXT:    movaps %xmm1, -{{[0-9]+}}(%rsp)
-; SSE2-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; SSE2-NEXT:    cbtw
+; SSE2-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; SSE2-NEXT:    movsbl %ah, %eax
 ; SSE2-NEXT:    movd %eax, %xmm0
-; SSE2-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; SSE2-NEXT:    cbtw
+; SSE2-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; SSE2-NEXT:    movsbl %ah, %eax
 ; SSE2-NEXT:    movd %eax, %xmm1
 ; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
-; SSE2-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; SSE2-NEXT:    cbtw
-; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT:    movsbl %ah, %eax
-; SSE2-NEXT:    movd %eax, %xmm2
-; SSE2-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; SSE2-NEXT:    cbtw
+; SSE2-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; SSE2-NEXT:    movsbl %ah, %eax
 ; SSE2-NEXT:    movd %eax, %xmm0
-; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
-; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
-; SSE2-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; SSE2-NEXT:    cbtw
-; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
-; SSE2-NEXT:    movsbl %ah, %eax
-; SSE2-NEXT:    movd %eax, %xmm1
-; SSE2-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; SSE2-NEXT:    cbtw
+; SSE2-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; SSE2-NEXT:    movsbl %ah, %eax
 ; SSE2-NEXT:    movd %eax, %xmm2
-; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
-; SSE2-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; SSE2-NEXT:    cbtw
+; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
+; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
+; SSE2-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; SSE2-NEXT:    movsbl %ah, %eax
-; SSE2-NEXT:    movd %eax, %xmm3
-; SSE2-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; SSE2-NEXT:    cbtw
+; SSE2-NEXT:    movd %eax, %xmm0
+; SSE2-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; SSE2-NEXT:    movsbl %ah, %eax
-; SSE2-NEXT:    movd %eax, %xmm1
-; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
-; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]
-; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
-; SSE2-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; SSE2-NEXT:    cbtw
+; SSE2-NEXT:    movd %eax, %xmm3
+; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
+; SSE2-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; SSE2-NEXT:    movsbl %ah, %eax
 ; SSE2-NEXT:    movd %eax, %xmm0
-; SSE2-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; SSE2-NEXT:    cbtw
+; SSE2-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; SSE2-NEXT:    movsbl %ah, %eax
-; SSE2-NEXT:    movd %eax, %xmm3
-; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
-; SSE2-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; SSE2-NEXT:    cbtw
+; SSE2-NEXT:    movd %eax, %xmm1
+; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
+; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3]
+; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
+; SSE2-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; SSE2-NEXT:    movsbl %ah, %eax
 ; SSE2-NEXT:    movd %eax, %xmm0
-; SSE2-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; SSE2-NEXT:    cbtw
+; SSE2-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; SSE2-NEXT:    movsbl %ah, %eax
 ; SSE2-NEXT:    movd %eax, %xmm2
 ; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
-; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
-; SSE2-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; SSE2-NEXT:    cbtw
+; SSE2-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; SSE2-NEXT:    movsbl %ah, %eax
 ; SSE2-NEXT:    movd %eax, %xmm0
-; SSE2-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; SSE2-NEXT:    cbtw
+; SSE2-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; SSE2-NEXT:    movsbl %ah, %eax
 ; SSE2-NEXT:    movd %eax, %xmm3
 ; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
-; SSE2-NEXT:    movb -{{[0-9]+}}(%rsp), %al
-; SSE2-NEXT:    cbtw
-; SSE2-NEXT:    movb -{{[0-9]+}}(%rsp), %cl
+; SSE2-NEXT:    punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
+; SSE2-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT:    movsbl %ah, %eax
+; SSE2-NEXT:    movd %eax, %xmm0
+; SSE2-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
+; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
+; SSE2-NEXT:    movsbl %ah, %eax
+; SSE2-NEXT:    movd %eax, %xmm2
+; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
+; SSE2-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; SSE2-NEXT:    movsbl %ah, %eax
 ; SSE2-NEXT:    movd %eax, %xmm4
-; SSE2-NEXT:    movl %ecx, %eax
-; SSE2-NEXT:    cbtw
+; SSE2-NEXT:    movsbl -{{[0-9]+}}(%rsp), %eax
 ; SSE2-NEXT:    idivb -{{[0-9]+}}(%rsp)
 ; SSE2-NEXT:    movsbl %ah, %eax
 ; SSE2-NEXT:    movd %eax, %xmm0
 ; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3],xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7]
-; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3]
-; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
+; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
+; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
 ; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
 ; SSE2-NEXT:    retq
 ;
 ; SSE41-LABEL: test_rem_variable_16i8:
 ; SSE41:       # %bb.0:
+; SSE41-NEXT:    pextrb $1, %xmm1, %ecx
 ; SSE41-NEXT:    pextrb $1, %xmm0, %eax
-; SSE41-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE41-NEXT:    cbtw
-; SSE41-NEXT:    pextrb $1, %xmm1, %ecx
 ; SSE41-NEXT:    idivb %cl
 ; SSE41-NEXT:    movsbl %ah, %ecx
+; SSE41-NEXT:    pextrb $0, %xmm1, %edx
 ; SSE41-NEXT:    pextrb $0, %xmm0, %eax
-; SSE41-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE41-NEXT:    cbtw
-; SSE41-NEXT:    pextrb $0, %xmm1, %edx
 ; SSE41-NEXT:    idivb %dl
 ; SSE41-NEXT:    movsbl %ah, %eax
 ; SSE41-NEXT:    movd %eax, %xmm2
-; SSE41-NEXT:    pextrb $2, %xmm0, %eax
-; SSE41-NEXT:    # kill: def $al killed $al killed $eax
-; SSE41-NEXT:    cbtw
 ; SSE41-NEXT:    pinsrb $1, %ecx, %xmm2
 ; SSE41-NEXT:    pextrb $2, %xmm1, %ecx
+; SSE41-NEXT:    pextrb $2, %xmm0, %eax
+; SSE41-NEXT:    cbtw
 ; SSE41-NEXT:    idivb %cl
-; SSE41-NEXT:    movsbl %ah, %ecx
+; SSE41-NEXT:    movsbl %ah, %eax
+; SSE41-NEXT:    pinsrb $2, %eax, %xmm2
+; SSE41-NEXT:    pextrb $3, %xmm1, %ecx
 ; SSE41-NEXT:    pextrb $3, %xmm0, %eax
-; SSE41-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE41-NEXT:    cbtw
-; SSE41-NEXT:    pinsrb $2, %ecx, %xmm2
-; SSE41-NEXT:    pextrb $3, %xmm1, %ecx
 ; SSE41-NEXT:    idivb %cl
-; SSE41-NEXT:    movsbl %ah, %ecx
+; SSE41-NEXT:    movsbl %ah, %eax
+; SSE41-NEXT:    pinsrb $3, %eax, %xmm2
+; SSE41-NEXT:    pextrb $4, %xmm1, %ecx
 ; SSE41-NEXT:    pextrb $4, %xmm0, %eax
-; SSE41-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE41-NEXT:    cbtw
-; SSE41-NEXT:    pinsrb $3, %ecx, %xmm2
-; SSE41-NEXT:    pextrb $4, %xmm1, %ecx
 ; SSE41-NEXT:    idivb %cl
-; SSE41-NEXT:    movsbl %ah, %ecx
+; SSE41-NEXT:    movsbl %ah, %eax
+; SSE41-NEXT:    pinsrb $4, %eax, %xmm2
+; SSE41-NEXT:    pextrb $5, %xmm1, %ecx
 ; SSE41-NEXT:    pextrb $5, %xmm0, %eax
-; SSE41-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE41-NEXT:    cbtw
-; SSE41-NEXT:    pinsrb $4, %ecx, %xmm2
-; SSE41-NEXT:    pextrb $5, %xmm1, %ecx
 ; SSE41-NEXT:    idivb %cl
-; SSE41-NEXT:    movsbl %ah, %ecx
+; SSE41-NEXT:    movsbl %ah, %eax
+; SSE41-NEXT:    pinsrb $5, %eax, %xmm2
+; SSE41-NEXT:    pextrb $6, %xmm1, %ecx
 ; SSE41-NEXT:    pextrb $6, %xmm0, %eax
-; SSE41-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE41-NEXT:    cbtw
-; SSE41-NEXT:    pinsrb $5, %ecx, %xmm2
-; SSE41-NEXT:    pextrb $6, %xmm1, %ecx
 ; SSE41-NEXT:    idivb %cl
-; SSE41-NEXT:    movsbl %ah, %ecx
+; SSE41-NEXT:    movsbl %ah, %eax
+; SSE41-NEXT:    pinsrb $6, %eax, %xmm2
+; SSE41-NEXT:    pextrb $7, %xmm1, %ecx
 ; SSE41-NEXT:    pextrb $7, %xmm0, %eax
-; SSE41-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE41-NEXT:    cbtw
-; SSE41-NEXT:    pinsrb $6, %ecx, %xmm2
-; SSE41-NEXT:    pextrb $7, %xmm1, %ecx
 ; SSE41-NEXT:    idivb %cl
-; SSE41-NEXT:    movsbl %ah, %ecx
+; SSE41-NEXT:    movsbl %ah, %eax
+; SSE41-NEXT:    pinsrb $7, %eax, %xmm2
+; SSE41-NEXT:    pextrb $8, %xmm1, %ecx
 ; SSE41-NEXT:    pextrb $8, %xmm0, %eax
-; SSE41-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE41-NEXT:    cbtw
-; SSE41-NEXT:    pinsrb $7, %ecx, %xmm2
-; SSE41-NEXT:    pextrb $8, %xmm1, %ecx
 ; SSE41-NEXT:    idivb %cl
-; SSE41-NEXT:    movsbl %ah, %ecx
+; SSE41-NEXT:    movsbl %ah, %eax
+; SSE41-NEXT:    pinsrb $8, %eax, %xmm2
+; SSE41-NEXT:    pextrb $9, %xmm1, %ecx
 ; SSE41-NEXT:    pextrb $9, %xmm0, %eax
-; SSE41-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE41-NEXT:    cbtw
-; SSE41-NEXT:    pinsrb $8, %ecx, %xmm2
-; SSE41-NEXT:    pextrb $9, %xmm1, %ecx
 ; SSE41-NEXT:    idivb %cl
-; SSE41-NEXT:    movsbl %ah, %ecx
+; SSE41-NEXT:    movsbl %ah, %eax
+; SSE41-NEXT:    pinsrb $9, %eax, %xmm2
+; SSE41-NEXT:    pextrb $10, %xmm1, %ecx
 ; SSE41-NEXT:    pextrb $10, %xmm0, %eax
-; SSE41-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE41-NEXT:    cbtw
-; SSE41-NEXT:    pinsrb $9, %ecx, %xmm2
-; SSE41-NEXT:    pextrb $10, %xmm1, %ecx
 ; SSE41-NEXT:    idivb %cl
-; SSE41-NEXT:    movsbl %ah, %ecx
+; SSE41-NEXT:    movsbl %ah, %eax
+; SSE41-NEXT:    pinsrb $10, %eax, %xmm2
+; SSE41-NEXT:    pextrb $11, %xmm1, %ecx
 ; SSE41-NEXT:    pextrb $11, %xmm0, %eax
-; SSE41-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE41-NEXT:    cbtw
-; SSE41-NEXT:    pinsrb $10, %ecx, %xmm2
-; SSE41-NEXT:    pextrb $11, %xmm1, %ecx
 ; SSE41-NEXT:    idivb %cl
-; SSE41-NEXT:    movsbl %ah, %ecx
+; SSE41-NEXT:    movsbl %ah, %eax
+; SSE41-NEXT:    pinsrb $11, %eax, %xmm2
+; SSE41-NEXT:    pextrb $12, %xmm1, %ecx
 ; SSE41-NEXT:    pextrb $12, %xmm0, %eax
-; SSE41-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE41-NEXT:    cbtw
-; SSE41-NEXT:    pinsrb $11, %ecx, %xmm2
-; SSE41-NEXT:    pextrb $12, %xmm1, %ecx
 ; SSE41-NEXT:    idivb %cl
-; SSE41-NEXT:    movsbl %ah, %ecx
+; SSE41-NEXT:    movsbl %ah, %eax
+; SSE41-NEXT:    pinsrb $12, %eax, %xmm2
+; SSE41-NEXT:    pextrb $13, %xmm1, %ecx
 ; SSE41-NEXT:    pextrb $13, %xmm0, %eax
-; SSE41-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE41-NEXT:    cbtw
-; SSE41-NEXT:    pinsrb $12, %ecx, %xmm2
-; SSE41-NEXT:    pextrb $13, %xmm1, %ecx
 ; SSE41-NEXT:    idivb %cl
-; SSE41-NEXT:    movsbl %ah, %ecx
+; SSE41-NEXT:    movsbl %ah, %eax
+; SSE41-NEXT:    pinsrb $13, %eax, %xmm2
+; SSE41-NEXT:    pextrb $14, %xmm1, %ecx
 ; SSE41-NEXT:    pextrb $14, %xmm0, %eax
-; SSE41-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE41-NEXT:    cbtw
-; SSE41-NEXT:    pinsrb $13, %ecx, %xmm2
-; SSE41-NEXT:    pextrb $14, %xmm1, %ecx
 ; SSE41-NEXT:    idivb %cl
-; SSE41-NEXT:    movsbl %ah, %ecx
+; SSE41-NEXT:    movsbl %ah, %eax
+; SSE41-NEXT:    pinsrb $14, %eax, %xmm2
+; SSE41-NEXT:    pextrb $15, %xmm1, %ecx
 ; SSE41-NEXT:    pextrb $15, %xmm0, %eax
-; SSE41-NEXT:    # kill: def $al killed $al killed $eax
 ; SSE41-NEXT:    cbtw
-; SSE41-NEXT:    pinsrb $14, %ecx, %xmm2
-; SSE41-NEXT:    pextrb $15, %xmm1, %ecx
 ; SSE41-NEXT:    idivb %cl
 ; SSE41-NEXT:    movsbl %ah, %eax
 ; SSE41-NEXT:    pinsrb $15, %eax, %xmm2
 ; SSE41-NEXT:    movdqa %xmm2, %xmm0
 ; SSE41-NEXT:    retq
 ;
 ; AVX-LABEL: test_rem_variable_16i8:
 ; AVX:       # %bb.0:
+; AVX-NEXT:    vpextrb $1, %xmm1, %ecx
 ; AVX-NEXT:    vpextrb $1, %xmm0, %eax
-; AVX-NEXT:    # kill: def $al killed $al killed $eax
 ; AVX-NEXT:    cbtw
-; AVX-NEXT:    vpextrb $1, %xmm1, %ecx
 ; AVX-NEXT:    idivb %cl
 ; AVX-NEXT:    movsbl %ah, %ecx
+; AVX-NEXT:    vpextrb $0, %xmm1, %edx
 ; AVX-NEXT:    vpextrb $0, %xmm0, %eax
-; AVX-NEXT:    # kill: def $al killed $al killed $eax
 ; AVX-NEXT:    cbtw
-; AVX-NEXT:    vpextrb $0, %xmm1, %edx
 ; AVX-NEXT:    idivb %dl
 ; AVX-NEXT:    movsbl %ah, %eax
 ; AVX-NEXT:    vmovd %eax, %xmm2
-; AVX-NEXT:    vpextrb $2, %xmm0, %eax
-; AVX-NEXT:    # kill: def $al killed $al killed $eax
-; AVX-NEXT:    cbtw
 ; AVX-NEXT:    vpinsrb $1, %ecx, %xmm2, %xmm2
 ; AVX-NEXT:    vpextrb $2, %xmm1, %ecx
+; AVX-NEXT:    vpextrb $2, %xmm0, %eax
+; AVX-NEXT:    cbtw
 ; AVX-NEXT:    idivb %cl
-; AVX-NEXT:    movsbl %ah, %ecx
+; AVX-NEXT:    movsbl %ah, %eax
+; AVX-NEXT:    vpinsrb $2, %eax, %xmm2, %xmm2
+; AVX-NEXT:    vpextrb $3, %xmm1, %ecx
 ; AVX-NEXT:    vpextrb $3, %xmm0, %eax
-; AVX-NEXT:    # kill: def $al killed $al killed $eax
 ; AVX-NEXT:    cbtw
-; AVX-NEXT:    vpinsrb $2, %ecx, %xmm2, %xmm2
-; AVX-NEXT:    vpextrb $3, %xmm1, %ecx
 ; AVX-NEXT:    idivb %cl
-; AVX-NEXT:    movsbl %ah, %ecx
+; AVX-NEXT:    movsbl %ah, %eax
+; AVX-NEXT:    vpinsrb $3, %eax, %xmm2, %xmm2
+; AVX-NEXT:    vpextrb $4, %xmm1, %ecx
 ; AVX-NEXT:    vpextrb $4, %xmm0, %eax
-; AVX-NEXT:    # kill: def $al killed $al killed $eax
 ; AVX-NEXT:    cbtw
-; AVX-NEXT:    vpinsrb $3, %ecx, %xmm2, %xmm2
-; AVX-NEXT:    vpextrb $4, %xmm1, %ecx
 ; AVX-NEXT:    idivb %cl
-; AVX-NEXT:    movsbl %ah, %ecx
+; AVX-NEXT:    movsbl %ah, %eax
+; AVX-NEXT:    vpinsrb $4, %eax, %xmm2, %xmm2
+; AVX-NEXT:    vpextrb $5, %xmm1, %ecx
 ; AVX-NEXT:    vpextrb $5, %xmm0, %eax
-; AVX-NEXT:    # kill: def $al killed $al killed $eax
 ; AVX-NEXT:    cbtw
-; AVX-NEXT:    vpinsrb $4, %ecx, %xmm2, %xmm2
-; AVX-NEXT:    vpextrb $5, %xmm1, %ecx
 ; AVX-NEXT:    idivb %cl
-; AVX-NEXT:    movsbl %ah, %ecx
+; AVX-NEXT:    movsbl %ah, %eax
+; AVX-NEXT:    vpinsrb $5, %eax, %xmm2, %xmm2
+; AVX-NEXT:    vpextrb $6, %xmm1, %ecx
 ; AVX-NEXT:    vpextrb $6, %xmm0, %eax
-; AVX-NEXT:    # kill: def $al killed $al killed $eax
 ; AVX-NEXT:    cbtw
-; AVX-NEXT:    vpinsrb $5, %ecx, %xmm2, %xmm2
-; AVX-NEXT:    vpextrb $6, %xmm1, %ecx
 ; AVX-NEXT:    idivb %cl
-; AVX-NEXT:    movsbl %ah, %ecx
+; AVX-NEXT:    movsbl %ah, %eax
+; AVX-NEXT:    vpinsrb $6, %eax, %xmm2, %xmm2
+; AVX-NEXT:    vpextrb $7, %xmm1, %ecx
 ; AVX-NEXT:    vpextrb $7, %xmm0, %eax
-; AVX-NEXT:    # kill: def $al killed $al killed $eax
 ; AVX-NEXT:    cbtw
-; AVX-NEXT:    vpinsrb $6, %ecx, %xmm2, %xmm2
-; AVX-NEXT:    vpextrb $7, %xmm1, %ecx
 ; AVX-NEXT:    idivb %cl
-; AVX-NEXT:    movsbl %ah, %ecx
+; AVX-NEXT:    movsbl %ah, %eax
+; AVX-NEXT:    vpinsrb $7, %eax, %xmm2, %xmm2
+; AVX-NEXT:    vpextrb $8, %xmm1, %ecx
 ; AVX-NEXT:    vpextrb $8, %xmm0, %eax
-; AVX-NEXT:    # kill: def $al killed $al killed $eax
 ; AVX-NEXT:    cbtw
-; AVX-NEXT:    vpinsrb $7, %ecx, %xmm2, %xmm2
-; AVX-NEXT:    vpextrb $8, %xmm1, %ecx
 ; AVX-NEXT:    idivb %cl
-; AVX-NEXT:    movsbl %ah, %ecx
+; AVX-NEXT:    movsbl %ah, %eax
+; AVX-NEXT:    vpinsrb $8, %eax, %xmm2, %xmm2
+; AVX-NEXT:    vpextrb $9, %xmm1, %ecx
 ; AVX-NEXT:    vpextrb $9, %xmm0, %eax
-; AVX-NEXT:    # kill: def $al killed $al killed $eax
 ; AVX-NEXT:    cbtw
-; AVX-NEXT:    vpinsrb $8, %ecx, %xmm2, %xmm2
-; AVX-NEXT:    vpextrb $9, %xmm1, %ecx
 ; AVX-NEXT:    idivb %cl
-; AVX-NEXT:    movsbl %ah, %ecx
+; AVX-NEXT:    movsbl %ah, %eax
+; AVX-NEXT:    vpinsrb $9, %eax, %xmm2, %xmm2
+; AVX-NEXT:    vpextrb $10, %xmm1, %ecx
 ; AVX-NEXT:    vpextrb $10, %xmm0, %eax
-; AVX-NEXT:    # kill: def $al killed $al killed $eax
 ; AVX-NEXT:    cbtw
-; AVX-NEXT:    vpinsrb $9, %ecx, %xmm2, %xmm2
-; AVX-NEXT:    vpextrb $10, %xmm1, %ecx
 ; AVX-NEXT:    idivb %cl
-; AVX-NEXT:    movsbl %ah, %ecx
+; AVX-NEXT:    movsbl %ah, %eax
+; AVX-NEXT:    vpinsrb $10, %eax, %xmm2, %xmm2
+; AVX-NEXT:    vpextrb $11, %xmm1, %ecx
 ; AVX-NEXT:    vpextrb $11, %xmm0, %eax
-; AVX-NEXT:    # kill: def $al killed $al killed $eax
 ; AVX-NEXT:    cbtw
-; AVX-NEXT:    vpinsrb $10, %ecx, %xmm2, %xmm2
-; AVX-NEXT:    vpextrb $11, %xmm1, %ecx
 ; AVX-NEXT:    idivb %cl
-; AVX-NEXT:    movsbl %ah, %ecx
+; AVX-NEXT:    movsbl %ah, %eax
+; AVX-NEXT:    vpinsrb $11, %eax, %xmm2, %xmm2
+; AVX-NEXT:    vpextrb $12, %xmm1, %ecx
 ; AVX-NEXT:    vpextrb $12, %xmm0, %eax
-; AVX-NEXT:    # kill: def $al killed $al killed $eax
 ; AVX-NEXT:    cbtw
-; AVX-NEXT:    vpinsrb $11, %ecx, %xmm2, %xmm2
-; AVX-NEXT:    vpextrb $12, %xmm1, %ecx
 ; AVX-NEXT:    idivb %cl
-; AVX-NEXT:    movsbl %ah, %ecx
+; AVX-NEXT:    movsbl %ah, %eax
+; AVX-NEXT:    vpinsrb $12, %eax, %xmm2, %xmm2
+; AVX-NEXT:    vpextrb $13, %xmm1, %ecx
 ; AVX-NEXT:    vpextrb $13, %xmm0, %eax
-; AVX-NEXT:    # kill: def $al killed $al killed $eax
 ; AVX-NEXT:    cbtw
-; AVX-NEXT:    vpinsrb $12, %ecx, %xmm2, %xmm2
-; AVX-NEXT:    vpextrb $13, %xmm1, %ecx
 ; AVX-NEXT:    idivb %cl
-; AVX-NEXT:    movsbl %ah, %ecx
+; AVX-NEXT:    movsbl %ah, %eax
+; AVX-NEXT:    vpinsrb $13, %eax, %xmm2, %xmm2
+; AVX-NEXT:    vpextrb $14, %xmm1, %ecx
 ; AVX-NEXT:    vpextrb $14, %xmm0, %eax
-; AVX-NEXT:    # kill: def $al killed $al killed $eax
 ; AVX-NEXT:    cbtw
-; AVX-NEXT:    vpinsrb $13, %ecx, %xmm2, %xmm2
-; AVX-NEXT:    vpextrb $14, %xmm1, %ecx
 ; AVX-NEXT:    idivb %cl
-; AVX-NEXT:    movsbl %ah, %ecx
+; AVX-NEXT:    movsbl %ah, %eax
+; AVX-NEXT:    vpinsrb $14, %eax, %xmm2, %xmm2
+; AVX-NEXT:    vpextrb $15, %xmm1, %ecx
 ; AVX-NEXT:    vpextrb $15, %xmm0, %eax
-; AVX-NEXT:    # kill: def $al killed $al killed $eax
 ; AVX-NEXT:    cbtw
-; AVX-NEXT:    vpinsrb $14, %ecx, %xmm2, %xmm0
-; AVX-NEXT:    vpextrb $15, %xmm1, %ecx
 ; AVX-NEXT:    idivb %cl
 ; AVX-NEXT:    movsbl %ah, %eax
-; AVX-NEXT:    vpinsrb $15, %eax, %xmm0, %xmm0
+; AVX-NEXT:    vpinsrb $15, %eax, %xmm2, %xmm0
 ; AVX-NEXT:    retq
   %res = srem <16 x i8> %a, %b
   ret <16 x i8> %res
 }